Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention rather than limiting the invention.It also should be noted that in order to just
Only the parts related to the present invention are shown in description, attached drawing rather than entire infrastructure.
Fig. 1 a is a kind of flow diagram of the manufacturing method of display panel provided in an embodiment of the present invention, and Fig. 1 b-1e is
The sectional view of each step counter structure of the production method of display panel in Fig. 1 a.It is each below with reference to the production method of display panel
The production method of display panel provided in an embodiment of the present invention is discussed in detail in the sectional view of step counter structure.It, should referring to Fig. 1 a
Method specifically comprises the following steps:
S110, substrate is provided.
The substrate is preferably glass substrate.
S120, the pixel confining layer with multiple openings is formed on the substrate and is located in the pixel confining layer
Insulated column.
Referring to Fig. 1 b, being formed by photoetching and etching technics in substrate 11, there is the pixel of multiple openings 122 to limit
Given layer 121, and the insulated column 13 above pixel confining layer 121.Pixel confining layer 121 is for limiting multiple pixel lists
Member, wherein the corresponding pixel unit of each opening 122.To enhance stability, in the pixel limit for completing that there are multiple openings 122
The technique that is heating and curing can also be carried out after given layer 121 and insulated column 13.The material of pixel confining layer 121 and insulated column 13
For insulating materials, any insulating materials appropriate known in the art is used equally for the pixel confining layer 121 and insulated column 13.
Such as pixel confining layer 121 and insulated column 13 can also be organic insulating material.
It should be noted that pixel confining layer 121 and insulated column 13 with multiple openings 122 can be in same production works
It is made, such as can be formed simultaneously with multiple openings by photoetching processes such as exposure, development and etchings of same material in skill
122 pixel confining layer 121 and the insulated column 13 in pixel confining layer 121.Can also in technique twice independent shape
At, i.e., by exposure, development and etching etc. photoetching processes formed have it is multiple opening 122 pixel confining layer 121 after, lead to again
The photoetching processes such as overexposure, development and etching form insulated column 13 in pixel confining layer 121.Fig. 1 b is illustratively used two
The pixel confining layer 121 with multiple openings 122 and the insulated column in pixel confining layer 121 are independently formed in secondary technique
13。
S130, deposit forms first electrode layer in the opening.
Referring to Fig. 1 c, mask plate can be used, deposit forms first electrode layer in the opening 122 of pixel confining layer 121
14.Specifically, first electrode layer 14 can be formed in opening 122 by vapor deposition or sputtering deposit technique.
S140, luminescent layer is formed in the first electrode layer.
Referring to Fig. 1 d, can be formed in first electrode layer 14 by vapor deposition, sputtering deposit or spin-on deposition technique
Luminescent layer 15.Specifically, luminescent layer 15 can be luminous organic material.
S150, the second electrode lay is formed on the light-emitting layer.
Referring to Fig. 1 e, the second electrode lay 16 can be formed on luminescent layer 15 using evaporation process.
In the present embodiment, due to forming pixel confining layer and being formed after the insulated column in pixel confining layer
First electrode layer, compared with the prior art in be initially formed first electrode layer, re-form pixel confining layer and be located at pixel limit
Insulated column on layer can solve under the electrode quality that pixel confining layer forming process causes first electrode layer using photoetching process
The problem of drop.Such as the etching acid solution that photoetching process during preparing pixel confining layer and insulated column uses is consolidated with heating
The problem of changing quality decline (oxidation, vulcanization and the rough surface increase etc.) for causing first electrode layer.The present embodiment is in pixel
Deposit forms first electrode layer in confining layers opening, and is formed in the prior art using techniques such as film forming, exposure, development and etchings
Electrode layer not only can simplify technique, and can be to avoid the bad shadow that acid solution generates first electrode layer in etching process
It rings, such as cavity etc. is generated to first electrode layer burn into.In addition, forming the technique stream of first electrode layer in the embodiment of the present invention
Journey is adjacent with the process flow of luminescent layer is formed, therefore after deposit forms first electrode layer, the preparation of subsequent luminescent layer can also
It is formed with consecutive deposition, reduces exposure duration of the first electrode layer in external environment, solve first electrode layer because outside
The problems such as aoxidizing and vulcanize caused by single dwell course in portion's environment.Therefore display panel provided in an embodiment of the present invention
Manufacturing method improves properties of product and yield, reduces process flow, reduces production cost.
On the basis of the above embodiments, due to forming pixel confining layer 121, the 13, first electricity of separation layer on the substrate 11
Before pole layer 14, luminescent layer 15 and the second electrode lay 16, it is also possible to form other function film layer, such as some metals draw
Line.The formation of these functional film layers can cause surface irregularity, and then influence the display effect of subsequent display panel.Therefore, originally
Inventive embodiments preferably form the pixel confining layer with multiple openings in step S120, on the substrate and are located at institute
Before stating the insulated column in pixel confining layer, further includes: form planarization layer on the substrate.The material of planarization layer is also
Insulating materials.In preparation process flow, planarization layer can use individual manufacturing process.To reduce manufacturing process, improve
Production efficiency can also in same manufacture craft by same material be made planarization layer and with it is multiple opening 122 pixel limit
Given layer 121.Further, it is also possible to which planarization layer, the picture with multiple openings 122 is made by same material in same manufacture craft
Plain confining layers 121, and the insulated column 13 in pixel confining layer 121.
In an embodiment of the present embodiment, referring to fig. 2, first electrode layer 15 is metallic reflector, can be used
The high material of magnesium silver isoreflectance.The second electrode lay 16 is transparency conducting layer, concretely Indium-tin Oxide Transparent Conductive Film.Due to
Metallic reflector has the function of reflected light, the light that luminescent layer 15 generates, after the reflection of first electrode layer 14, from second electrode
Layer 16 projects.Arrow in figure represents the light emission direction of display panel.As shown in Figure 2, display panel provided in this embodiment is
Emission structure at top.
In the another embodiment of the present embodiment, referring to Fig. 3, first electrode layer 14 is transparency conducting layer, described second
Electrode layer 16 is metallic reflector.Relative to the light that above-mentioned emission structure at top, luminescent layer 15 generate, reflected through the second electrode lay 16
Afterwards, it is projected from first electrode layer 14.Arrow in figure represents the light emission direction of display panel.From the figure 3, it may be seen that the present embodiment provides
Display panel be bottom emitting structure.
Planarization layer 17 is illustratively shown in Fig. 2 and Fig. 3.
It is shown it should be noted that the manufacturing method of display panel provided in an embodiment of the present invention can prepare active OLED
Panel can also prepare passive type OLED display panel.
Fig. 4 a is that the structure for the passive type display panel that display panel manufacturing method provided in an embodiment of the present invention is formed is shown
It is intended to.Fig. 4 b is the flow diagram of the manufacturing method of passive type display panel shown in Fig. 4 a.Fig. 4 c- Fig. 4 e is aobvious in Fig. 4 b
Show the schematic diagram of each step counter structure of the production method of panel.Display panel structure in a referring to fig. 4, with above-described embodiment
Unlike, first electrode layer 14 includes multiple first sub-electrodes 141 arranged in parallel.The second electrode lay 16 includes multiple parallel
The second sub electrode 161 of arrangement, the first sub-electrode 141 and the insulation of the second sub electrode 161 intersect.B referring to fig. 4, this method
Specifically comprise the following steps:
S210, substrate is provided.
S220, planarization layer is formed on the substrate.
S230, the pixel confining layer with multiple openings is formed on the planarization layer and is located at pixel restriction
Insulated column on layer.
C referring to fig. 4 is formed after planarization layer 17 on the substrate 11, and being formed on planarization layer 17 has multiple openings
122 pixel confining layer 121, and the insulated column 13 in pixel confining layer 121.
S240, deposit forms first electrode layer in the opening, wherein the first electrode layer includes multiple parallels
First sub-electrode of column.
D referring to fig. 4, deposit forms first electrode layer 14, the first electrode layer 14 of formation in the opening of pixel confining layer
Including multiple first sub-electrodes 141 arranged in parallel.
S250, luminescent layer is formed in the first electrode layer.
E referring to fig. 4 forms luminescent layer 15 in first electrode layer 14.
S260, the second electrode lay is formed on the light-emitting layer, wherein the second electrode lay includes multiple arranged in parallel
Two sub-electrodes.
A referring to fig. 4, forms the second electrode lay 16 on luminescent layer 15, and the second electrode lay 16 of formation includes multiple parallel
The second sub electrode 161 of arrangement.First sub-electrode 141 and 161 cross arrangement of second sub electrode.
In the passive type display panel that the above method is formed, display panel includes N row second sub electrode and M column the first son electricity
Pole (5 row second sub electrodes and 5 the first sub-electrodes of column are illustratively arranged in Fig. 4 a).By the way of progressive scan, cyclically give
Every row second electrode applies pulse, while applying drive current to all the first sub-electrodes of column, to realize pixel line by line
Display.
Fig. 5 a is that the structure for the active display panel that display panel manufacturing method provided in an embodiment of the present invention is formed is shown
It is intended to.Fig. 5 b is the flow diagram of the manufacturing method of active display panel shown in Fig. 5 a.Fig. 5 c- Fig. 5 h is aobvious in Fig. 5 b
Show the sectional view of each step counter structure of the production method of panel.
Referring to Fig. 5 a, unlike the display panel structure in above-described embodiment, active display panel further include
Transistor array 18 is formed on the substrate.First sub-electrode 141 of first electrode layer 14 including matrix arrangement, and every 1 the
One sub-electrode 141 is electrically connected with a transistor.The second electrode lay 16 is plane-shape electrode (hardware and software platform layer, pixel confining layer and isolation
Column is not shown).Referring to Fig. 5 b, this method specifically comprises the following steps:
S310, substrate is provided.
S320, transistor array is formed on the substrate.
Referring to Fig. 5 c, transistor array 18 can be formed using photoetching process on the substrate 11.
S330, planarization layer is formed in the transistor array.
Referring to Fig. 5 d, planarization layer 17 is formed in transistor array 18.
S340, the pixel confining layer with multiple openings is formed on the planarization layer and is located at pixel restriction
Insulated column on layer.
Referring to Fig. 5 e, can be formed by photoetching processes such as exposure, development and etchings in planarization layer 17 has multiple open
The pixel confining layer 121 of mouth 122 and the insulated column 13 in pixel confining layer 121.
S350, deposit forms first electrode layer in the opening, wherein the first electrode layer includes matrix arrangement
The first sub-electrode, and each first sub-electrode is electrically connected with a transistor.
Referring to Fig. 5 f, deposit forms first electrode layer 14 in pixel confining layer opening 122.First electrode layer 14 includes square
First sub-electrode 141 of configuration arrangement.Every one first sub-electrode 141 passes through via hole and transistor company on planarization layer 17
It connects.
S360, luminescent layer is formed in the first electrode layer.
Referring to Fig. 5 g, luminescent layer 15 is formed in first electrode layer 14.
S370, the second electrode lay is formed on the light-emitting layer, the second electrode lay is plane-shape electrode.
Referring to Fig. 5 h, the second electrode lay 16 is formed on luminescent layer 15, the second electrode lay 16 is plane-shape electrode
In the active display panel that the above method is formed, the first sub-electrode in the opening 122 of each pixel confining layer 121
A 141 corresponding pixel units, by controlling opening and disconnecting for each transistor, to the first sub-electrode being connect with transistor
141 apply driving current, and the corresponding pixel unit of opening 122 of control pixel confining layer 121 issues the light of corresponding color, can
Each first sub-electrode 141 is independently adjusted and be controlled.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that
The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation,
It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out by above embodiments to the present invention
It is described in further detail, but the present invention is not limited to the above embodiments only, without departing from the inventive concept, also
It may include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.