CN105900345A - Signal processing circuit - Google Patents
Signal processing circuit Download PDFInfo
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- CN105900345A CN105900345A CN201480034149.XA CN201480034149A CN105900345A CN 105900345 A CN105900345 A CN 105900345A CN 201480034149 A CN201480034149 A CN 201480034149A CN 105900345 A CN105900345 A CN 105900345A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/54—Systems for transmission via power distribution lines
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Abstract
Disclosed in the present invention is a signal processing circuit, comprising: an AD/VD digital front end, a G.fast digital front end, a first switching circuit, a second switching circuit, a first drive circuit, a first hybrid circuit and a first transformer. The AD/VD digital front end and the G.fast digital front end are respectively connected to one end of the first switching circuit and one end of the second switching circuit, and the other end of the first switching circuit is connected to one end of the first drive circuit, and the other end of the first drive circuit is connected to one end of the first hybrid circuit, and the other end of the second switching circuit is connected to the other end of the first hybrid circuit, and the other end of the first hybrid circuit is connected to one end of the first transformer. The circuit can make two different service models of G.fast and VDSL2 to coexist in the same cable, and can use high-frequency and low-frequency to jointly carry the service, improving service efficiency. The circuit has a simple structure and the device is small in quantity and size, and is convenient to arrange.
Description
The present invention relates to the communications field, more particularly to a kind of signal processing circuit.
The G.Fast frequency spectrum range of definition is 2.2M~106M and 2.2M~212M, is time division multiplexing (TDD), the VDSL2 frequency spectrum range of definition is 25k~8.8M/17.664M/30M, is frequency division multiplexing pattern (FDD).When being laid to G.Fast, the user having in same cable may be also in the business using VDSL2, again because G.fast and VDSL2 are two kinds of different business models, their character rate, frequency band range, Tone space is different from, it is impossible to carry out Vector counteractings, in the prior art, to avoid both mutual crosstalks in same cable, as shown in figure 1, G.fast needs to remove VDSL2 frequency range, high band bearer service is only used, this mode causes service rate to be greatly reduced.
The content of the invention
The embodiment of the present invention provides a kind of signal processing circuit, and two kinds of different business models of G.fast and VDSL2 can coexist in same cable for the circuit, and low frequency and the common bearer service of high frequency can be used, and improves business efficiency.
In a first aspect, the embodiment of the present invention provides a kind of signal processing circuit, including：AD/VD digital front-ends, G.fast digital front-ends, the first change-over circuit, the second change-over circuit, the first drive circuit and the first hybrid circuit, the first transformer, wherein,
The AD/VD digital front-ends and the G.fast digital front-ends respectively with first change-over circuit
One end is connected with one end of the second change-over circuit, the other end of first change-over circuit is connected with one end of first drive circuit, the other end of first drive circuit is connected with the other end of first hybrid circuit, the other end of second change-over circuit is connected with one end of first hybrid circuit, and the other end of first hybrid circuit is connected with one end of first transformer.
With reference in a first aspect, in the first possible implementation of first aspect, first change-over circuit includes：First low pass filter, the first digital analog converter, the first variable gain amplifier and adder, wherein,
One end of first low pass filter is connected with the AD/VD digital front-ends, the other end of first low pass filter is connected with one end of the adder, the other end of the adder is connected with one end of first digital analog converter, one end of the adder is connected with the G.fast digital front-ends, one end of first digital analog converter is also connected with the G.fast digital front-ends, the other end of first digital analog converter is connected with one end of first digital analog converter, the other end of first digital analog converter is connected with one end of first variable gain amplifier.
With reference in a first aspect, in second of possible implementation of first aspect, second change-over circuit includes：Second low pass filter, the 3rd low pass filter, the first A-D converter, the second A-D converter, the first programmable gain amplifier, the second programmable gain amplifier and the first high-pass filter, wherein,
One end of second low pass filter is connected with the AD/VD digital front-ends, the second low pass filter other end is connected with one end of first A-D converter, the other end of first A-D converter is connected with one end of first programmable gain amplifier, 3rd low pass filter described in the other end of first programmable gain amplifier is connected, one end of second A-D converter is connected with the G.fast digital front-ends, the other end of second A-D converter is connected with one end of second programmable gain amplifier, one end phase of the other end of second programmable gain amplifier and first high-pass filter
Even.
With reference in a first aspect, or first aspect second of possible implementation, in the third possible embodiment of first aspect, second programmable gain amplifier, including：Low-noise amplifier, first resistor/capacitance network, second resistance/capacitance network and 3rd resistor/capacitance network, wherein：
The low-noise amplifier is in parallel with the first resistor/capacitance network, one end of the low-noise amplifier is connected with the other end of second analog-digital converter, the other end of the low-noise amplifier is connected with one end of the second resistance/capacitance network, or be connected with one end of the 3rd resistor/capacitance network, the other end of the second resistance/capacitance network is connected with one end of first high-pass filter, and the other end of the 3rd resistor/capacitance network is connected with one end of first hybrid circuit.
With reference to first aspect, or in the third possible embodiment of first aspect, in the 4th kind of possible embodiment of first aspect, the other end of the 3rd resistor/capacitance network is connected with one end of the attenuation network, and the other end of the attenuation network is connected with the other end of first hybrid circuit.
With reference in a first aspect, or first aspect the first possible implementation, in the 5th kind of possible implementation of first aspect, first change-over circuit also includes：Second digital analog converter, the second variable gain amplifier, the 4th low pass filter, the second high-pass filter, wherein,
One end of second digital analog converter with the first low pass filter the other end be connected, the other end of second digital analog converter is connected with one end of second variable gain amplifier, the other end of second variable gain amplifier is connected with one end of the 4th low pass filter, one end of second high-pass filter is connected with the other end of first variable gain amplifier, the other end of the 4th low pass filter and the other end combining of second high-pass filter.
With reference in a first aspect, and first aspect the first possible implementation, in the 6th kind of possible implementation of first aspect, in addition to：Second hybrid circuit, wherein,
The other end of first high-pass filter is connected with one end of second hybrid circuit, and the other end of second hybrid circuit is connected with one end of first transformer, and the another end of second hybrid circuit is connected with one end of first hybrid circuit.
With reference in a first aspect, in the 7th kind of possible implementation of first aspect, in addition to：Second drive circuit, the 3rd hybrid circuit and the second transformer, wherein,
One end of second drive circuit is connected with the other end of first change-over circuit, and the other end of second drive circuit is connected with one end of the 3rd hybrid circuit, and the other end of the 3rd hybrid circuit is connected with second transformer.
With reference to the first possible implementation of first aspect, in the 8th kind of possible implementation of first aspect, first change-over circuit also includes：Second digital analog converter and the second variable gain amplifier, wherein,
One end of second digital analog converter is connected with the other end of first low pass filter, and the other end of second digital analog converter is connected with one end of second variable gain amplifier.
With reference to the 5th kind of possible implementation of first aspect, in the 9th kind of possible implementation of first aspect, in addition to：Second drive circuit, the 3rd hybrid circuit and the second transformer, wherein,
One end of second drive circuit is connected with the other end of the 4th low pass filter, and the other end of second drive circuit is connected with one end of the 3rd hybrid circuit, and the other end of the 3rd hybrid circuit is connected with one end of second transformer.
With reference to the 8th kind of possible implementation of the 6th kind of possible implementation of first aspect, or first aspect, in the tenth kind of possible implementation of first aspect, in addition to：Second drive circuit, the 3rd hybrid circuit and the second transformer, wherein,
One end of second drive circuit is connected with the other end of second variable gain amplifier, described
The other end of second drive circuit is connected with one end of the 3rd hybrid circuit, and the other end of the 3rd hybrid circuit is connected with one end of second transformer.
Signal processing circuit provided in an embodiment of the present invention, two kinds of different business models of G.fast and VDSL2 can coexist in same cable for the circuit, and low frequency and the common bearer service of high frequency can be used, improve business efficiency, the circuit structure is simple, the few size of number of devices is small, is convenient for layout.
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, the required accompanying drawing used in embodiment or description of the prior art will be briefly described below, apparently, drawings in the following description are some embodiments of the present invention, for those of ordinary skill in the art, on the premise of not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is prior art G.fast and VDSL2 frequency range schematic diagrames；
Fig. 2 is first embodiment of the invention signal processing circuit structure schematic diagram；
Fig. 3 is first embodiment of the invention low pass filter and circuit of high pass filter structural representation；
Fig. 4 is first embodiment of the invention G.fast Only mode circuit structural representations；
Fig. 5 is another G.fast Only mode circuit structural representations of first embodiment of the invention；
Fig. 6 is second embodiment of the invention signal processing circuit structure schematic diagram；
Fig. 7 is third embodiment of the invention signal processing circuit structure schematic diagram；
Fig. 8 is a kind of signal processing circuit structure schematic diagram of fourth embodiment of the invention；
Fig. 9 is another signal processing circuit structure schematic diagram of fourth embodiment of the invention；
Figure 10 is fifth embodiment of the invention signal processing circuit structure schematic diagram；
Figure 11 is sixth embodiment of the invention signal processing circuit structure schematic diagram.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is a part of embodiment of the invention, rather than whole embodiments.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art are obtained under the premise of creative work is not made belongs to the scope of protection of the invention.
Fig. 2 is referred to, is first embodiment of the invention signal processing circuit structure schematic diagram, including：AD/VD digital front-ends 10, G.fast digital front-ends 20, the first change-over circuit 11, the second change-over circuit 21, the first drive circuit 12 and the first hybrid circuit 13, the first transformer 14, wherein,
AD/VD digital front-ends 10 and G.fast digital front-ends 20 are connected with one end of the first change-over circuit 11 and one end of the second change-over circuit 21 respectively, the other end of first change-over circuit 12 is connected with one end of the first drive circuit 12, the other end of first drive circuit 12 is connected with one end of the first hybrid circuit 13, the other end of second change-over circuit 21 is connected with one end of the first hybrid circuit 13, and the other end of the first hybrid circuit 13 is connected with the first transformer 14.
First change-over circuit 11 includes：First low pass filter, the first digital analog converter, the first variable gain amplifier and adder, wherein,
One end of first low pass filter is connected with the AD/VD digital front-ends, the other end of first low pass filter is connected with one end of the adder, the other end of the adder is connected with one end of first digital analog converter, one end of the adder is connected with the G.fast digital front-ends, one end of first digital analog converter is also connected with the G.fast digital front-ends, the other end of first digital analog converter is connected with one end of first digital analog converter, the other end of first digital analog converter is connected with one end of first variable gain amplifier.
Second change-over circuit 21 includes：Second low pass filter, the 3rd low pass filter, the first mould
A/D converter, the second A-D converter, the first programmable gain amplifier, the second programmable gain amplifier and the first high-pass filter, wherein,
One end of second low pass filter is connected with the AD/VD digital front-ends, the second low pass filter other end is connected with one end of first A-D converter, the other end of first A-D converter is connected with one end of first programmable gain amplifier, 3rd low pass filter described in the other end of first programmable gain amplifier is connected, one end of second A-D converter is connected with the G.fast digital front-ends, the other end of second A-D converter is connected with one end of second programmable gain amplifier, the other end of second programmable gain amplifier is connected with one end of first high-pass filter.
It should be appreciated that the first hybrid circuit 13 has the characteristic of Echo Cancellation, send signal and decay after the first hybrid circuit 13, therefore wave filter can simplify design, the device size of circuit is small, quantity is few, facilitates and is laid out, reduces the power consumption and cost of circuit.
A kind of implementation of low pass filter and high-pass filter is as shown in figure 3, resistance R2197/R2198 and R2222/R2223 on the one hand can be with Hybrid circuit (Chineses：Hybrid circuit) receiving path equiva lent impedance constitute wave filter top impedance, on the other hand the resistance can reduce influencing each other between LPF and HPF, if the frequency difference of different mode wave filter can design one or more groups of low pass filters and high-pass filter, to switch over selection.
Due to supporting the port of VDSL2 and G.fast mixing applications, also G.fast Only patterns can be supported, therefore to support the Bypass of high-pass filter, a kind of implementation for supporting HPF Bypass is as shown in Figure 4：Low-noise amplifier in second programmable gain amplifier can be selected by the signal of high-pass filter or not by the original full range band signal of high-pass filter.
Certainly, in the other embodiment of the embodiment of the present invention, G.fast Only patterns are supported to have
Scheme as shown in Figure 5, Fig. 5 is that attenuation network is added on the basis of Fig. 4.
Signal processing circuit provided in an embodiment of the present invention, two kinds of different business models of G.fast and VDSL2 can coexist in same cable for the circuit, and low frequency and the common bearer service of high frequency can be used, improve business efficiency, the circuit structure is simple, the few size of number of devices is small, is convenient for layout.
Fig. 6 is referred to, is second embodiment of the invention signal processing circuit structure schematic diagram, Fig. 6 is Fig. 2 optimization, in addition to including the structure shown in Fig. 2, in addition to：
First change-over circuit 11 also includes：Second digital analog converter, second variable gain amplifier, 4th low pass filter, second high-pass filter, wherein, one end of second digital analog converter with the other end of the first low pass filter be connected, the other end of second digital analog converter is connected with one end of second variable gain amplifier, the other end of second variable gain amplifier is connected with one end of the 4th low pass filter, one end of second high-pass filter is connected with the other end of first variable gain amplifier, the other end of 4th low pass filter and the other end combining of second high-pass filter.
Signal processing circuit provided in an embodiment of the present invention, two kinds of different business models of G.fast and VDSL2 can coexist in same cable for the circuit, and low frequency and the common bearer service of high frequency can be used, improve business efficiency, the circuit structure is simple, the few size of number of devices is small, is convenient for layout.
Refer to Fig. 7, be circuit in third embodiment of the invention signal processing circuit structure schematic diagram, Fig. 7 be Fig. 2 circuits optimization, the circuit in Fig. 7 can improve VDSL2 transmit power, in addition to the structure shown in Fig. 2, in addition to：Second hybrid circuit 22, wherein,
The other end of first high-pass filter is connected with one end of second hybrid circuit 22, the other end of second hybrid circuit 22 is connected with one end of first transformer, and the another end of second hybrid circuit 22 is connected with one end of first hybrid circuit 13.
It is understood that, such scheme can support VDSL2 and G.fast mixed mode, pure VDSL2
Pattern and pure G.fast patterns (HPF Bypass).Line Driver, VDSL2 are shared due to G.fast and VDSL2 transmit power is substandard to be required, but uses G.fast user all closer from a distance from equipment, therefore VDSL2 transmit powers are slightly lower can also meet the bandwidth demand of user.
Signal processing circuit provided in an embodiment of the present invention, two kinds of different business models of G.fast and VDSL2 can coexist in same cable for the circuit, and low frequency and the common bearer service of high frequency can be used, improve business efficiency, the circuit structure is simple, the few size of number of devices is small, is convenient for layout.
In addition, scheme such as Fig. 8 of another raising VDSL2 of embodiment of the present invention transmit power shows, also include on the basis of Fig. 2：Second drive circuit 15, the 3rd hybrid circuit 23 and the second transformer 24, wherein,
One end of second drive circuit 15 is connected with the other end of first change-over circuit 11, the other end of second drive circuit 15 is connected with one end of the 3rd hybrid circuit 23, and the other end of the 3rd hybrid circuit 23 is connected with second transformer 24.
As shown in figure 9, working as user needs to be operated in pure VDSL2 patterns, and when needing the big transmit power of standard, the first programmable gain amplifier in the second change-over circuit 21 is connected with the 3rd hybrid circuit 23, you can obtain the VDSL2 of standard transmit power.
Signal processing circuit provided in an embodiment of the present invention, two kinds of different business models of G.fast and VDSL2 can coexist in same cable for the circuit, and low frequency and the common bearer service of high frequency can be used, improve business efficiency, the circuit structure is simple, the few size of number of devices is small, is convenient for layout.
Figure 10 is referred to, is fifth embodiment of the invention signal processing circuit structure schematic diagram, on the basis of Fig. 6 structure, in addition to：Second drive circuit 15, the 3rd hybrid circuit 23 and the second transformer 24, wherein,
One end of second drive circuit 15 is connected with the other end of the 4th low pass filter, described
The other end of second drive circuit 15 is connected with one end of the 3rd hybrid circuit 23, and the other end of the 3rd hybrid circuit 23 is connected with one end of second transformer 24.
Figure 11 is referred to, is sixth embodiment of the invention signal processing circuit structure schematic diagram, on the basis of Fig. 7 structures, in addition to：Second drive circuit 15, the 3rd hybrid circuit 23 and the second transformer 24, wherein,
One end of second drive circuit 15 is connected with the other end of second variable gain amplifier, the other end of second drive circuit 15 is connected with one end of the 3rd hybrid circuit 23, and the other end of the 3rd hybrid circuit 23 is connected with one end of second transformer 24.
In addition, the first change-over circuit 11 needs to include in the embodiment of the present invention：：Second digital analog converter and the second variable gain amplifier, wherein,
One end of second digital analog converter is connected with the other end of first low pass filter, and the other end of second digital analog converter is connected with one end of second variable gain amplifier.
It should be appreciated that when needing the big transmit power of standard, the first programmable gain amplifier can be connected with the 3rd hybrid circuit 23, and the other end of the second programmable gain amplifier is connected with the second hybrid circuit 22.
Signal processing circuit provided in an embodiment of the present invention, two kinds of different business models of G.fast and VDSL2 can coexist in same cable for the circuit, and low frequency and the common bearer service of high frequency can be used, improve business efficiency, the circuit structure is simple, the few size of number of devices is small, is convenient for layout.
Obviously, those skilled in the art can carry out various changes and modification to the present invention without departing from the spirit and scope of the present invention.These modifications and variations of the present invention belong within the scope of the claims in the present invention and its equivalent technologies, then the present invention is also intended to comprising including these changes and modification.
Claims (11)
- A kind of signal processing circuit, it is characterised in that including：AD/VD digital front-ends, G.fast digital front-ends, the first change-over circuit, the second change-over circuit, the first drive circuit and the first hybrid circuit, the first transformer, wherein,The AD/VD digital front-ends and the G.fast digital front-ends are connected with one end of first change-over circuit and one end of the second change-over circuit respectively, the other end of first change-over circuit is connected with one end of first drive circuit, the other end of first drive circuit is connected with one end of first hybrid circuit, the other end of second change-over circuit is connected with the other end of first hybrid circuit, and the other end of first hybrid circuit is connected with one end of first transformer.
- Signaling conversion circuit as claimed in claim 1, it is characterised in that first change-over circuit includes：First low pass filter, the first digital analog converter, the first variable gain amplifier and adder, wherein,One end of first low pass filter is connected with the AD/VD digital front-ends, the other end of first low pass filter is connected with one end of the adder, the other end of the adder is connected with one end of first digital analog converter, one end of the adder is connected with the G.fast digital front-ends, one end of first digital analog converter is also connected with the G.fast digital front-ends, the other end of first digital analog converter is connected with one end of first digital analog converter, the other end of first digital analog converter is connected with one end of first variable gain amplifier.
- Signaling conversion circuit as claimed in claim 1, it is characterised in that second change-over circuit Including：Second low pass filter, the 3rd low pass filter, the first A-D converter, the second A-D converter, the first programmable gain amplifier, the second programmable gain amplifier and the first high-pass filter, wherein,One end of second low pass filter is connected with the AD/VD digital front-ends, the second low pass filter other end is connected with one end of first A-D converter, the other end of first A-D converter is connected with one end of first programmable gain amplifier, 3rd low pass filter described in the other end of first programmable gain amplifier is connected, one end of second A-D converter is connected with the G.fast digital front-ends, the other end of second A-D converter is connected with one end of second programmable gain amplifier, the other end of second programmable gain amplifier is connected with one end of first high-pass filter.
- Signaling conversion circuit as claimed in claim 3, it is characterised in that second programmable gain amplifier, including：Low-noise amplifier, first resistor/capacitance network, second resistance/capacitance network and 3rd resistor/capacitance network, wherein：The low-noise amplifier is in parallel with the first resistor/capacitance network, one end of the low-noise amplifier is connected with the other end of second analog-digital converter, the other end of the low-noise amplifier is connected with one end of the second resistance/capacitance network, or be connected with one end of the 3rd resistor/capacitance network, the other end of the second resistance/capacitance network is connected with one end of first high-pass filter, and the other end of the 3rd resistor/capacitance network is connected with one end of first hybrid circuit.
- Signaling conversion circuit described in claim 4, it is characterised in that also include：The other end of the 3rd resistor/capacitance network is connected with one end of the attenuation network, and the other end of the attenuation network is connected with the other end of first hybrid circuit.
- Signaling conversion circuit as claimed in claim 2, it is characterised in that first change-over circuit also includes：Second digital analog converter, the second variable gain amplifier, the 4th low pass filter, the second high-pass filter, wherein,One end of second digital analog converter with the first low pass filter the other end be connected, the other end of second digital analog converter is connected with one end of second variable gain amplifier, the other end of second variable gain amplifier is connected with one end of the 4th low pass filter, one end of second high-pass filter is connected with the other end of first variable gain amplifier, the other end of the 4th low pass filter and the other end combining of second high-pass filter.
- Signaling conversion circuit as claimed in claim 1 or 2, it is characterised in that also include：Second hybrid circuit, wherein,The other end of first high-pass filter is connected with one end of second hybrid circuit, and the other end of second hybrid circuit is connected with one end of first transformer, and the another end of second hybrid circuit is connected with one end of first hybrid circuit.
- Signaling conversion circuit as claimed in claim 1, it is characterised in that also include：Second drive circuit, the 3rd hybrid circuit and the second transformer, wherein,One end of second drive circuit is connected with the other end of first change-over circuit, and the other end of second drive circuit is connected with one end of the 3rd hybrid circuit, and the other end of the 3rd hybrid circuit is connected with second transformer.
- Signaling conversion circuit as claimed in claim 2, it is characterised in that first change-over circuit is also Including：Second digital analog converter and the second variable gain amplifier, wherein,One end of second digital analog converter is connected with the other end of first low pass filter, and the other end of second digital analog converter is connected with one end of second variable gain amplifier.
- Signaling conversion circuit as claimed in claim 6, it is characterised in that also include：Second drive circuit, the 3rd hybrid circuit and the second transformer, wherein,One end of second drive circuit is connected with the other end of the 4th low pass filter, and the other end of second drive circuit is connected with one end of the 3rd hybrid circuit, and the other end of the 3rd hybrid circuit is connected with one end of second transformer.
- Signaling conversion circuit as described in claim 7 or 9, it is characterised in that also include：Second drive circuit, the 3rd hybrid circuit and the second transformer, wherein,One end of second drive circuit is connected with the other end of second variable gain amplifier, the other end of second drive circuit is connected with one end of the 3rd hybrid circuit, and the other end of the 3rd hybrid circuit is connected with one end of second transformer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2014/093013 WO2016086384A1 (en) | 2014-12-04 | 2014-12-04 | Signal processing circuit |
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| CN105900345A true CN105900345A (en) | 2016-08-24 |
| CN105900345B CN105900345B (en) | 2019-04-19 |
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| CN201480034149.XA Active CN105900345B (en) | 2014-12-04 | 2014-12-04 | A kind of signal processing circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108023796A (en) * | 2018-01-12 | 2018-05-11 | 普联技术有限公司 | Customer terminal equipment, switch method of remote signal method, control device and storage medium |
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| CN109962722B (en) * | 2017-12-26 | 2021-01-05 | 华为技术有限公司 | Transmitting device and signal transmission method |
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|---|---|---|---|---|
| CN101292437A (en) * | 2005-10-03 | 2008-10-22 | 吉歌西米导体有限公司 | Multi-wideband communications over power lines |
| CN101572639A (en) * | 2008-04-30 | 2009-11-04 | 深圳华为通信技术有限公司 | Method, device and system for processing voice service |
| WO2014026617A1 (en) * | 2012-08-15 | 2014-02-20 | Huawei Technologies Co., Ltd. | Traffic-adaptive repeated transmission |
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2014
- 2014-12-04 CN CN201480034149.XA patent/CN105900345B/en active Active
- 2014-12-04 WO PCT/CN2014/093013 patent/WO2016086384A1/en active Application Filing
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101292437A (en) * | 2005-10-03 | 2008-10-22 | 吉歌西米导体有限公司 | Multi-wideband communications over power lines |
| CN101572639A (en) * | 2008-04-30 | 2009-11-04 | 深圳华为通信技术有限公司 | Method, device and system for processing voice service |
| WO2014026617A1 (en) * | 2012-08-15 | 2014-02-20 | Huawei Technologies Co., Ltd. | Traffic-adaptive repeated transmission |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108023796A (en) * | 2018-01-12 | 2018-05-11 | 普联技术有限公司 | Customer terminal equipment, switch method of remote signal method, control device and storage medium |
| CN108023796B (en) * | 2018-01-12 | 2023-05-16 | 上海联虹技术有限公司 | Client terminal device, signal switching control method, control device, and storage medium |
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| Publication number | Publication date |
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| WO2016086384A1 (en) | 2016-06-09 |
| CN105900345B (en) | 2019-04-19 |
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