CN105893151B - High-dimensional data stream processing method based on CPU + MIC heterogeneous platform - Google Patents

High-dimensional data stream processing method based on CPU + MIC heterogeneous platform Download PDF

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CN105893151B
CN105893151B CN201610198142.2A CN201610198142A CN105893151B CN 105893151 B CN105893151 B CN 105893151B CN 201610198142 A CN201610198142 A CN 201610198142A CN 105893151 B CN105893151 B CN 105893151B
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CN105893151A (en
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卢晓伟
张清
周勇
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Inspur Electronic Information Industry Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5066Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs

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Abstract

The invention discloses a processing method of high-dimensional data stream based on a CPU + MIC heterogeneous platform, which is realized by a high-performance server system loaded with an MIC coprocessor, wherein a CPU + MIC heterogeneous mixed mode is adopted for a system node, and a node at least comprises an MIC coprocessor besides a CPU chip; the CPU is the core of logic judgment and control and is responsible for serial calculation; the MIC coprocessor is dedicated to highly threaded parallel processing tasks, namely, a part with dense computation and dense data is transferred to the MIC coprocessor for computation, the data flow processing performance is optimized, and data processing is shared. Compared with the prior art, the processing method of the high-dimensional data stream based on the CPU + MIC heterogeneous platform uses the CPU and the MIC coprocessor for cooperative processing, reduces the burden of the CPU, enables the CPU to concentrate on transaction processing and serial computing with strong logicality, accelerates the speed of high-performance computing, and improves the throughput capacity of data stream processing and the overall performance of an algorithm.

Description

A kind of processing method of the High Dimensional Data Streams based on CPU+MIC heterogeneous platform
Technical field
The present invention relates to data Mining stream field, specifically a kind of high dimensional data based on CPU+MIC heterogeneous platform The processing method of stream.
Background technique
High-performance calculation is the forward position high-tech of message area, is safeguarding national security, is pushing science and techniques of defence progress, is promoting Sophisticated weapons development aspect, which has, pushes directly on effect, is the one of the important signs that for measuring a national comprehensive strength.With letter The rapid development of breathization society, requirement of the mankind to information processing capability is higher and higher, not only oil exploration, weather forecast, boat The demands high-performance calculation such as its national defence, scientific research, and finance, e-government, education, enterprise, online game etc. are more extensively Demand of the field to high-performance calculation rapidly increase.
Data flow is actually the element troop of continuous moving, and element therein is combined by the collection of related data. Enabling t indicates any time stamp, and at indicates the data that reach in the timestamp, flow data can be expressed as ..., at−1, at, at+1... is different from traditional application model, stream data model has following 4 general character: (1) data reach in real time;(2) data It is independent to reach order, is not controlled by application system;(3) data scale is grand and cannot predict its maximum value;(4) data once Processing, unless specially saving, otherwise cannot be handled by taking-up again, or is extracted data again and cost dearly.
On the basis of data flow turnsile model, the sliding data stream window mould for being suitble to High Dimensional Data Streams analysis is defined Formula.High Dimensional Data Streams ... can be defined as one on high dimensional signal X to set of real numbers mapping: X [1 ... N] →, i.e., by a height N data of dimension data stream are mapped in a column vector.It is each that some in the data flow to different moments belongs to value X The updated value of [j] ,=(j) indicate a update tuple, are meant that may be positive may also be negative, and indicate the p in moment t Renewal vector is tieed up, turnsile model is complied fully with.(X [1 ... N] is a two-dimensional array in fact) vector can only be read once, It is flowed into according to the increase of timestamp i.The sliding window pattern definition of High Dimensional Data Streams is the sequence ... comprising nearest n element, Data flow can be considered as matrix, here the only matrix on conceptual sense, not need this matrix of real materialization.When enabling expression Between window be n the higher-dimension stream matrix with p attribute, expression time window (do not lose for the higher-dimension stream matrix with q attribute of n Generality sets p≤q), indicate the ith attribute value at t-th of moment in X;Indicate the i-th row of X;Indicate the t column of X.If when T is carved, if there is no limit two data streams are asynchronous to X and Y two first group of components.If tuple X has p in moment t A value, tuple Y have q value, and each value corresponds to the inflow of an attribute value, we claim X in this case, Y to be synchronous. Temporally t is orderly for tuple, if High Dimensional Data Streams do not receive tuple at a certain moment, with sparse data stream matrix replacement, that is, complete 0 tuple replaces.
Data flow in the application fields such as finance, internet, telephonic communication record has the characteristics that high flow capacity, to data Stream process algorithm and computer hardware propose new challenge.Such as stock trend prediction, high speed network fault diagnosis, weather are pre- Many fields for needing online trend analysis such as report, High Dimensional Data Streams to be treated, dimension is usually all very high, continually to it It is unavoidable for carrying out the calculating such as the multiplying of matrix, transposition.This is undoubtedly very time-consuming.Due to data flow in practical applications Amount be it is continuous huge, so all flow data of materialization be it is unpractiaca, i.e., user in real time flows into high dimensional data More stringent requirements are proposed and challenge for the statistical continuous-query of row.Therefore it studies and improves data using the hardware resource of high speed Stream process handling capacity becomes one of big data and internet area hot issue.
Summary of the invention
Technical assignment of the invention is to provide a kind of processing method of High Dimensional Data Streams based on CPU+MIC heterogeneous platform.
Technical assignment of the invention realizes that the processing method is loaded with MIC coprocessor by one in the following manner High-performance server system realize that the system node uses CPU+MIC isomery mixed mode, remove cpu chip in node Outside, also at least contain a MIC coprocessor;
CPU is the core of logic judgment and control, and is responsible for serial computing;It is threading that MIC coprocessor is absorbed in height Parallel processing task, i.e., computation-intensive and data-intensive part is transferred on MIC coprocessor and calculates, and optimizes at data flow Rationality can be with sharing data processing.
The MIC coprocessor contains up to four.
The CPU is responsible for obtaining data from flow data source, carries out stream rate adaptation, attribute packaging and data to data Filtering, and then buffered, according to the situation after stream rate adaptation, it will be responsible for load balance and determine when start at MIC association Manage device kernel.
The MIC coprocessor is responsible for the summary data structure of storing data stream, and is constantly changed to stream compression generally Data structure is wanted, handles the data newly flowed into real time, expired data will directly be abandoned on MIC coprocessor memory;When with When family proposes inquiry request, host is responsible for calling kernel program, executes in the summary data structure in MIC coprocessor memory Search algorithm kernel, and query result is returned into host;Finally again by CPU host convert the result to user it is readable finally look into It askes result and returns to user.
Six layer architectures of described processing method point: time series data process layer, data mapping layer, data buffering layer, sliding Window layer, summary matrix abstraction, layer and query analysis process layer;
1) time series data process layer: being the tuple containing high dimension attribute for meeting some constraints of irregular stream, this layer is appointed Business is handled by CPU: data I/O and data filtering;In this layer, former data flow is handled in three times: flow velocity rate It adjusts, attribute packaging and data filtering;
Stream rate adaptation is responsible for load balance and determines when start MIC coprocessor, when the flow of data flow reaches one When set pattern mould, starting MIC coprocessor handles data stream, as a kind of means for improving Data Stream Processing performance;Often Secondary starting MIC coprocessor association processing data flow, CPU, by data exchange to MIC processor, then utilize figure with biggish piecemeal The characteristic of the intensive data computing capability of shape processor and high memory bandwidth carries out high speed processing to data stream;
Attribute packaging and data filtering are responsible for processing data stream to improve the quality of data flow, are the company of flow data Continuous inquiry and complicated analysis lay the foundation, including stream data is denoised, compressed encoding, amendment to be to reduce memory space and biography The defeated time;Temporally t is orderly for tuple in entire layer, if any High Dimensional Data Streams do not receive tuple in moment t, with complete 0 tuple replaces, i.e. permission sparse data stream matrix exists;
2) data mapping layer: CPU structure of arrays is mapped as MIC texture structure, in advance by data flow relevant for image Corresponding expression formula is established, mapping relations are established by data attribute and data texturing attribute, finds out two class data of CPU and MIC Object relationship one by one, in such a way that general-purpose computations data structure corresponds to texture in the MIC storage each attribute of texture;
3) inquiry plan buffering, the synchrodata inquiry operation workspace, data stream history of registration data buffering layer: are safeguarded The storage of summary four kinds of buffering, data stream buffer property;
4) sliding window layer: being flowed matrix and realized in a manner of queue, the high dimension attribute of queue for storing flow data, into cunning Dynamic Window layer;When updating matrix, oldest tuple is replaced with new tuple, realizes that synchronous High Dimensional Data Streams summary data structure increases Amount normalization;
5) summary matrix abstraction, layer: generating the Sketch matrix of High Dimensional Data Streams, stores the level of summary data matrix;
6) various basic queries and complicated analysis query analysis process layer: are completed;Basic query processing operation is completed general Selection, connection, projection and aggregation inquiry request;Complexity analysis processing operation is then the summary letter generated in information extraction layer On the basis of breath, the property and mutual relationship of various factors in further data stream.
A kind of processing method of High Dimensional Data Streams based on CPU+MIC heterogeneous platform of the invention compared to the prior art, It is handled using the collaboration of CPU and MIC coprocessor, alleviates the burden of CPU, it is made to focus more on the strong affairs of logicality Processing and serial computing, accelerate the speed of high-performance calculation, improve the handling capacity and algorithm overall performance of Data Stream Processing.
Specific embodiment
Embodiment 1:
The processing method of the High Dimensional Data Streams based on CPU+MIC heterogeneous platform is loaded with MIC coprocessor by one High-performance server system realizes that the system node uses CPU+MIC isomery mixed mode, and a node is interior in addition to cpu chip, Also contain 1-4 MIC coprocessor;MIC coprocessor constructs on the multiple programming principle of Intel's Xeon.It is logical It crosses and integrates numerous low-power consumption kernels, each processor core has one 512 SIMD processors and many new vectors Operational order, MIC coprocessor optimize every watt of performance.More than the computing capability of a trillion times per second, create in a core The supercomputer of on piece.MIC coprocessor be carried out under set industrial standard and programming habit multiple programming with And performance optimization, and MIC coprocessor be based on X86-based, for the classical way of traditional processing data flow, MIC coprocessor can be continued to use well, while MIC coprocessor is integrated with 61 calculating cores, and each core can open 4 Hardware thread, total can open 244 threads and be used to carry out multithreads computing, while the processing of MIC association continues to have continued to use easily In the standard programming language of understanding include C, C++ and Fortran, and existing multiple programming standard.
CPU is the core of logic judgment and control, and is responsible for serial computing;CPU is responsible for obtaining data from flow data source, Stream rate adaptation carried out to data, attribute packaging and data filtering, and then buffered, according to the situation after stream rate adaptation, It will be responsible for load balance and determine when start MIC coprocessor kernel.
MIC coprocessor is absorbed in the threading parallel processing task of height, i.e., computation-intensive and data-intensive part It is transferred on MIC coprocessor and calculates, optimize Data Stream Processing performance and sharing data processing.MIC coprocessor is responsible for storage The summary data structure of data flow, and stream compression is constantly changed to summary data structure, the data newly flowed into, mistake are handled in real time The data of phase will directly be abandoned on MIC coprocessor memory;When user proposes inquiry request, host is responsible for calling kernel journey Sequence executes search algorithm kernel in the summary data structure in MIC coprocessor memory, and query result is returned to host; Finally converting the result to the readable final query result of user by CPU host again returns to user.
Six layer architectures of described processing method point: time series data process layer, data mapping layer, data buffering layer, sliding Window layer, summary matrix abstraction, layer and query analysis process layer;
1) time series data process layer: being the tuple containing high dimension attribute for meeting some constraints of irregular stream, this layer is appointed Business is handled by CPU: data I/O and data filtering;In this layer, former data flow is handled in three times: flow velocity rate It adjusts, attribute packaging and data filtering;
Stream rate adaptation is responsible for load balance and determines when start MIC coprocessor, when the flow of data flow reaches one When set pattern mould, starting MIC coprocessor handles data stream, as a kind of means for improving Data Stream Processing performance;Often Secondary starting MIC coprocessor association processing data flow, CPU, by data exchange to MIC processor, then utilize figure with biggish piecemeal The characteristic of the intensive data computing capability of shape processor and high memory bandwidth carries out high speed processing to data stream;
Attribute packaging and data filtering are responsible for processing data stream to improve the quality of data flow, are the company of flow data Continuous inquiry and complicated analysis lay the foundation, including stream data is denoised, compressed encoding, amendment to be to reduce memory space and biography The defeated time;Temporally t is orderly for tuple in entire layer, if any High Dimensional Data Streams do not receive tuple in moment t, with complete 0 tuple replaces, i.e. permission sparse data stream matrix exists;
2) data mapping layer: CPU structure of arrays is mapped as MIC texture structure, in advance by data flow relevant for image Corresponding expression formula is established, mapping relations are established by data attribute and data texturing attribute, finds out two class data of CPU and MIC Object relationship one by one, in such a way that general-purpose computations data structure corresponds to texture in the MIC storage each attribute of texture;
3) inquiry plan buffering, the synchrodata inquiry operation workspace, data stream history of registration data buffering layer: are safeguarded The storage of summary four kinds of buffering, data stream buffer property;
4) sliding window layer: being flowed matrix and realized in a manner of queue, the high dimension attribute of queue for storing flow data, into cunning Dynamic Window layer;When updating matrix, oldest tuple is replaced with new tuple, realizes that synchronous High Dimensional Data Streams summary data structure increases Amount normalization;
5) summary matrix abstraction, layer: generating the Sketch matrix of High Dimensional Data Streams, stores the level of summary data matrix;
6) various basic queries and complicated analysis query analysis process layer: are completed;Basic query processing operation is completed general Selection, connection, projection and aggregation inquiry request;Complexity analysis processing operation is then the summary letter generated in information extraction layer On the basis of breath, the property and mutual relationship of various factors in further data stream.
MIC (Many Integrated Cores), i.e. MIC coprocessor.
The technical personnel in the technical field can readily realize the present invention with the above specific embodiments,.But it answers Work as understanding, the present invention is not limited to above-mentioned several specific embodiments.On the basis of the disclosed embodiments, the technology The technical staff in field can arbitrarily combine different technical features, to realize different technical solutions.

Claims (4)

1. a kind of processing method of the High Dimensional Data Streams based on CPU+MIC heterogeneous platform, which is characterized in that the processing method passes through One high-performance server system for being loaded with MIC coprocessor realizes that the system node uses CPU+MIC isomery mixed mode, In one node in addition to cpu chip, also at least contain a MIC coprocessor;
CPU is the core of logic judgment and control, and is responsible for serial computing;MIC coprocessor be absorbed in height it is threading and Row processing task, i.e., computation-intensive and data-intensive part are transferred on MIC coprocessor and calculate, and optimize Data Stream Processing It can be with sharing data processing;
Described processing method passes through the realization of six layer architectures, six layer architectures are as follows: time series data process layer, data mapping Layer, data buffering layer, sliding window layer, summary matrix abstraction, layer and query analysis process layer;
1) time series data process layer: the task of this layer is handled by CPU: data I/O and data filtering;In this layer In, former data flow is handled in three times: stream rate adaptation, attribute packaging and data filtering;
Stream rate adaptation is responsible for load balance and determines when start MIC coprocessor, when the flow of data flow reaches a set pattern When mould, starting MIC coprocessor handles data stream, as a kind of means for improving Data Stream Processing performance;It opens every time Dynamic MIC coprocessor association processing data flow, CPU with biggish piecemeal by data exchange to MIC processor, then utilize at MIC The characteristic for managing device intensive data computing capability and high memory bandwidth carries out high speed processing to data stream;
Attribute packaging and data filtering are responsible for processing data stream to improve the quality of data flow, including stream data carries out Denoising, compressed encoding, amendment are to reduce memory space and transmission time;Temporally t is orderly for tuple in entire layer, if any High Dimensional Data Streams do not receive tuple in moment t, then are replaced with the tuple of full 0, i.e. permission sparse data stream matrix exists;
2) data mapping layer: CPU structure of arrays is mapped as MIC texture structure by data flow relevant for image, is established in advance Corresponding expression formula establishes mapping relations by data attribute and data texturing attribute, finds out CPU and two class data of MIC one by one Corresponding relationship, in cpu data structure mapping to MIC texture, to store each attribute on MIC;
3) data buffer storage layer: a few class bufferings of major maintenance, inquiry plan buffering, the work of synchrodata inquiry operation including registration The storage of four kinds of properties such as area, data stream history summary buffering, data stream buffer;
4) sliding window layer: being flowed matrix and realized in a manner of queue, the high dimension attribute of queue for storing flow data, into sliding window Mouth layer;When updating matrix, oldest tuple is replaced with new tuple, realizes that synchronous High Dimensional Data Streams summary data structure increment is returned One changes;
5) summary matrix abstraction, layer: generating the Sketch matrix of High Dimensional Data Streams, stores the level of summary data matrix;
6) various basic queries and complicated analysis query analysis process layer: are completed;Basic query processing operation completes general choosing The inquiry request selected, connect, project and assembled;Complexity analysis processing operation is then the summary info base generated in information extraction layer On plinth, the property and mutual relationship of various factors in further data stream.
2. a kind of processing method of High Dimensional Data Streams based on CPU+MIC heterogeneous platform according to claim 1, feature It is, the MIC coprocessor contains up to four.
3. a kind of processing method of High Dimensional Data Streams based on CPU+MIC heterogeneous platform according to claim 1, feature It is, the CPU is responsible for obtaining data from flow data source, carries out stream rate adaptation, attribute packaging and data mistake to data Filter, and then buffered, according to the situation after stream rate adaptation, it will be responsible for load balance and determine when start the processing of MIC association Device kernel.
4. a kind of processing method of High Dimensional Data Streams based on CPU+MIC heterogeneous platform according to claim 1, feature It is, the MIC coprocessor is responsible for the summary data structure of storing data stream, and stream compression is constantly changed to summary number According to structure, the data newly flowed into are handled in real time, and expired data will directly be abandoned on MIC coprocessor memory;When user mentions Out when inquiry request, host is responsible for calling kernel program, executes inquiry in the summary data structure in MIC coprocessor memory Algorithm kernel, and query result is returned into host;Finally the readable final inquiry of user is converted the result to by CPU host again to tie Fruit returns to user.
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CN106383746A (en) * 2016-08-30 2017-02-08 北京航空航天大学 Configuration parameter determination method and apparatus of big data processing system
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102902655A (en) * 2012-09-13 2013-01-30 浪潮(北京)电子信息产业有限公司 Information processing heterogeneous system
CN103049329A (en) * 2012-11-22 2013-04-17 浪潮电子信息产业股份有限公司 High-efficiency system based on central processing unit (CPU)/many integrated core (MIC) heterogeneous system structure
CN103279391A (en) * 2013-06-09 2013-09-04 浪潮电子信息产业股份有限公司 Load balancing optimization method based on CPU (central processing unit) and MIC (many integrated core) framework processor cooperative computing
CN103279446A (en) * 2013-06-09 2013-09-04 浪潮电子信息产业股份有限公司 Isomerism mixed calculation multi-platform system using central processing unit (CPU)+graphic processing unit (GPU)+many integrated core (MIC)
CN103324531A (en) * 2013-06-09 2013-09-25 浪潮电子信息产业股份有限公司 Large eddy simulation method based on Boltzmann theory central processing unit (CPU)/ many integrated core (MIC) cooperative computing
CN104408019A (en) * 2014-10-29 2015-03-11 浪潮电子信息产业股份有限公司 Method for realizing GMRES (generalized minimum residual) algorithm parallel acceleration on basis of MIC (many integrated cores) platform

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102902655A (en) * 2012-09-13 2013-01-30 浪潮(北京)电子信息产业有限公司 Information processing heterogeneous system
CN103049329A (en) * 2012-11-22 2013-04-17 浪潮电子信息产业股份有限公司 High-efficiency system based on central processing unit (CPU)/many integrated core (MIC) heterogeneous system structure
CN103279391A (en) * 2013-06-09 2013-09-04 浪潮电子信息产业股份有限公司 Load balancing optimization method based on CPU (central processing unit) and MIC (many integrated core) framework processor cooperative computing
CN103279446A (en) * 2013-06-09 2013-09-04 浪潮电子信息产业股份有限公司 Isomerism mixed calculation multi-platform system using central processing unit (CPU)+graphic processing unit (GPU)+many integrated core (MIC)
CN103324531A (en) * 2013-06-09 2013-09-25 浪潮电子信息产业股份有限公司 Large eddy simulation method based on Boltzmann theory central processing unit (CPU)/ many integrated core (MIC) cooperative computing
CN104408019A (en) * 2014-10-29 2015-03-11 浪潮电子信息产业股份有限公司 Method for realizing GMRES (generalized minimum residual) algorithm parallel acceleration on basis of MIC (many integrated cores) platform

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