CN105847713A - 3D stacked structure image sensor reading method based on one-dimensional decoding - Google Patents

3D stacked structure image sensor reading method based on one-dimensional decoding Download PDF

Info

Publication number
CN105847713A
CN105847713A CN201610216362.3A CN201610216362A CN105847713A CN 105847713 A CN105847713 A CN 105847713A CN 201610216362 A CN201610216362 A CN 201610216362A CN 105847713 A CN105847713 A CN 105847713A
Authority
CN
China
Prior art keywords
row
adc
pixel
column
tsv
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610216362.3A
Other languages
Chinese (zh)
Inventor
高静
李奕
黄蕊
贾宬
徐江涛
史再峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianjin University
Original Assignee
Tianjin University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianjin University filed Critical Tianjin University
Priority to CN201610216362.3A priority Critical patent/CN105847713A/en
Publication of CN105847713A publication Critical patent/CN105847713A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/79Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00Geometric image transformations in the plane of the image
    • G06T3/40Scaling of whole images or parts thereof, e.g. expanding or contracting
    • G06T3/4007Scaling of whole images or parts thereof, e.g. expanding or contracting based on interpolation, e.g. bilinear interpolation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75Circuitry for providing, modifying or processing image signals from the pixel array

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention relates to the technical field of simulation integrated circuit design and the 3D lamination packaging technology and solves a problem of low image quality caused by reading failure of the whole pixel array signal because of mubump, ADC or TSV failure. The method comprises steps that a pixel array is divided into multiple sub processing modules in a mode of the row or the column, pixels of each row or each column of the sub processing modules are connected with one same ADC through a mubump pathway, each ADC is connected with an ISP layer through a respective TSV pathway, so the row or the column is selected to read through only one-dimensional decoding for the row or the column, when the mubump, the ADC or the TSV on a certain pixel signal reading pathway partially fails, the ISP is firstly determined to be abnormal, and failed pixel signal values can be recovered through employing linear interpolation. The method is mainly applied to integrated circuit design manufacturing occasions.

Description

The 3D stacked structure imageing sensor read based on one-dimensional decoding reads method
Technical field
The present invention relates to analogue layout and 3D stacked package Technology field, be one meet simultaneously novelty, High frame frequency, small size, the imageing sensor of low cost demand.Concretely relate to 3D stacked structure imageing sensor and read method.
Background technology
3D stacked structure imageing sensor (structure is as shown in Figure 1) utilizes the vertical interconnection of each layer chip chamber, it is possible to achieve signal Parallel processing.Frame frequency is limited compared to the conversion speed by analog-digital converter (Analog-to-Digital Converter, ADC) Conventional planar cmos image sensor, 3D stacked structure imageing sensor can while circuit performance is constant exponentially Improve frame frequency.In 3D stacking imageing sensor, the signal of pixel cell collection is through dimpling block μ bump, ADC and passes through silicon Sheet passage (Through Silicon Vias, TSV) is delivered in image-signal processor (Image Signal Processor, ISP).Due to Therefore the area of ADC unit need to can not arrange an independent ADC for each pixel cell less than the area of associated pixel Module, therefore whole pel array is cut into the subarray of formed objects, each subarray is via corresponding one of μ bump path ADC.Each ADC is connected on image processor ISP via respective TSV path.If at μ bump, ADC and TSV Signal transmission path in arbitrary portion lost efficacy, then can make pel array dropout, ultimately result in picture quality degradation.
Summary of the invention
For overcoming the deficiencies in the prior art, the present invention intends proposing a kind of 3D based on pel array one-dimensional decoding and fault tolerance reading method Stacked structure imageing sensor.Eliminate owing to μ bump, ADC or TSV inefficacy makes whole pel array signal to read The problem ultimately resulting in image degradation.The technical solution used in the present invention is, the 3D stacking knot read based on one-dimensional decoding Structure imageing sensor reading method, is divided into some sub-processing modules by pel array by row or column, by this little processing module Often row or each column pixel are connected to same analog-digital converter ADC by dimpling block μ bump path, and each ADC is via each Silicon chip passage TSV path be connected in image processor ISP level so that row or column select read time only need to carry out column or row One-dimensional decoding read, when some picture element signal read μ bump, ADC or TSV arbitrary portion on path lost efficacy time, Can first determine whether out that in ISP pixel reads abnormal, by the method using linear interpolation, recover failed pixels signal value, Impact picture quality produced to reduce signal transmission pathway to lose efficacy.
Pixel cell selects 4 pipe units, is i.e. made up of photosensitive unit, transfer pipe, reset transistor, source class follower, line EAC 4T unit, wherein the line EAC in pixel cell can complete pixel gating function, it is not necessary to extra increasing selects switch.
Wherein linear interpolation algorithm i.e. takes its adjacent two pixel signal values and is averaging the signal value serving as this failed pixels signal.
The feature of the present invention and providing the benefit that:
By the method read based on the one-dimensional decoding and fault tolerance of pel array, it is ensured that when some picture element signal reads on path When μ bump, ADC or TSV lost efficacy, available linear interpolation algorithm recovers this failed pixels signal, reduces picture element signal and lost efficacy Impact on picture quality.And this reading method makes the reading of each pixel cell signal only need to carry out one-dimensional column (or row) solution Code.Compared to intersecting the reading method such as fault-tolerant reading, this method without increase the gating switch of pixel and pel array and ADC it Between connecting wiring simpler.
Accompanying drawing illustrates:
Fig. 1 tradition 3D stacking image sensor architecture figure.
The 3D stacked structure image sensor architecture figure that Fig. 2 reads based on the one-dimensional decoding and fault tolerance of pel array.
Detailed description of the invention
The image sensor architecture of the design is divided into some sub-processing modules as in figure 2 it is shown, pel array presses row (or row), It is connected to same ADC, each ADC warp by μ bump path by this little processing module often goes (or each column) pixel It is connected in ISP level by respective TSV path.This connected mode make row (or row) only need to carry out when selecting and reading arranging (or One-dimensional decoding OK) reads, and pixel cell can be selected for standard 4T unit, it is not necessary to increases and selects switch, simplifies pel array wiring Design.When some picture element signal reads μ bump, ADC or TSV arbitrary portion inefficacy on path, meeting in ISP First determine whether out that pixel reads abnormal, by the method using linear interpolation, recover failed pixels signal value, to reduce signal The impact that picture quality is produced by transmission channel inefficacy.Wherein linear interpolation algorithm i.e. takes its adjacent two pixel signal values and is averaging Serve as the signal value of this failed pixels signal.
Pixel cell can be selected for 4 the most the most commonly used pipe (4T) unit, i.e. by photosensitive unit, transfer pipe, reset transistor, source class The 4T unit of follower, line EAC composition.Wherein the line EAC in pixel cell can complete to be applied to the picture that one-dimensional decoding reads Element gating function, it is not necessary to extra increasing selects switch.
Use based on pel array one-dimensional decoding and fault tolerance reading method, it is ensured that when the signal comprising μ bump, ADC and TSV When in transmission path, arbitrary portion loses efficacy, picture quality was without being decreased obviously.

Claims (3)

1. based on one-dimensional decoding read 3D stacked structure imageing sensor read a method, it is characterized in that, pel array by row or Row are divided into some sub-processing modules, by this little processing module, often row or each column pixel pass through dimpling block μ bump path Being connected to same analog-digital converter ADC, each ADC is connected at image via respective silicon chip passage TSV path In reason device ISP level so that row or column only need to carry out the one-dimensional decoding of column or row and read, when some pixel when selecting and reading When signal reads μ bump, ADC or TSV arbitrary portion inefficacy on path, can first determine whether out that in ISP pixel is read Go out exception, by the method using linear interpolation, recover failed pixels signal value, right to reduce signal transmission pathway inefficacy The impact that picture quality produces.
2. the 3D stacked structure imageing sensor read based on one-dimensional decoding as claimed in claim 1 reads method, it is characterized in that, Pixel cell selects 4 pipe units, is i.e. made up of photosensitive unit, transfer pipe, reset transistor, source class follower, line EAC 4T unit, wherein the line EAC in pixel cell can complete pixel gating function, it is not necessary to extra increasing selects switch.
3. the 3D stacked structure imageing sensor read based on one-dimensional decoding as claimed in claim 1 reads method, it is characterized in that, Wherein linear interpolation algorithm i.e. takes its adjacent two pixel signal values and is averaging the signal value serving as this failed pixels signal.
CN201610216362.3A 2016-04-07 2016-04-07 3D stacked structure image sensor reading method based on one-dimensional decoding Pending CN105847713A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610216362.3A CN105847713A (en) 2016-04-07 2016-04-07 3D stacked structure image sensor reading method based on one-dimensional decoding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610216362.3A CN105847713A (en) 2016-04-07 2016-04-07 3D stacked structure image sensor reading method based on one-dimensional decoding

Publications (1)

Publication Number Publication Date
CN105847713A true CN105847713A (en) 2016-08-10

Family

ID=56597133

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610216362.3A Pending CN105847713A (en) 2016-04-07 2016-04-07 3D stacked structure image sensor reading method based on one-dimensional decoding

Country Status (1)

Country Link
CN (1) CN105847713A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109246372A (en) * 2018-10-22 2019-01-18 天津大学 3D based on block parallel fault-tolerant architecture stacks imaging sensor

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102110699A (en) * 2009-12-16 2011-06-29 三星电子株式会社 Image sensor module, method of manufacturing same, and image processing system including image sensor module
US20130265066A1 (en) * 2012-04-06 2013-10-10 Industrial Technology Research Institute Pixel array module with self-test function and method thereof
CN103650476A (en) * 2011-05-12 2014-03-19 橄榄医疗公司 Pixel array area optimization using stacking scheme for hybrid image sensor with minimal vertical interconnects
CN103685991A (en) * 2013-12-31 2014-03-26 北京国药恒瑞美联信息技术有限公司 Serial read photon counting chip
CN104297268A (en) * 2013-07-17 2015-01-21 株式会社岛津制作所 Two-dimensional image detecting system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102110699A (en) * 2009-12-16 2011-06-29 三星电子株式会社 Image sensor module, method of manufacturing same, and image processing system including image sensor module
CN103650476A (en) * 2011-05-12 2014-03-19 橄榄医疗公司 Pixel array area optimization using stacking scheme for hybrid image sensor with minimal vertical interconnects
US20130265066A1 (en) * 2012-04-06 2013-10-10 Industrial Technology Research Institute Pixel array module with self-test function and method thereof
CN104297268A (en) * 2013-07-17 2015-01-21 株式会社岛津制作所 Two-dimensional image detecting system
CN103685991A (en) * 2013-12-31 2014-03-26 北京国药恒瑞美联信息技术有限公司 Serial read photon counting chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109246372A (en) * 2018-10-22 2019-01-18 天津大学 3D based on block parallel fault-tolerant architecture stacks imaging sensor

Similar Documents

Publication Publication Date Title
JP6211145B2 (en) Stacked chip imaging system
US10271037B2 (en) Image sensors with hybrid three-dimensional imaging
US11362125B2 (en) Stacked image sensor and system including the same
US9350928B2 (en) Image data compression using stacked-chip image sensors
KR102012810B1 (en) Imaging sensor and method of accessing data on imaging sensor
US9343497B2 (en) Imagers with stacked integrated circuit dies
JP2024038309A (en) Image sensor
US9165968B2 (en) 3D-stacked backside illuminated image sensor and method of making the same
US20160211299A1 (en) Image capturing device
JP2014514782A5 (en)
JP2015070272A (en) Pixel circuit for global shutter of substrate stacked image sensor
US9571765B2 (en) Universal four-side buttable digital CMOS imager
JP2019510418A (en) Stacked back-illuminated quantum image sensor with cluster parallel readout
KR20130135293A (en) Cmos image sensor pixel and controlling timing sequence thereof
KR20130133824A (en) Cmos image sensor pixel and controlling timing sequence thereof
US20180226441A1 (en) Solid state imaging device
EP4109888B1 (en) Unit pixel circuit and image sensor including the same
US20130048832A1 (en) Cmos imaging device with three-dimensional architecture
CN105847713A (en) 3D stacked structure image sensor reading method based on one-dimensional decoding
US11050960B2 (en) Image sensor
KR20150060675A (en) COLUMN SHARING 2x2 PIXEL UNIT AND PIXEL ARRAY OF CMOS IMAGE SENSOR
KR20150052665A (en) Sensing Pixel and Image Sensor including Thereof
TWI825123B (en) Solid-state image pickup device and image pickup device
CN105744185A (en) 3D stacking structure image sensor readout method based on cross fault tolerance readout

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20160810