CN105845745B - A kind of silicon photoelectric multiplier, its encapsulating structure and method for packing - Google Patents
A kind of silicon photoelectric multiplier, its encapsulating structure and method for packing Download PDFInfo
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- CN105845745B CN105845745B CN201610222157.8A CN201610222157A CN105845745B CN 105845745 B CN105845745 B CN 105845745B CN 201610222157 A CN201610222157 A CN 201610222157A CN 105845745 B CN105845745 B CN 105845745B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/02002—Arrangements for conducting electric current to or from the device in operations
- H01L31/02005—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1446—Devices controlled by radiation in a repetitive configuration
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/107—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The present invention relates to a kind of silicon photoelectric multiplier (SiPM), its encapsulating structure and method for packing, the SiPM encapsulating structures include：Pcb board；And the positive SiPM chips of the pcb board are adhered to, the back side of the SiPM chips is relative with pcb board front；Wherein, the backplate of the SiPM chips is electrically connected with the first conductive through hole on the pcb board, and first conductive through hole is electrically connected to the first backplate of the pcb board；The front electrode of the SiPM chips is electrically connected via conducting resinl with the second conductive through hole on pcb board, and second conductive through hole is electrically connected to the second backplate of the pcb board；SiPM chip surfaces and side between the front electrode and the conductive through hole of pcb board second of the SiPM chips are coated with insulating resin, make to be electrically insulated between the backplate of conducting resinl and SiPM chips；And the SiPM chip front sides are coated with transparent insulation resin.
Description
Technical field
The present invention relates to field of semiconductor devices, relate more specifically to a kind of silicon photoelectric multiplier, its encapsulating structure and envelope
Dress method.
Background technology
Silicon photoelectric multiplier (SiPM) is a kind of new Weak photodetector, be by hundreds of to tens of thousands of sizes be several microns
To tens microns of avalanche photodides (Avalanche PhotoDiode：APD) unit is that pixel is integrated in same silicon
The APD matrixes formed on monocrystalline.Wherein, each APD unit is operated under Geiger mode angular position digitizer (Geiger mode), and is gone here and there
What one resistance of connection was about 200K Ω to 1M Ω is quenched resistance, wherein resistance is quenched can be formed at SiPM surfaces (this SiPM
Can be described as surface and resistor-type SiPM be quenched) or be formed at SiPM silicon materials inside (this SiPM can be described as extension and electricity be quenched
Resistance type SiPM).When have APD units receive the light period of the day from 11 p.m. to 1 a.m, the carrier that incident photon is inspired will triggering avalanche effect, its is defeated
The gain for going out snowslide pulse signal may be up to 105~107, with photomultiplier (PMT：Photo Multiplier Tube) phase
Than, not only possess single photon and respond, optical detection efficiency high, the advantage of the Traditional photovoltaic multiplier tube such as fast response time, but also
With good single photon resolution capability and dynamic range wider.Meanwhile, SiPM working bias voltages are low, insensitive to magnetic field,
Small volume is easily integrated, the advantages of with low cost.Progressively start in fields such as astrophysics, high-energy physics, biomedicines at present
Substitution PMT, especially in positron e mission computed tomography (Positron Emission Computed
Tomography, abbreviation PET) application in, replace PMT to make a search with SiPM in petty action analyte detection.In addition SiPM is also
In can be applied to the applications such as DNA detections, fluoroscopic examination and Raman Measurement.
Require that SiPM has sufficiently large detection area to receive signal when in actual applications, for measuring, and existing SiPM
Have the shortcomings that certain：Existing SiPM utilizes the electric current collection aluminum strip collected current being arranged at around APD array, when SiPM chis
During very little increase, integrated APD number of unit increases, and when photon is beaten in SiPM surfaces diverse location, APD is due to away from output for response
The distance of electrode is different, and electric signal transition time length is different, the uniformity of influence SiPM outputs, as shown in Figure 1.Shown in Fig. 1
SiPM in, because the position of each APD units 1 is different, after APD units are fired simultaneously, electric signal is via electric current collection aluminium
Ring 2 is collected and is transferred to output electrode block 7, and the signal of APD units near electrode block 7 is collected by electrode at first, it is middle and
Then there is latency issue away from the response time of the excitation signal of the APD units of electrode.
In addition, SiPM is often used for imaging applications, it is necessary to single SiPM devices are spliced into large scale array by four sides, pass
There is gap " dead band " (insensitive to optical signal) wider on one side where the method for system pressure welding lead can cause pressure welding electrode, by
Weak light detection being applied in the SIPM, in use, detection efficient high is most important more.Therefore, in the encapsulation of SiPM, it is necessary to
The accounting of useful detection area is improved as far as possible.At present, the portion such as MPPC devices, SIPM of Hibernian SensL of Japanese shore pine
Point packing forms are used and for signal to be pooled to device center, and using photoetching, dry etching, (or laser burns for centre in the devices
Erosion) etc. method punch SiPM (referring to bibliography：C.Jackson,L.Wall,K.O`Neill,et,al.Through
silicon via developments for silicon photomultiplier sensors.Proc.of SPIE
Vol.9359 93591A-2), i.e., using TSV via silicon technologies, electrode is then introduced by the back side using methods such as insulation precipitations,
This technique can effectively improve the accounting of active area, but complex process, it is relatively costly.Therefore, in the encapsulation of SiPM, need to be sought
The encapsulation looked for novelty, can either ensure certain detection area accounting, while process is simple, with low cost.
The content of the invention
In consideration of it, it is an object of the present invention to provide a kind of silicon photoelectric multiplier, its encapsulating structure and its method for packing,
To substantially eliminate because of the limitation of prior art and shortcoming and caused by one or more problems.
In order to realize the purpose of the present invention, the present invention provides following technical scheme：
A kind of silicon photoelectric multiplier (SiPM) encapsulating structure, the SiPM encapsulating structures include：
Pcb board；And
The positive SiPM chips of the pcb board are adhered to, the back side of the SiPM chips is relative with pcb board front；
Wherein, the backplate of the SiPM chips is electrically connected with the first conductive through hole on the pcb board, and described first
Conductive through hole is electrically connected to the first backplate of the pcb board；
The front electrode of the SiPM chips is electrically connected via conducting resinl with the second conductive through hole on pcb board, and described
Two conductive through holes are electrically connected to the second backplate of the pcb board；
SiPM chip surfaces and side coating between the front electrode and the conductive through hole of pcb board second of the SiPM chips
There is insulating resin, make to be electrically insulated between the backplate of conducting resinl and SiPM chips；And
The SiPM chip front sides are coated with transparent insulation resin.
Further, the SiPM encapsulating structures can be split and shape by the array of the SiPM chips to encapsulating
Into..
Further, the SiPM chips include APD cellular arrays and electricity are quenched with each APD unit is connected
Resistance, is respectively quenched resistance and is formed at the SiPM chip surfaces or is formed inside the silicon materials of the SiPM chips.
Further, the SiPM chips are SiPM arrays, the backplate and PCB of each SiPM in the SiPM arrays
On plate same first conductive through hole electrical connection, and in the SiPM arrays each SiPM front electrode it is relative with pcb board
Different second conductive through holes answered are electrically connected.
Further, the backplate of the SiPM chips is adhesive on positive first conductive plates of PCB by conduction, institute
State the first conductive plate and connect first conductive through hole；And point scribbles conducting resinl on the front electrode of the SiPM chips, institute
State conducting resinl the second conductive plate positive with PCB to electrically connect, second conductive plate connects second conductive through hole.
Further, the SiPM includes：It is integrated in the avalanche photodide APD cell arrays on silicon chip, every APD
Unit is in series with one and resistance is quenched；The metal electrode bar being placed between the row of the APD array and/or row；Wherein, each APD is mono-
Unit is electrically connected via metal contact wires with adjoining metal electrode bar, and the metal electrode bar is electrically connected by metal contact wires
The signal pooling zone in the APD array center is connected to, the signal pooling zone electrically connects with the front electrode of SiPM chips.
A kind of silicon photoelectric multiplier (SiPM) method for packing, the method is comprised the following steps：
SiPM chip conducting resinls are adhered into pcb board front so that the back side of SiPM chips it is relative with pcb board front and
The backplate of SiPM chips is electrically connected with the first conductive through hole on the pcb board；
Via the first conductive through hole on the conducting resinl and pcb board, the backplate of SiPM chips is electrically connected to institute
State the first backplate of pcb board；
Side and front surface coated insulating resin in one end for being provided with front electrode of SiPM chips；
The front electrode of SiPM chips is electrically connected with the second conductive through hole on pcb board using conducting resinl, described second
Conductive through hole is electrically connected to the second backplate of the pcb board, wherein, the insulating resin is by conducting resinl and SiPM chips
Backplate is electrically insulated；And
Transparent insulation resin is coated in SiPM chip surfaces, as protective layer.
Further, packaged SiPM chips are the array of multiple SiPM chips, and methods described is further comprising the steps of：
The array of the SiPM chips using scribing machine scribing to encapsulating is split.
Further, the SiPM chips may include APD cellular arrays and electricity be quenched with each APD unit is connected
Resistance, is respectively quenched resistance positioned at the SiPM chip surfaces or inside the silicon materials of the SiPM chips.
Further, the SiPM chips are SiPM arrays；The backplate of SiPM chips is electrically connected to the of pcb board
The step of one backplate, includes：By same first in the backplate of each SiPM in the SiPM arrays and pcb board
Conductive through hole is electrically connected；The front electrode of SiPM chips is electrically connected with the second conductive through hole on pcb board using conducting resinl
Step includes：By the front electrode of each SiPM in the SiPM arrays and different second conductive through holes electricity corresponding on pcb board
Connection.
Further, the backplate of the SiPM chips is adhesive on positive first conductive plates of PCB by conduction, institute
State the first conductive plate and connect first conductive through hole；
Spot printing conducting resinl on the front electrode of SiPM chips, and using the conducting resinl and the positive second conductive plate electricity of PCB
Connection, second conductive plate connects second conductive through hole.
A kind of silicon photoelectric multiplier (SiPM) chip, the SiPM chips include：
The avalanche photodide APD cell arrays on silicon chip are integrated in, every APD units are in series with one and resistance is quenched；
And
The metal electrode bar being placed between the row of the APD array and/or row；
Wherein, each APD units are electrically connected via metal contact wires with adjoining metal electrode bar, and the metal electrode
Bar is electrically connected to the signal pooling zone of the APD array middle section by metal contact wires, the signal pooling zone with it is described
The front electrode electrical connection of SiPM chips.
Further, the resistance that is quenched can be formed at the SiPM chip surfaces or be formed at the SiPM chips
Inside silicon materials.
In order to realize the purpose of the present invention, the present invention provides a kind of encapsulation knot of silicon photoelectric multiplier SiPM monolithic arrays
Structure, the encapsulating structure of the SiPM arrays includes：
Pcb board；And
The positive SiPM monolithic arrays chip of the pcb board is adhered to, the back side of the SiPM array chips is with pcb board just
Face is relative；
Wherein, the backplate of the SiPM array chips is electrically connected with the first conductive through hole on the pcb board, described
First conductive through hole is electrically connected to the first backplate of the pcb board；
Multiple front electrodes of the SiPM array chips via on conducting resinl and pcb board with each self-corresponding conductive through hole
Electrical connection, the conductive through hole is electrically connected to each self-corresponding backplate of the pcb board；
SiPM chip surfaces between each self-corresponding conductive through hole of front electrode and pcb board of the SiPM array chips
And side is coated with insulating resin, make to be electrically insulated between conducting resinl and the first backplate of SiPM chips；And
The SiPM chip front sides are coated with transparent insulation resin.
Embodiment of the present invention can effectively improve the useful detection area accounting of SiPM devices.
Further, embodiment of the present invention can solve the problem that APD cell signal acquisition times have time delay.
Attendant advantages of the invention, purpose, and feature will will partly be illustrated by the following description, and will be right
Partly become obvious after research hereafter in those of ordinary skill in the art, or can be obtained with practice of the invention
Know.Objectives and other advantages of the present invention can be by specifically noting in written explanation and its claims and accompanying drawing
Structure is realized and obtained.
It will be appreciated by those skilled in the art that it is specific to be not limited to the above with the objects and advantages of present invention realization
It is described, and the above and other purpose that the present invention can be realized will be more clearly understood according to described further below.
Brief description of the drawings
With reference to the following drawings, many aspects of the invention are better understood with.In accompanying drawing：
Fig. 1 is the structural representation that existing epitaxial electric resistance is quenched SiPM；
Fig. 2 is the schematic diagram of SiPM structures in one embodiment of the invention；
Fig. 3 is SiPM electric current collection pattern diagrams in one embodiment of the invention；
Fig. 4 is SiPM backplates extraction sectional view in one embodiment of the invention；
Fig. 5 is SiPM backplates extraction front elevation in one embodiment of the invention；And
Fig. 6 is SiPM arrays backplate extraction front elevation in one embodiment of the invention.
Major Symbol explanation in figure：
1：APD units
2：Aluminum strip
7：Aluminium electrode block
1A：APD units
2A：Aluminum strip
3A：Electric current collection area
10：Epoxy resin protective layer
20：SiPM chips
30：Pcb board metal spraying copper sheet
40：Pcb board insulator
50：Pcb board backplate
60：Conductive through hole
70：The front electrode (N poles) of SiPM
80：Epoxy resin
90：Pcb board backplate
100：Conducting resinl
110：Conductive through hole
120：Scribing machine Cutting Road
130：SiPM backplates
Specific embodiment
Below, the preferred embodiment of the present invention is described in detail.The example of these preferred embodiments is in accompanying drawing
In illustrated.What the embodiments of the present invention for describing shown in accompanying drawing and with reference to the accompanying drawings were merely exemplary, and this
The technical spirit and its primary operational of invention are not limited to these implementation methods.
Here, also, it should be noted that in order to avoid having obscured the present invention because of unnecessary details, in the accompanying drawings only
Structure and/or the process step closely related with scheme of the invention is shown, and is eliminated little with relation of the present invention
Other details.
In embodiments of the present invention, there is time delay to solve the problems, such as the acquisition time of APD unit excitation signals, propose
A kind of SiPM chips of new structure, the structure sets metal electrode bar (such as aluminium between the row and/or row of APD array
Bar), excitation signal electric current is collected using metal electrode bar, and the signal of collection is guided into the middle part of device, then draw from middle part
To electrode, such as electrode block 70, so that it is guaranteed that the synchronism of electric current outflow, improves device weak light detection accuracy.
Fig. 2 shows the structural representation of SiPM chips in one embodiment of the invention (resistance is quenched in silicon materials body).
SiPM chips can be integrated on same silicon epitaxial wafer by hundreds of to tens thousand of avalanche photodides (APD) unit and be constituted, often
One APD units are in series with one and resistance are quenched.The front electrode 70 of SiPM is located on the surface at SiPM chip edges, backplate
(not shown in Fig. 2) is in silicon substrate side.In the horizontal direction, between APD units can by around PN junction deeper depletion region
Isolated, prevented that electrical cross talk occurs between APD units, there is heavily doped region collected current above APD units, SiPM chips
Aluminum strip 2A is provided between the row and/or row of APD array, aluminum strip 2A is deposited on heavily doped region top and collects response nearby to quick
The electric current of APD.Each APD 1A can be electrically connected with adjoining aluminum strip 2A via metal contact wires.Aluminum strip 2A collects APD nearby
The electric current of the excitation signal of unit, and electric current pooling zone 3A, Ran Houyou in the middle part of SiPM chips are converged at via metal contact wires
The electric current collection area 3A at middle part guides the electrode block 70 positioned at surface bottom portion into, it is ensured that the synchronism of electric current outflow, improves device weak
Optical detection accuracy.
Fig. 3 show extension and resistor-type SiPM electric current collection pattern diagrams is quenched.Lattice-shaped lines in Fig. 3 are represented and set
The aluminum strip put.In the present invention, due to increased aluminum strip between the APD rows of chip surface and/or row, each APD unit is swashed
After hair, electric current is collected by neighbouring aluminum strip, the middle part (i.e. the electric current collection area at middle part) of device is transferred to, then again from middle part aluminium
Electric current is drawn out to SiPM front electrodes, i.e. N poles by bar unification.
Specifically, as shown in figure 3, small circle 101 represents the APD units of response.When device receives optical signal, response
The photoelectric current that produces of APD units collected by closest aluminum strip 2A by surface heavily doped layer, then converge in the middle part of device.By
It is different in the position that responds, first converge at it is middle derive again to electrode block can high degree avoid at electrode block with it is remote
The APD units of ionization electrode block are responded simultaneously, but export asynchronous situation.The electric current collection pattern shown in Fig. 3, works as edge
APD units responded simultaneously with the unit for closing on electrode 70 after, all first converge at device middle part, then unified output (is shown in Fig. 3
The arrow of the SiPM chip internals for going out represents APD unit response impulses current direction), it is ensured that it is consistent that current impulse is exported
Property.
SiPM electrode structures of the invention are applicable not only to that SiPM of the resistance in the silicon materials body of device is quenched, same suitable
For various SiPMs of the resistance in device silicon material surface to be quenched.
The present invention provide new SiPM structures ensure that APD units response after, electric current transmission distance be it is equal, really
The temporal reliability in signal collection is protected, the temporal resolution of device is improved.
In the present invention, in order to the useful detection area accounting for solving the problems, such as SiPM in the prior art is relatively low, in SiPM devices
In the encapsulation of part, using back electrode packing forms, the front electrode of SiPM chips can be drawn with conducting resinl, be connected to UNICOM's back of the body
At the conductive through hole of face electrode.
Fig. 4 show extension and resistor-type SiPM backplates extraction sectional view is quenched, and Fig. 5 show extension and resistance is quenched
SiPM backplates draw front elevation.Reference picture 4 and Fig. 5, the SiPM encapsulation process of one embodiment of the invention are as follows：
First, by SiPM adhesive die attachments in pcb board front so that SiPM chip backs are relative with pcb board front.Fig. 4 and
It is illustrated that in Fig. 5 and two SiPM is adhered into pcb board front.
For example, can be with conducting resinl by the backplate (P poles) 130 of SiPM chips and the positive sheet metal of pcb board (such as metal spraying
Copper sheet) 30 adhere to each other.
When by SiPM adhesive die attachments in pcb board front, make on the backplate of SiPM chips and pcb board insulator 40
Conductive through hole 60 makes electrical contact with, and via conductive through hole 60, the backplate (P poles) of SiPM 20 is led into the backplate of pcb board
(P poles) 50.
Then, the SiPM chip surfaces between the front electrode and the conductive through hole of pcb board second of SiPM chips and side
Coating insulating resin, so that the backplate for making SiPM chips leads to pcb board with the front electrode being subsequently used for SiPM
Electrically insulated between the conducting resinl at the back side.Specifically, shown in Fig. 4, be provided with front electrode (N poles) 70 the one of SiPM
End, along the front of SiPM and side coating epoxy resin 80, and dries epoxy resin, to isolate the backplate of SiPM, no
Be short-circuited elsewhere.Then the spot printing conductive silver glue 100 on the front electrode 70 of SiPM, and conductive silver glue is led to
Conductive through hole 110, by this through hole 110, pcb board backplate (N poles) 90 is led to by the front electrode 70 of SiPM.
It is first to be coated in epoxy resin 80 by the lead-out mode that the front N poles of SiPM are drawn out to pcb board backplate 90
The edge (such as side and part surface) of SiPM, protects the side of SiPM, and the backplate and conducting resinl 100 for preventing SiPM occur
Short circuit, after after epoxy resin solidification, in the N electrode current bleeding point conducting resinl extraction electrodes of SiPM, the UNICOM back side of conducting resinl 100
The corresponding pcb board conductive through hole 110 of electrode, so as to the N poles of SiPM are drawn out into backplate.
The process of the backplate that the electrode (N poles and P poles) of SiPM is led into pcb board by conductive through hole can be used back
Fluid welding technique.
Finally, transparent insulation resin, such as transparent epoxy resin 10 are coated in chip surface, epoxy resin 10 is used as protective layer
Protection device and electrode.This step be using epoxy resin covering device surface, epoxy resin it is highly preferred more than leading
Electric elargol, to protect SiPM and extraction electrode.
The SiPM of the encapsulation shown in figure is the array of multiple SiPM (being 2 in figure), therefore, in drying epoxy resin
Afterwards, two SiPM of symmetric packages can be divided into two with scribing machine scribing, obtains two encapsulated single SiPM tube cores, completed
Device is encapsulated, and in Fig. 4 and Fig. 5, label 120 is scribing machine Cutting Road.
It is illustrated that the device of the encapsulation of the encapsulation of singulated dies, i.e., only includes a SiPM tube core in Fig. 4 and Fig. 5.
The encapsulation of the device integrated for monolithic array (for example, 1xN, 2x2,3x3, or more massive NxN SiPM monolithic arrays),
Comprise the following steps：
The SiPM arrays that multiple SiPM are constituted are adhered into pcb board front so that the back side of SiPM arrays and pcb board front
Relatively, and in SiPM arrays the backplate of each SiPM is electrically connected with same first conductive through hole on pcb board, and this
One conductive through hole is electrically connected to the first backplate of pcb board.
By the front electrode of each SiPM in SiPM arrays via conducting resinl the second conduction corresponding with each SiPM with pcb board
Through hole is electrically connected, and second conductive through hole is each attached to corresponding backplate on pcb board.
SiPM chip surfaces and side between the front electrode and each self-corresponding second conductive through hole of SiPM arrays
Insulating resin is coated with, makes to be electrically insulated between conducting resinl and the first backplate of SiPM chips.
Transparent insulation resin is coated with SiPM chip front sides.
That is, monolithic array encapsulation in, in SiPM arrays the backplate of each SiPM with pcb board on it is same
One the first conductive through hole electrical connection.And in the SiPM arrays each self-corresponding second on the front electrode of each SiPM and pcb board
Conductive through hole (the second different conductive through holes) is electrically connected.
SiPM arrays backplate draws front elevation during Fig. 6 shows one embodiment of the invention.In Fig. 6, encapsulation is 2
2 × 2SiPM arrays.After epoxy resin is dried, two SiPM arrays of symmetric packages can be divided into two with scribing machine scribing,
Two encapsulated SiPM array tube cores are obtained, device encapsulation is completed.
In a preferred embodiment of the invention, during encapsulation, SiPM can adhered into printed circuit board (PCB) (PCB) just with conducting resinl
Face, electrically connects the backplate of a SiPM sheet metal positive with PCB.Again by conducting resinl make the front electrode of SiPM with
Positive another sheet metal electrical connection of pcb board.To prevent conducting resinl from SiPM chip different zones is short-circuited, can be in SiPM
Separated with insulating cement (such as epoxy resin) between conducting resinl on front electrode and PCB.Positive two sheet metals of PCB are further
The PCB back sides are caused by PCB conductive through holes.
Back electrode proposed by the present invention encapsulation, device edge is protected with epoxy resin, and from the electrode block of bottom with leading
Electric elargol is drawn, and backplate is connected by conductive through hole, and manufacture craft is simple, is reduced electrode and is drawn space dead zone area,
Improve detection efficient, while back electrode packing forms can be used for reflow soldering process, be integrated circuit use increased it is feasible
Property.Method for packing of the invention effectively reduces the spacing of back electrode extraction, when SiPM is combined into array, greatly improves
The accounting of active area, so as in detectable signal, improve detection efficient.
The packaged type of SiPM devices of the invention is applicable not only to resistance is quenched and is made in SiPM device silicon material bodies
Structure, is equally applicable to that the structure that resistance is made in SiPM device silicon material surfaces is quenched.
In sum, the present invention deposits aluminum strip in the structure of SiPM in the middle of APD array, collects response APD nearby mono-
Elementary current, it is unified to collect to device center position, then at output to electrode, ensure that each APD unit is exported as far as possible
The synchronism of electric current, increased the measurement accuracy of device.In encapsulation, by the connection of conductive silver glue and conductive through hole,
Front electrode is led into the pcb board back side, the surface mount packages of back electrode are completed, especially on the lead-out mode at N poles, ring is first used
Oxygen tree fat protection device lateral edge, is then connected with conductive silver glue, high degree reduction due to pressure welding electrode cause it is " dead
Area ", improves the accounting of device useful detection area, the use being packaged with beneficial to integrated circuit of whole device, detection high
Area accounting improves detection efficient, increased feasibilities of the SiPM in terms of medical imaging.
Herein it should be noted that in the present invention, operating procedure be not limited to specifications described in time it is suitable
Sequence is performed, it is also possible to according to other time sequencings ground, concurrently or independently performed.Therefore, described in this specification
The execution sequence of method is not construed as limiting to technical scope of the invention.
It is disclosed that specific embodiment of the invention.One of ordinary skill in the art will readily appreciate that, this
Invention has other application in other circumstances.In fact, also there is many implementation methods and realization.Appended claims are absolutely not
In order to limit the scope of the present invention to above-mentioned specific embodiment.
Described as described above for a kind of implementation method and/or the feature that shows can in same or similar mode at one or
Used in more other embodiments, and/or other embodiment is combined or substitutes with the feature in other embodiment
In feature use.
It should be noted that above-described embodiment is only the scope of the claims for illustrating the present invention without limiting the present invention, Ren Heji
In equivalents technology of the invention, all should be in scope of patent protection of the invention.
Claims (10)
1. a kind of encapsulating structure of silicon photoelectric multiplier SiPM, it is characterised in that the encapsulating structure of the SiPM includes：
Pcb board；And
The positive SiPM chips of the pcb board are adhered to, the back side of the SiPM chips is relative with pcb board front；
Wherein, the backplate of the SiPM chips is electrically connected with the first conductive through hole on the pcb board, and described first is conductive
Through hole is electrically connected to the first backplate of the pcb board；
The front electrode of the SiPM chips is electrically connected via conducting resinl with the second conductive through hole on pcb board, and described second leads
Electric through-hole is electrically connected to the second backplate of the pcb board, and second conductive through hole is located at first conductive through hole
The diverse location of the pcb board；
SiPM chip surfaces and side between the front electrode and the conductive through hole of pcb board second of the SiPM chips are coated with absolutely
Edge resin, makes to be electrically insulated between the backplate of conducting resinl and SiPM chips；And
The SiPM chip front sides are coated with transparent insulation resin.
2. the encapsulating structure of silicon photoelectric multiplier SiPM according to claim 1, it is characterised in that the SiPM encapsulation knot
Structure is to be split by the array of the SiPM chips to encapsulating and formed.
3. the encapsulating structure of silicon photoelectric multiplier SiPM according to claim 1 and 2, it is characterised in that：
The SiPM chips are SiPM arrays, same on the backplate of each SiPM and pcb board in the SiPM arrays
First conductive through hole is electrically connected, and the front electrode of each SiPM corresponding from pcb board different second in the SiPM arrays
Conductive through hole is electrically connected.
4. the encapsulating structure of silicon photoelectric multiplier SiPM according to claim 1, it is characterised in that：
The backplate of the SiPM chips is adhesive on positive first conductive plates of PCB by conduction, first conductive plate
Connect first conductive through hole；And
Point scribbles conducting resinl on the front electrode of the SiPM chips, and the conducting resinl the second conductive plate positive with PCB is electrically connected
Connect, second conductive plate connects second conductive through hole.
5. the encapsulating structure of silicon photoelectric multiplier SiPM according to claim 1, it is characterised in that the SiPM chips bag
Include：
The avalanche photodide APD cell arrays on silicon chip are integrated in, every APD units are in series with one and resistance is quenched；
The metal electrode bar being placed between the row of the APD array and/or row；
Wherein, each APD units are electrically connected via metal contact wires with adjoining metal electrode bar, and the metal electrode bar is logical
Cross the signal pooling zone that metal contact wires are electrically connected to the APD array center, the signal pooling zone and the SiPM chips
Front electrode electrical connection.
6. a kind of silicon photoelectric multiplier SiPM method for packing, it is characterised in that the method is comprised the following steps：
SiPM chip conducting resinls are adhered into pcb board front so that the back side of SiPM chips is relative with pcb board front and SiPM
The backplate of chip is electrically connected with the first conductive through hole on the pcb board；
Via the first conductive through hole on the conducting resinl and pcb board, the backplate of SiPM chips is electrically connected to the PCB
First backplate of plate；
Side and front surface coated insulating resin in one end for being provided with front electrode of SiPM chips；
The front electrode of SiPM chips is electrically connected with the second conductive through hole on pcb board using conducting resinl, described second is conductive
Through hole is electrically connected to the second backplate of the pcb board, wherein, second conductive through hole and first conductive through hole position
In the diverse location of the pcb board, the insulating resin electrically insulates the backplate of conducting resinl and SiPM chips；And
Transparent insulation resin is coated in SiPM chip surfaces, as protective layer.
7. method according to claim 6, it is characterised in that packaged SiPM chips are the battle array of multiple SiPM chips
Row, methods described is further comprising the steps of：The array of the SiPM chips using scribing machine scribing to encapsulating is split.
8. method according to claim 6, it is characterised in that：
The SiPM chips are SiPM arrays；
The step of backplate of SiPM chips is electrically connected into the first backplate of pcb board includes：By the SiPM arrays
In the backplate of each SiPM electrically connected with same first conductive through hole on pcb board；
The front electrode of SiPM chips is electrically connected with the second conductive through hole on pcb board using conducting resinl the step of is included：Will
The front electrode of each SiPM is electrically connected from different second conductive through holes corresponding on pcb board in the SiPM arrays.
9. method according to claim 6, it is characterised in that：
The backplate of the SiPM chips is adhesive on positive first conductive plates of PCB by conduction, first conductive plate
Connect first conductive through hole；
Spot printing conducting resinl on the front electrode of SiPM chips, and electrically connected using the conducting resinl the second conductive plate positive with PCB,
Second conductive plate connects second conductive through hole.
10. a kind of silicon photoelectric multiplier SiPM chips for being applied to the encapsulating structure as described in any one in claim 1-5,
Characterized in that, the SiPM chips include：
The avalanche photodide APD cell arrays on silicon chip are integrated in, every APD units are in series with one and resistance is quenched；And
The metal electrode bar being placed between the row of the APD array and/or row；
Wherein, each APD units are electrically connected via metal contact wires with adjoining metal electrode bar, and the metal electrode bar is logical
Cross the signal pooling zone that metal contact wires are electrically connected to the APD array middle section, the signal pooling zone and the SiPM
The front electrode electrical connection of chip.
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| CN112864030B (en) * | 2021-01-18 | 2022-08-09 | 北京师范大学 | Packaging method and packaging structure of photoelectric detection chip |
| CN115236636A (en) * | 2021-04-16 | 2022-10-25 | 上海禾赛科技有限公司 | Receiving device and laser radar |
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| Title |
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| Through silicon via developments for silicon photomultiplier sensors;C. Jackson, L. Wall, K. O’Neill, B. McGarvey and D. Herbert;《Proc.of SPIE》;20151231;第9359卷;93591A-3—93591A-4 * |
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