CN105826235B - A kind of HASTI fill process - Google Patents
A kind of HASTI fill process Download PDFInfo
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- CN105826235B CN105826235B CN201510006122.6A CN201510006122A CN105826235B CN 105826235 B CN105826235 B CN 105826235B CN 201510006122 A CN201510006122 A CN 201510006122A CN 105826235 B CN105826235 B CN 105826235B
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- film layer
- hasti
- heater
- fill process
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Abstract
The present invention relates to technical field of semiconductors, and in particular to a kind of shallow trench fill process.A kind of HASTI fill process, wherein, it is formed in semi-conductive substrate after several grooves, in filling groove by following steps in the reaction chamber for being provided with gas tip and heater, it is specific as follows: semiconductor substrate being placed on heater, bottom and its side wall of a first film layer covering groove are prepared；Gas tip is placed at the first set distance above heater, is full of groove to deposit one second film layer；Gas tip is placed at the second set distance above heater, deposits a third film layer to cover the second film layer, the second set distance is higher than the first set distance.The present invention solves the problems, such as that hardware exists under the case where guaranteeing process safety by finely tuning process program, so that the thickness distribution for implementing the wafer after HASTI technique is more uniform, thickness range is improved；Guarantee company's production capacity utilizes simultaneously.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to a kind of shallow trench fill process.
Background technique
Using the shallow trench isolation (High Aspect Shallow Trench Isolation, HASTI) of high-aspect-ratio
Steam generates wafer (in situ steam generation wafer, ISSG wafer) and bare silicon wafer to technique in situ
Deposition velocity (deposition rate, dep rate) has differences on (Bare wafer), it has been investigated that and hardware device
Correlation is bigger, it may be possible to which heater is longer using the time, and there are residual films to remove for heater edge, leads to the thickness of wafer
Degree deviation range (range, the difference of the maxima and minima of wafer thickness) is bigger than normal, can not normally carry out at processing to wafer
Reason.
It is directed to the residual film of heater edge at present, a kind of method is to solve by polishing the method for heater, but imitate
Fruit is unobvious and larger to heater damage, is also easy to produce particle (Particle) pollutant, and another method is replacement
New heater, however heater is expensive, it is assumed that once range occur extremely to replace heater being very big waste,
And the particularity of the shallow trench isolation process due to high-aspect-ratio, slice amount (wafer per hour, WPH) is relatively slow per hour,
Usual semiconductor processing equipment prevention maintenance (Preventive Maintenance, PM) needs to go essence with a large amount of time back
It adjusts process program (fine tune recipe), is unfavorable for process engineer and Facilities Engineer to the dimension of semiconductor processing equipment
Shield, semiconductor processing equipment pot life greatly reduce, have a significant impact for company's production capacity.
Summary of the invention
The object of the present invention is to provide a kind of HASTI fill process, solve the above technical problem.
Technical problem solved by the invention can be realized using following technical scheme:
A kind of HASTI fill process, wherein formed in semi-conductive substrate after several grooves, in being provided with gas
The groove is filled by following steps in the reaction chamber of spray head and heater, specific as follows:
Step s1: the semiconductor substrate is placed on the heater, and one the first film layer of preparation covers the groove
Bottom and its side wall；
Step s2: the gas tip is placed at the first set distance above the heater, with deposition one second
Film layer is full of the groove；
Step s3: the gas tip is placed at the second set distance above the heater, and one third of deposition is thin
For film layer to cover second film layer, second set distance is higher than first set distance.
Preferably, first set distance is not more than 180mil.
Preferably, second set distance is greater than 180mil and is less than or equal to 250mil.
Preferably, second film layer is prepared using high-aspect-ratio technique in step s2.
Preferably, the sum of the first film layer and the thickness of second film layer are greater than 1300 angstroms and are less than or equal to
1900 angstroms.
Preferably, before the step s1, further include use polishing system to the heater surfaces polished with
The step of removing the Residual foil at the heater surfaces edge.
Preferably, further include step s4, the semiconductor substrate is polished using chemical-mechanical polishing system, to go
Except the third film layer and extra second film layer, HASTI structure is formed.
Preferably, the semiconductor substrate generates wafer using bare silicon wafer or situ steam.
Preferably, the step 1 carries out forming the first film layer using thermal oxidation method technique.
Preferably, the material of the first film layer, second film layer and the third film layer is silica.
The utility model has the advantages that due to using the technology described above, the present invention is guaranteeing process safety by fine tuning process program
In the case of solve the problems, such as that hardware exists so that the thickness distribution for implementing the wafer after HASTI technique is more uniform, thickness model
Enclosing is improved；And the frequency of replacement heater is reduced, reduce cost；When can guarantee the use of semiconductor processing equipment simultaneously
Between, guarantee company's production capacity utilizes.
Detailed description of the invention
Fig. 1 is that gas tip of the invention is placed in the schematic diagram at the first set distance above heater；
Fig. 2 is that gas tip of the invention is placed in the schematic diagram at the second set distance above heater；
Fig. 3 is the method flow diagram of fill process of the present invention；
Fig. 4 is the wafer thickness profile schematic diagram before implementing the present invention and the wafer thickness after the implementation present invention
Profile schematic diagram；
Fig. 5 is wafer test schematic diagram data corresponding with the distribution of the wafer thickness of Fig. 4；
Fig. 6 is to be illustrated using crystal round fringes (W/E) electron lens of the Static RAM (SRAM) of present invention process
Figure；
Fig. 7 is to be illustrated using crystal circle center's (W/C) electron lens of the Static RAM (SRAM) of present invention process
Figure；
Fig. 8 is that groove of the invention is filled rear area of weakness (Weak point area) schematic diagram；
Fig. 9 is the chemical-mechanical polishing rate contrast schematic diagram of chemical-mechanical polishing rate and the prior art of the invention；
Figure 10 is the wet-etch rate of wet-etch rate (Wet Etch Rate, WER) and the prior art of the invention
Correlation data schematic diagram.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art without creative labor it is obtained it is all its
His embodiment, shall fall within the protection scope of the present invention.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The present invention will be further explained below with reference to the attached drawings and specific examples, but not as the limitation of the invention.
Referring to Fig.1, Fig. 2, Fig. 3, Fig. 4, a kind of HASTI fill process, wherein formed in semi-conductive substrate 4 several
It is interior by following step in the reaction chamber for being provided with gas tip (shower head) 2 and heater (Heater) 1 after groove
Rapid filling groove, specific as follows:
Step s1: semiconductor substrate 4 is placed on heater 1, prepare a first film layer covering groove bottom and its
Side wall；
Step s2: gas tip 2 being placed at the first set distance of 1 top of heater, is filled with depositing the second film layer
Full groove；
Step s3: gas tip 2 being placed at the second set distance of the top of heater 1, deposit a third film layer with
The second film layer is covered, the second set distance is higher than the first set distance.
The present invention after formation of the groove, passes through formation the first film layer covering groove in semiconductor substrate in the trench
Bottom and its side wall, by the second film layer of deposition or insulating oxide to complete shallow trench filling (STI Gapfill),
Shallow trench filling pulls open the distance between gas tip 2 and heater 1 after completing, so that the deposition rate ratio of third film layer
It is slack-off, deposition rate than it is slack-off in the case where, more recessed place is filled out on wafer, and film can The faster the better；Gas tip simultaneously
Space between 2 and heater 1 increases, and gas is more evenly distributed, and makes heater edge residual film that may be present to heavy
The influence of product technique becomes smaller.
Referring to Fig. 4 and Fig. 5, the present invention implements the wafer thickness profile schematic diagram and test number of the deposition film of front and back
According to can see, before the present invention, Fig. 4 using close in the wafer thickness profile schematic diagram before present invention process
Deposition thickness is relatively thin at crystal column surface central area 41, and thicker close to deposition thickness at crystal round fringes region 42, wafer thickness is inclined
It is larger from range, it is unevenly distributed, and after using the present invention, Fig. 4's is cutd open using the wafer thickness distribution after present invention process
The wafer thickness in crystal column surface central area and crystal round fringes region deviates range shorter, the thickness range of wafer in the schematic diagram of face
More uniformly, the situation of crystal column surface out-of-flatness is improved.Implementation present invention front and back wafer thickness is listed in Fig. 5 respectively most
Big value, minimum value, average value and other statistical data, it can be seen from the figure that passing through after using technical solution of the present invention
The thickness value for measuring the every bit of wafer obtains maximum value, the minimum value, average value of wafer thickness, wafer thickness range
(Range) it is reduced by 1348.55 angstroms before to 598.11 angstroms, thickness range improves significantly, in combination with standard deviation
(Std. Dev., Standard Deviation) value is analyzed, and standard deviation value is mainly used to react sample space distribution
Situation, standard deviation is smaller, illustrates each sample closer to average value, standard deviation of the invention is lower than the prior art significantly
Standard deviation data, thus, after the technical solution of invention, the more uniform distribution of thickness range.
As a kind of preferred embodiment of the invention, the first set distance is not more than 180mil, and the second set distance is big
In 180mil and it is less than or equal to 250mil, wherein 1mil is equal to mil (inch).By collecting more examination
Design (DOE, Design of Experiment) data are tested, the second set distance is greater than after 250mil, and thickness range will not
Further improve, and slice amount per hour can be sacrificed, influences production capacity.Preferably, the first set distance is 180mil, and second sets
Set a distance is 250mil.
It is excellent the defects of in order to avoid generating gap, hole in filling process as a kind of preferred embodiment of the invention
Choosing deposits the second film layer using high-aspect-ratio technique (HARP, High Aspect Ratio Process) and is full of groove, into one
Step ground can divide the second film layer of multiple deposition or insulating oxide using high-aspect-ratio technique in the prior art, such as may be used
With in two steps or three steps deposit the second film layer.Further, using high-aspect-ratio technique (HARP, High Aspect
Ratio Process) deposition third film layer.
It further include using polishing system to heater before step s1 as a kind of preferred embodiment of the invention
Surface is polished the step of to remove Residual foil 3 of 1 marginal surface of heater.The present invention can be with polishing 1 table of heater
The method in face combines, further such that HASTI thickness degree range performance is improved.
As a kind of preferred embodiment of the invention, reaction chamber is chemical vapor depsotition equipment (Chemical Vapor
Deposition, CVD) reaction chamber, step s1 to step s3 carries out in the reaction chamber of chemical vapor depsotition equipment.
As a kind of preferred embodiment of the invention, step s1 using thermal oxidation method technique formed the first film layer or
For lining oxide layer.
As a kind of preferred embodiment of the invention, after step s3, further includes step s4, utilize chemically mechanical polishing
System is polished, and carries out planarization process to crystal column surface, to remove third film layer and the second extra film layer, is formed
HASTI structure.
As a kind of preferred embodiment of the invention, in step s4, after crystal column surface progress planarization process
Forming HASTI structure further includes before wet etching step.
As a kind of preferred embodiment of the invention, the first film layer, the second film layer and third film layer are oxygen
SiClx film layer.
As a kind of preferred embodiment of the invention, the sum of thickness of the first film layer and the second film layer is greater than 1300
Angstrom be less than or equal to 1900 angstroms, preferably equal to 1900 angstroms.
The present invention solves the problems, such as that hardware exists under the case where guaranteeing process safety by finely tuning process program, so that
The thickness distribution of wafer after implementing HASTI technique is more uniform, and thickness range is improved；And reduce the frequency of replacement heater
Rate reduces cost；It can guarantee the time that uses of semiconductor processing equipment simultaneously, guarantee company's production capacity utilizes.Simultaneously as the
One film layer and the second film layer are basically completed trench fill, and the change of process program will not be to ditch when third thin film layer
Slot filling process impacts, and can directly implement.Static RAM (SRAM, the Static provided by Fig. 6 and Fig. 7
Random Access Memory) crystal round fringes (W/E, Wafer/Edge) in manufacturing process and crystal circle center (W/C,
Wafer/Center electron lens schematic diagram), and area of weakness (Weak Point area) as shown in connection with fig. 8 can be seen
Out, after step s1 and step s2, the thickness that trench fill finishes needs should be 707 angstroms plus 670 angstroms, i.e., 1377 angstroms
Left and right trench can be substantially filled with and finish, wherein 707 angstroms are silicon substrate to the filling film thickness between silicon nitride layer, 670 angstroms are
Filling film thickness more than silicon nitride layer.The present invention is after completing step s2, and filling thickness is up to 1900 angstroms, thus third
The deposition of film layer will not have an impact to the filling of groove, and risk is lower.In conjunction with the test data of Fig. 9 and Figure 10, the present invention is obtained
Chemical machine before removal rate of the wafer that deposited third film layer out after chemically mechanical polishing, with the implementation present invention
The removal rate of tool polishing is suitable, further, after the present invention is further across wet etching, with the wet process before the implementation present invention
Etch rate is also comparison match, thus technical solution of the present invention can directly be implemented, the change low-risk of technique, can be with
Directly apply to production.And situ steam can be suitable for simultaneously and generate wafer and bare silicon wafer.
The present invention can form groove using the technique well known in the art for forming groove, and therefore not to repeat here.In addition to this
The technical parameter of limitation is invented, the present invention can set technological parameters using other of high-aspect-ratio technique well known in the art,
Therefore not to repeat here.
The foregoing is merely preferred embodiments of the present invention, are not intended to limit embodiments of the present invention and protection model
It encloses, to those skilled in the art, should can appreciate that all with made by description of the invention and diagramatic content
Equivalent replacement and obviously change obtained scheme, should all be included within the scope of the present invention.
Claims (10)
1. a kind of HASTI fill process, which is characterized in that formed in semi-conductive substrate after several grooves, in being provided with
The groove is filled by following steps in the reaction chamber of gas tip and heater, specific as follows:
Step s1: the semiconductor substrate is placed on the heater, and one the first film layer of preparation covers the bottom of the groove
Portion and its side wall；
Step s2: the gas tip is placed at the first set distance above the heater, to deposit one second film
Layer is full of the groove；
Step s3: the gas tip is placed at the second set distance above the heater, deposits a third film layer
To cover second film layer, second set distance is higher than first set distance.
2. HASTI fill process according to claim 1, which is characterized in that first set distance is not more than
180mil。
3. HASTI fill process according to claim 1, which is characterized in that second set distance is greater than 180mil
And it is less than or equal to 250mil.
4. HASTI fill process according to claim 1, which is characterized in that use high-aspect-ratio technique system in step s2
Standby second film layer.
5. HASTI fill process according to claim 1, which is characterized in that the first film layer and described second thin
The sum of thickness of film layer is greater than 1300 angstroms and is less than or equal to 1900 angstroms.
6. HASTI fill process according to claim 1, which is characterized in that further include using before the step s1
Polishing system is polished the step of to remove the Residual foil at the heater surfaces edge to the heater surfaces.
7. HASTI fill process according to claim 1, which is characterized in that further include step after the step s3
S4 polishes the semiconductor substrate using chemical-mechanical polishing system, to remove the third film layer and extra
Second film layer forms HASTI structure.
8. HASTI fill process according to claim 1, which is characterized in that the semiconductor substrate using bare silicon wafer or
Situ steam generates wafer.
9. HASTI fill process according to claim 1, which is characterized in that the step s1 uses thermal oxidation method technique
Form the first film layer.
10. HASTI fill process according to claim 1, which is characterized in that the first film layer, described second thin
Film layer and the third film layer are silicon oxide film layer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510006122.6A CN105826235B (en) | 2015-01-06 | 2015-01-06 | A kind of HASTI fill process |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510006122.6A CN105826235B (en) | 2015-01-06 | 2015-01-06 | A kind of HASTI fill process |
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| CN105826235A CN105826235A (en) | 2016-08-03 |
| CN105826235B true CN105826235B (en) | 2019-01-22 |
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| CN116770274A (en) * | 2023-06-20 | 2023-09-19 | 拓荆科技(上海)有限公司 | Film deposition method and semiconductor process equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1119016A2 (en) * | 2000-01-20 | 2001-07-25 | Sumitomo Electric Industries, Ltd. | Gas shower unit for semiconductor manufacturing apparatus and semiconductor manufacturing apparatus |
| US6913938B2 (en) * | 2001-06-19 | 2005-07-05 | Applied Materials, Inc. | Feedback control of plasma-enhanced chemical vapor deposition processes |
| CN1763912A (en) * | 2004-10-21 | 2006-04-26 | 松下电器产业株式会社 | Gas diffusion plate |
| CN1860252A (en) * | 2003-09-29 | 2006-11-08 | 应用材料公司 | Gas distribution showerhead |
-
2015
- 2015-01-06 CN CN201510006122.6A patent/CN105826235B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1119016A2 (en) * | 2000-01-20 | 2001-07-25 | Sumitomo Electric Industries, Ltd. | Gas shower unit for semiconductor manufacturing apparatus and semiconductor manufacturing apparatus |
| US6913938B2 (en) * | 2001-06-19 | 2005-07-05 | Applied Materials, Inc. | Feedback control of plasma-enhanced chemical vapor deposition processes |
| CN1860252A (en) * | 2003-09-29 | 2006-11-08 | 应用材料公司 | Gas distribution showerhead |
| CN1763912A (en) * | 2004-10-21 | 2006-04-26 | 松下电器产业株式会社 | Gas diffusion plate |
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| CN105826235A (en) | 2016-08-03 |
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