CN105791853A - Encrypted embedded video chaotic secret communication method after H.264 coding - Google Patents
Encrypted embedded video chaotic secret communication method after H.264 coding Download PDFInfo
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- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
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- H04N21/234—Processing of video elementary streams, e.g. splicing of video streams or manipulating encoded video stream scene graphs
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- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs
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Abstract
The invention discloses an encrypted embedded video chaotic secret communication method after H.264 coding. The encrypted embedded video chaotic secret communication method comprises the following steps of S1, at a transmitting end, performing H.264 hardware coding, chaotic flow password encryption, pixel-position chaotic scrambling encryption, network transmission and wide-area network transmission on video data; and S2, at a receiving end, receiving encrypted video data through the network, finishing pixel-position chaotic descrambling decryption and chaotic flow cipher decryption, realizing H.264 hardware decoding on the condition that a password matches, and stopping communication between the transmitting end and the receiving end after H.264 hardware decoding failure on the condition that password mismatching occurs. The encrypted embedded video chaotic secret communication method has double encryptions, namely chaotic flow password encryption and chaotic position scrambling encryption. The double encryptions are performed after H.264 coding compression. The encrypted embedded video chaotic secret communication method has advantages of realizing no damage of original video correlation, improving coding efficiency, reducing data redundancy, and realizing high real-time performance and high safety of an encryption system.
Description
Technical field
The present invention relates to the video private communication technology in multimedia communication, in particular to the embedded video Development of Chaotic Secure Communication Method of encryption after a kind of H.264 coding.
Background technology
In video chaotic secret communication, the widely used chaos encryption mode of current people has following two:
First kind of way is first to encrypt then to carry out H.264 or HEVC compression coding again, and the process that the feature of this cipher mode is on technological layer is more convenient, but there is the weak point of following several respects:
1, the dependency of original video has been upset after chaos encryption, cause that compression coding efficiency H.264 is substantially reduced, the video data volume after coding is very big, no matter is adopt H.264 hardware encoding or Software Coding, and the speed that the video after encryption is transmitted by Ethernet is not high enough;Rgb format image data amount is big more than the data volume of the I frame after H.264 compression or P frame, and the rgb format image data amount of such as 640 × 240 sizes is MB magnitude, is H.264 KB magnitude after compression.The data volume of encryption is big, the length consuming time of encryption;
2, code efficiency is low, and H.264 encoder depends on image space dependency and is compressed obtaining I frame, and the temporal correlation compression relying on interframe obtains P frame.But the RGB image pixel temporal correlation after encryption is disturbed, and has a strong impact on encoder efficiency, is presented as that compression rates is substantially reduced;
3, efficiency of transmission is low.H.264 compression efficiency is low causes that H.264 video signal data amount is big, sends under bandwidth one stable condition at network, and the frame per second of transmission declines;
4, the cipher mode of position scramble can only be adopted, the size of video pixel can not be encrypted operation, otherwise because of the quantization reason in H.264, even if also cannot correctly decrypt original video when can cause receiving terminal cipher key match, and it is only the cipher mode of position scramble, statistical property is bad, and security performance is not high.
The second way is based on the selectivity chaos encryption of H.264 Software Coding compression, refer specifically to the Partial Variable in H.264 cataloged procedure is carried out stream cipher encrypting, including encrypted frame inner estimation mode, interframe movement vector residual error, quantization parameter residual error, DCT coefficient symbol, the DC component of residual error data.The program is encrypted just for cataloged procedure small part variable, and encryption data volume is little, does not destroy coded format, thus advantage to be to maintain H.264 video format compatible, the compression efficiency of encoder and scramble time impact are little simultaneously.But its shortcoming is:
1, cipher round results is poor.Encrypted image is mosaic shape but not snowflake point-like, and human eye can the part scene in identification video once in a while;
2, operational efficiency is low.H.264 there are software codec and two kinds of forms of hardware compression, software codec obtains by compiling Open Source Code, CPU be responsible for codec functions;Hardware compression is fixing in the chips by the form of special circuit, hardware circuit be responsible for codec functions.Software execution speed is far smaller than hardware and performs speed, thus operational efficiency is low.Selective encryption scheme can only transplant AES based on H.264 encoding and decoding Open Source Code, and can not transplant AES based on hardware compression circuit, thus the program both cannot utilize the hardware resource in chip, and it is low to encode operational efficiency.
3, design difficulty is big.H.264 cataloged procedure is complicated, and variable is many, and branch is many, will accurately encrypt the variable of correspondence and accurately decipher, and difficulty is quite big;
What 4, the equipment such as mobile terminal such as current mobile phone mainly adopted is H.264 hardware encoding compression, and completes selectivity chaos encryption on the basis of H.264 hardware encoding, realizes aspect from technology, still has bigger difficulty at present.
In order to fundamentally improve the chaos encryption video signal transfer rate by Ethernet, the embedded video Development of Chaotic Secure Communication Method that the present invention encrypts after intending a kind of H.264 coding of proposition, on ARMLinux Embedded Real-Time Video Communication System, H.264 the video data stream after compression coding is carried out Chaos self synchronization stream cipher encrypting and scrambling encryption two re-encryption of chaotic maps position, combines the feature of stream cipher encrypting and scrambling encryption and H.264 video flowing.H.264 video flowing encryption is had following difficult point:
1, H.264 each frame video stream data size after compression is changeable, it is difficult to carry out scrambling encryption by one group of scramble parameter, but countless many group scramble parameters can not be used to encrypt;
2, each frame H.264 video flowing size has to comply with extension in units of 3 bytes is the requirement of regular m × n rank matrix, just meets the condition of scrambling encryption, and H.264 compresses the video flowing length obtained and cannot ensure compliance with this requirement;
3, stream cipher encrypting can destroy H.264 video stream part data in motor synchronizing process, and because H.264 grammer is tight, even the corrupted data of a bit all can cause and decodes unsuccessfully break of video proper communication.
On ARMLinux Embedded Real-Time Video Communication System, the video data stream after H.264 compression coding is carried out Chaos self synchronization stream cipher encrypting and scrambling encryption two re-encryption of Chaotic Cat Maps position, it is necessary to the key issue of solution is:
1, only with limited scramble parameter, and limited memory block of corresponding scramble parameter, solve the problem that H.264 video flowing size is changeable;
2, constructing each frame H.264 video flowing is length-specific, to meet the condition of m × n rank matrix of scrambling encryption;
3, constructing extra protection data for H.264 video flowing prevents valid data to be destroyed.
From disclosed patent documentation at present, video chaotic secret communication system is primarily present several situation: based on the algorithm research of matlab, based on the experimental verification on the PC platform of Windows operating system, realize chaos encryption module based on fpga chip to be fused in bigger secret signalling, and the embedded mode based on ARM operation (SuSE) Linux OS realizes video secret communication.Wherein realize based on embedded-type ARM Linux that the method for chaotic secret communication system is common to be encoded afterwards for first encrypting, but not first encode and encrypt afterwards.First encrypt and encode the deficiency existed in safety and efficiency afterwards.
Summary of the invention
In order to fundamentally improve the chaos encryption video signal transfer rate by Ethernet, the embedded video Development of Chaotic Secure Communication Method encrypted after present invention employs a kind of H.264 coding, the method is provided with chaos stream cipher encrypting and this two re-encryption of chaos position scrambling encryption, two re-encryptions are all after H.264 compression coding, do not destroy the dependency of original video, improve the efficiency of coding, decrease the redundancy of data, encryption system real-time and safety high.
The present invention adopts the following technical scheme that and realizes: the H.264 embedded video Development of Chaotic Secure Communication Method of encryption after coding, comprise the following steps: S1, at transmitting terminal, video data is carried out H.264 hardware encoding, chaos stream cipher encrypting, the Chaotic Scrambling encryption of location of pixels, network send, wide area network transmission;S2, at receiving terminal, enciphered video data is received by network, the chaos completing location of pixels inverts disorderly deciphering and chaos stream cipher deciphering, when cipher key match, realize H.264 hardware decoding, under key mismatch condition, H.264 hardware decodes the communication stopping between transmitting terminal and receiving terminal after unsuccessfully.
Preferably, the chaos stream cipher encrypting described in step S1 is: increase the guard byte of full 0 before video data.
Preferably, Chaotic Scrambling described in step S1 is encrypted as: the size according to the I frame of the video data exported after H.264 hardware encoding and P frame, it is respectively adopted the memory size method of salary distribution three kinds different, adopt the method mending 0 that the byte number of video data expands to 3 × m × n, meet Chaotic Scrambling and invert disorderly required byte number.Wherein, described memory size three kinds different is determined according to maximum I frame and the minimum P frame of video data.
Preferably, step S1 is further comprising the steps of before video data carries out H.264 hardware encoding: photographic head picked-up video, the JPEG decoding of video image, rgb format are to the conversion of YUV420 form;Step S2 is further comprising the steps of after realizing H.264 hardware decoding: the video after YUV420 form is converted to rgb format, deciphering shows.
From the foregoing, it will be observed that in technical solution of the present invention, two re-encryptions of design are to encrypt after H.264 compression coding, but not encrypt before it.At transmitting terminal, adopt the method for operation of four core four threads, according to first carrying out H.264 hardware encoding, then carrying out the order of chaos encryption, at receiving terminal, adopt the method for operation of two core two threads, according to first carrying out the order that Chaotic Solution is close, then carry out H.264 hardware decoding, do not destroy the dependency of original video, improve H.264 code efficiency, reduce the video data volume after scramble time and coding, reduce redundancy, increase unicity distance, improve real-time and the safety of whole system.Compared with prior art, the invention have the advantages that and beneficial effect:
1, cryptographic security is improved;
The 1st advantage is analyzed: according to formula U=H/R, wherein U represents that unicity distance, H represent key entropy, and R represents data redudancy from increasing unicity distance.When H is certain when, R is more little, and U is more big, then confidentiality is better.Because H.264 video signal data amount is less than rgb format data volume, after the H.264 encoded compression of video flowing, redundancy R is greatly reduced than original video data, so encryption is higher than cryptographic security before coding after coding.Additionally, H.264 compressed video signal has strict grammer, the wherein corrupted data of 1 bit, can cause that decoder decodes unsuccessfully and exits application program, cause the termination of video communication, if thus decrypting process can not strictly accurately decipher, then cannot normally show video.
2, encryption efficiency, operational efficiency are improved;
The 2nd advantage is analyzed: coding previous frame image is sized to MB magnitude, and the H.264 video flowing after encoding is that KB magnitude is even less, it is known that coded data is less than data before coding, and enciphering rate is faster from H.264 encoding front and back data volume size.
Because the compressed video signal data amount of encryption has reached minimum, cryptographic operation is consuming time few;H.264 codec adopts hardware circuit form to realize, and performs speed fast;The data volume of one frame compressed video signal is little, and the frame per second that network sends is high.
3, original video coding efficiency is kept.
The 3rd advantage is analyzed: H.264 after coding, the scheme of encryption does not have influence on encoding operation completely from image temporal correlation, maintain code efficiency H.264, encrypted before H.264 coding, upset the dependency of space-time, the serious code efficiency reduced H.264.
Accompanying drawing explanation
Fig. 1 is that after a kind of H.264 coding of the present invention, the embedded video Development of Chaotic Secure Communication Method hardware of encryption realizes general diagram;
The transmitting terminal two-stage chaos encryption that Fig. 2 is in Fig. 1 realizes block diagram;
Fig. 3 is the closely knit existing block diagram of the receiving terminal two-stage Chaotic Solution in Fig. 1;
Fig. 4 is the Multi-core operation principle block diagram in Fig. 1;
Fig. 5 is the Multi-core synchronization mechanism operation principle block diagram in Fig. 1;
Transmitting terminal four core four thread that Fig. 6 is in Fig. 1 realizes block diagram;
Receiving terminal dinuclear two thread that Fig. 7 is in Fig. 1 realizes block diagram;
Detailed description of the invention
Below in conjunction with embodiment and Figure of description, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
Referring to Fig. 1, the inventive method comprises the following steps: photographic head picked-up video, the JPEG decoding of video image, rgb format is to the conversion of YUV420 form, H.264 hardware encoding, chaos stream cipher encrypting, the Chaotic Scrambling encryption of location of pixels, network sends, wide area network transmission, network receives, the chaos of location of pixels inverts random deciphering, chaos stream cipher is deciphered, H.264 being successfully decoded of hardware when cipher key match, YUV420 form is to the conversion of rgb format, video after deciphering shows, under key mismatch condition, H.264 hardware decodes the communication stopping between transmitting terminal and receiving terminal after unsuccessfully, raw video signal cannot be decrypted.
1, at transmitting terminal, the method for operation of four core four threads is adopted, according to first carrying out H.264 hardware encoding, then carrying out the order of chaos encryption.The concrete operation step of transmitting terminal is: photographic head picked-up video, the JPEG of video image is decoded and obtains rgb format, from rgb format to the conversion of YUV420 form, complete H.264 hardware encoding, then carrying out the Chaotic Scrambling encryption of chaos stream cipher encrypting and location of pixels, encrypted video is sent by network and wide area network transmission.
Such as Fig. 6, four thread loops of transmitting terminal perform below scheme: thread 1 circle collection jpeg image, and after thread 2 reads jpeg image, decompression is RGB image;Thread 3 reads RGB image and shows on an lcd display;Thread 4 reads format transformation after RGB image, does H.264 compression coding, H.264 video flowing carries out stream cipher encrypting, position scrambling encryption, send two re-encryption data, and the flow process of two-stage chaos encryption is as shown in Figure 2.
The first order is encrypted as chaos stream cipher encrypting; the guard byte of 20 full 0s is increased before H.264 video data; transmitting terminal is different with the initial value of receiving terminal but when cipher key match; realize transmitting terminal chaos stream cipher to the encryption of video data and receiving terminal chaos stream cipher to the deciphering of video data precise synchronization between the two; H.264 correct format before receiving terminal recovers chaos encryption, completes decoding H.264 and correctly decrypts raw video signal;When and key mismatch different with the initial value of receiving terminal at transmitting terminal, transmitting terminal chaos stream cipher cannot be realized to the encryption of video data and receiving terminal chaos stream cipher to the deciphering of video data precise synchronization between the two, receiving terminal cannot recover the H.264 correct format before chaos encryption, can not completing decoding H.264, receiving terminal cannot decrypt raw video signal;The guard byte of 20 full 0s is increased before H.264 video data; after guaranteeing encryption by chaos stream cipher and deciphering; can correctly restore whole correct formats H.264; owing to H.264 grammer is very tight; the corrupted data of any of bit all can cause decoding failure H.264, thus the proper communication interrupted between transmitting terminal and receiving terminal.
The second level is encrypted as the chaos position scramble of video data, the size according to the I frame H.264 exported and P frame, and being respectively adopted memory size is 24300 bytes, 10800 bytes, the different size of Memory Allocation mode of 2400 byte three kinds;Vary in size for the every one-frame video data after H.264 compression, adopt the method extended byte number mending 0, byte number is expanded to 3 × m × n, meet chaos position scramble and invert disorderly required byte number;Memory size three kinds different is adopted to be significantly reduced the time of chaos encryption and deciphering according to the I frame H.264 exported with the size of P frame, it is achieved chaos encryption video signal reaches 27 frames per second through the speed that Ethernet transmits.
2, at receiving terminal, the method for operation of two core two threads is adopted, by the order of first chaos deciphering laggard row H.264 hardware decoding.When receiving terminal is different with the initial value of transmitting terminal but during cipher key match, completes decoding process H.264 at receiving terminal and correctly decrypt raw video signal;When receiving terminal is different with the initial value of transmitting terminal and during key mismatch, receiving terminal decoding process H.264 cannot complete, sending decoding failure signal the proper communication interrupting between transmitting terminal and receiving terminal, receiving terminal cannot decrypt original video signal.The flow process of receiving terminal two-stage chaos deciphering is as shown in Figure 3.
The concrete operation step of receiving terminal is: network receives encrypted video, the chaos completing location of pixels inverts disorderly deciphering and chaos stream cipher deciphering, when cipher key match, realize being successfully decoded of H.264 hardware, YUV420 form is converted to the video after rgb format, deciphering show, under key mismatch condition, H.264 hardware decodes the communication stopping between transmitting terminal and receiving terminal after unsuccessfully, it is impossible to decrypt raw video signal.
Such as Fig. 7, two thread loops of receiving terminal perform below scheme: thread 1 circulation receives and characterizes the variate-value of H.264 video flowing size and the H.264 video stream data of two re-encryptions;Carrying out position scramble deciphering, stream cipher decryption, H.264 decode decompression, format transformation is rgb format;Thread 2 reads rgb format data and is shown in LCD display.
ARMLinux Embedded Real-Time Video Communication System is divided into transmitting terminal development board and receiving terminal development board, the present invention selects two embedded boards with four ARM cores and H.264 codec hardware accelerating engine chip, as transmitting terminal and receiving terminal, two ends connect LCD display respectively through USB interface, two ends and PC are connected by the LAN interface of Ethernet interface RJ45 and router, and distributing IP address choice is: 192.168.1.100,192.168.1.101 and 192.168.1.102 form LAN and connect.Transmitting terminal connects USB camera.Transmitting terminal and receiving terminal access route in Ethernet mode, transmit the video stream data after two re-encryptions with ICP/IP protocol.
Set up software development environment.VMware10 virtual machine installed by PC, installs Ubuntu12.04PC version (SuSE) Linux OS, and the ARM-Linux-gcc compiler that installing development board producer provides is used for cross compile.Two ends development boards runs the (SuSE) Linux OS that producer provides, and sets up development board and is connected with the NFS of PC, the application program place catalogue on PC be articulated on development board /mnt catalogue under.Setting up PC to be connected with the SSH of two ends development board, PC can pass through Ethernet Telnet manipulation development board.
Determine the memory size of stream cipher encrypting: the memory block of stream cipher encrypting is used for depositing compressed video signal data (I frame and P frame), it is desirable to slightly larger than I frame, thus internal memory be designed as 30KB.H.264 each frame H.264 video stream data of encoder output is in units of byte Byte, start to be stored in from the 0x0015 address (21Byte address) of first 30KB memory block, 0x0000~0x0014 memory headroom and the unfilled memory headroom of 0xyyyy~0x7800 are pressed default value and are supplemented 0x00 byte, wherein 0x0015~0xyyyy is H.264 video flowing valid data space, and 0xyyyy address changes along with H.264 video flowing valid data size.30K internal memory reserved foremost 20 guard byte is to prevent H.264 compressed video data to be destroyed in motor synchronizing process, causing that decoder cannot be correctly decoded H.264 compressed video signal.10 iteration of equation can be recovered to synchronize; thus reserve 20 guard bytes and be used for encryption and the deciphering of motor synchronizing process; H.264 compressed video signal data after the 21st byte can guarantee that being in synchronous regime encrypts and decrypts, hereby it is ensured that data are not destroyed.
Stream cipher encrypting is as follows with the process of deciphering: the encryption equation of transmitting terminal stream cipher is
In formula
Wherein X, Y, Z are system state variables, aij(i, j=1,2,3) is key parameter, and variable X round numbers obtains the variable x of a byte by mod (256), and once, x updates once Equation Iterative.Take a byte and x step-by-step XOR from the 0x0000 address of 30KB stream cipher encrypting internal memory 1, operation result O is stored in the 0x0000 of 30KB stream cipher encrypting internal memory 2, and feeds back to participation next iteration in equation;Then the byte step-by-step XOR same with the x after renewal of the 0x0001 address of 30KB stream cipher encrypting internal memory 1 is taken, operation result O is stored in the 0x0001 of 30KB stream cipher encrypting internal memory 2, circulating operation successively by address until 0xyyyy address computation completes, the data after 0xyyyy need not participate in XOR.
The structure of receiving terminal stream cipher decryption equation is identical with parameter size and encryption equation, and deciphering is the inverse process of encryption, and similar with encryption, variable X round numbers obtains the variable x of a byte by mod (256), and once, x updates once Equation Iterative.Take a byte and x step-by-step XOR from the 0x0000 address of 30KB stream cipher decryption internal memory 1, operation result O is stored in the 0x0000 of 30KB stream cipher decryption internal memory 2, and feeds back to participation next iteration in equation;Then the byte step-by-step XOR same with the x after renewal of the 0x0001 address of 30KB stream cipher decryption internal memory 1 is taken, operation result O is stored in the 0x0001 of 30KB stream cipher decryption internal memory 2, circulates above operation process successively by sequence of addresses until the memory address 0xyyyy of 30KB completes operation.Last 30KB memory headroom 0x0000~0xyyyy saves original video data, and wherein 0x0000~0x0014 all preserves a byte 00 and is worth, and 0x0015~0xyyyy preserves original unencrypted H.264 video stream data.Finally, before removing H.264 data, 20 bytes and all bytes after removing H.264 data, remaining, is all of H.264 compress data, sends to and H.264 decode.
Determine scramble according to maximum I frame and minimum P frame and invert the size of random internal memory 1~3: the difference according to Video Coding mode, H.264 compressed video signal is divided into every IDR frame, I frame and P frame.Every IDR frame coding essence is identical with I frame, eliminates image space redundancy by infra-frame prediction;P frame eliminates the redundancy on image temporal by inter prediction.I frame compression ratio is little more than P frame, thus I frame one definite proportion P frame is big.
Coding output mode both could be arranged to several P frames of heel of each I frame, it is also possible to is set to judge that scene changes severity determines output I frame or P frame voluntarily.The present invention adopts the former, is set to the output mode of 9 P frames of heel of every 1 I frame.H.264 will save as H264 file by compressed video data, by Elecardstreameyetools software analysis H264 file, be able to verify that the output result of setting.
Find out the maximum I frame under VGA video format (image length and width 640 × 480) and minimum P frame by experiment.Affect compressed video data size factor, except the parameter of encoder is arranged, also include the light and shade of photographed scene light, scene complexity, the severity of object of which movement.When VGA form and encoder default setting, dim light, abundant scene content, aggravate object of which movement, the data volume of each frame compressed video data can be increased.On the contrary, lighten light, reduce scene details, keep object rest, the data volume of each frame compression video can be reduced.Application program often call one time H.264 encoder encode the api function of a two field picture, obtain a function return value, characterize the size of a frame compressed video signal data.By changing experiment condition and comparing return value, it is possible to obtain maximum I frame and the size of minimum P frame.
Scrambling encryption internal memory is used for the valid data that storage flow password encryption is later, and these valid data are carried out scrambling encryption.Memory size has to comply with the most important condition: whole memory headroom just can extend as m × n rank matrix in units of 3 bytes.Under the most important condition, according to maximum I frame and P frame, select the size and number of scrambling encryption internal memory.
In order to not spill over when making the maximum I frame of storage, maximum scrambling encryption memory block must be also bigger than I frame, because 0x00 is all mended in unfilled scrambling encryption memory block space, 0x00 is redundant data, in order to reduce redundant data, bigger than I frame and when can extend as m × n rank matrix, reduce memory headroom as far as possible.Continue design scrambling encryption memory block with identical principle to be used for storing P frame.
The quantity of memory block is more many, and level is refinement more, and it is more good that memory block mates with the size of P frame, and the data of redundancy reduce, and scrambling encryption treatment effeciency improves, but the judgement number of times that each frame P frame is stored in the memory block that size is mated most increases, and affects runnability;On the contrary, memory block quantity is more few, and level is more extensive, and memory block is more poor with mating of P frame, and redundant data increases, and scrambling encryption treatment effeciency reduces, but the judgement number of times that each frame P frame is stored in the memory block that size is mated most reduces, and runnability promotes.
The quantity of memory block is chosen as the case may be, and the present invention chooses 3 memory blocks, and maximum memory block is used for depositing I frame, under meeting the most important condition more bigger than I frame, be 24300 bytes, other two memory blocks successively decrease by gradient, for depositing P frame, respectively 10800 bytes and 4800 bytes.
Chaotic Scrambling with invert unrest: according to image size, open up for scrambling encryption and 3 internal memories inverting disorderly deciphering, in figs. 2 and 3 respectively scramble internal memory 1~3, invert random internal memory 1~3.Require that 3 memory sizes successively decrease by gradient, and require that memory headroom is in units of 3 bytes, can extend as regular m × n rank matrix.Utilize position scramble and invert random chaotic maps equation:
Calculate 3 groups of scrambling encryption parameter a11,a12,a21,a22.For scramble that byte number is 24300 with invert random internal memory 1, extending in units of 3 bytes is 90 × 90 rank matrixes, and encryption parameter is 89,75,70,59;For scramble that byte number is 10800 with invert random internal memory 2, extending in units of 3 bytes equally is 60 × 60 rank matrixes, and encryption parameter is 48,35,37,27;For scramble that byte number is 4800 with invert random internal memory 3, extending in units of 3 bytes equally is 40 × 40 rank matrixes, and encryption parameter is 24,11,37,17.
At transmitting terminal, the stream cipher encrypting internal memory 2 of 30KB effectively adds ciphertext data from the storage of 0x0000~0xyyyy space through stream cipher encrypting, effectively add ciphertext data and compare size with scramble internal memory 1, scramble internal memory 2, scramble internal memory 3, if effectively encryption size of data is in 24300 byte~10800 bytes range, control to make switching switch K1 and K2 connect 1 by software, data are stored in scramble internal memory 1;If in 10800 byte~4800 bytes range, control to make switching switch K1 and K2 connect 2 by software, data are stored in scramble internal memory 2;If in 4800 byte~0 bytes range, control to make switching switch K1 and K2 connect 3 by software, data being stored in scramble internal memory 3, the data of two re-encryptions, all by being defaulted as null value, are finally sent by network and are transmitted by Ethernet by the remaining space in scramble internal memory.At receiving terminal, complete location of pixels in the same way and invert random deciphering, no longer describe in detail.
The principle of Multi-core and synchronization mechanism thereof: Multi-core essence is that application program is divided into multiple relatively independent little task, the little task of each of which is distributed to a core processor and is processed, the application program that will be originally performed by a core processor serial, it is designed as by the multiple little task of multiple core processor parallel processings, promoting the execution speed of system with this, the execution theory diagram of thread is as shown in Figure 4.The detailed description of the invention of the thread synchronization mechanism in Fig. 5 is divided into following four steps:
(1) after thread 2 has read a frame jpeg image, call pthread_cond_wait function, unlock internal memory, and wait the conditional-variable of thread 1;
(2) thread 1 being in blocked state recovers ready, calls pthread_mutex_lock function and locks internal memory, writes jpeg image in internal memory;
(3) thread 1 writes jpeg data to after internal memory, calls pthread_cond_broadcast function and sends conditional-variable, and calls pthread_mutex_unlock function and unlock internal memory;
(4) automatic lockout internal memory after thread 2 condition of acceptance variable, reads the jpeg image in internal memory.After running through data, being again introduced into the first step, call pthread_cond_wait function, unlock internal memory, so circulation realizes the data syn-chronization operation between thread.
The specific implementation process of transmitting terminal four core four thread and receiving terminal two core two thread: under linux system, the task of serial process is mainly carried out the parallelization speed with raising system process task by the effect of multithreading.In order to make system display frame rate up to 25fps (FramePerSecond), each thread runs the time within 40ms.
The task that the system processing procedure of transmitting terminal includes has: jpeg image collection, jpeg image solution is pressed into rgb format, rgb format image shows for LCD, RGB image is converted to NV12 form, H.264, NV12 format-pattern is for encoding, carry out chaos stream cipher and position scramble double-encryption after having encoded, then pass through TCP and send.The present invention adopts four threads to process above-mentioned task definition, a core cpu on each thread binding development board, according to the operation time measuring the various piece obtained, various piece is partitioned in four threads.Thread 1 includes the collection of jpeg image;Thread 2 includes jpeg image solution is pressed into rgb format;Thread 3 includes the display of RGB original image;Thread 4 includes rgb format image and is converted to NV12 form, H.264 encodes, and encryption and TCP send.Mutual exclusion lock and conditional-variable that data sharing between thread is then provided by (SuSE) Linux OS control.Mutual exclusion lock 1 and conditional-variable 1 are for the sharing of jpeg image data between thread 1 and thread 2;Mutual exclusion lock 2 and conditional-variable 2 are for the sharing of rgb image data between thread 2 and thread 3;Mutual exclusion lock 3 and conditional-variable 3 are for the sharing of rgb image data between thread 2 and thread 4.
The task that the system processing procedure of receiving terminal includes has: tcp data receives, and carries out position and inverts unrest and chaos stream cipher deciphering, and H.264 decoding obtains NV12 format-pattern, and NV12 image is converted into rgb format, and RGB image shows for LCD.The present invention adopts the task definition that two thread process are above-mentioned, a core cpu on each thread binding development board, according to the operation time measuring the various piece obtained, various piece is partitioned in two threads.Thread 1 includes tcp data and receives, deciphering, H.264 decodes and the conversion of NV12 image to RGB image;Thread 2 includes the display of RGB image.Mutual exclusion lock 1 and conditional-variable 1 is adopted to control sharing of rgb image data between thread 1 and thread 2.
Above-mentioned task divides and ensure that the average operating time of each thread is the shortest, and the shortest time waited mutually, so that video shows can arrive higher frame per second.
The above is the preferred embodiment of the present invention; certainly the scope of the claims of the present invention can not be limited with this; should be understood that; for the person of ordinary skill of the art; technical scheme is modified or equivalent replacement, without departure from the protection domain of the claims in the present invention.
Claims (10)
1. the embedded video Development of Chaotic Secure Communication Method encrypted after H.264 encoding, it is characterised in that comprise the following steps:
S1, at transmitting terminal, video data is carried out H.264 hardware encoding, chaos stream cipher encrypting, the Chaotic Scrambling encryption of location of pixels, network send, wide area network transmission;
S2, at receiving terminal, enciphered video data is received by network, the chaos completing location of pixels inverts disorderly deciphering and chaos stream cipher deciphering, when cipher key match, realize H.264 hardware decoding, under key mismatch condition, H.264 hardware decodes the communication stopping between transmitting terminal and receiving terminal after unsuccessfully.
2. embedded video Development of Chaotic Secure Communication Method according to claim 1, it is characterised in that the chaos stream cipher encrypting described in step S1 is: increase the guard byte of full 0 before video data.
3. embedded video Development of Chaotic Secure Communication Method according to claim 2, it is characterised in that the chaos stream cipher encrypting described in step S1 is: increase the guard byte of 20 full 0s before video data.
4. embedded video Development of Chaotic Secure Communication Method according to claim 1, it is characterized in that, Chaotic Scrambling described in step S1 is encrypted as: the size according to the I frame of the video data exported after H.264 hardware encoding and P frame, it is respectively adopted the memory size method of salary distribution three kinds different, adopt the method mending 0 that the byte number of video data expands to 3 × m × n, meet Chaotic Scrambling and invert disorderly required byte number.
5. embedded video Development of Chaotic Secure Communication Method according to claim 4, it is characterised in that described memory size three kinds different is determined according to maximum I frame and the minimum P frame of video data.
6. embedded video Development of Chaotic Secure Communication Method according to claim 4, it is characterised in that described memory size three kinds different respectively 24300 bytes, 10800 bytes, 2400 bytes.
7. embedded video Development of Chaotic Secure Communication Method according to claim 1, it is characterised in that the encryption equation of step S1 transmitting terminal stream cipher is:
In formula:
Wherein X, Y, Z are system state variables, aij(i, j=1,2,3) is key parameter, and variable X round numbers obtains the variable x of a byte by mod (256), and once, x updates once Equation Iterative.
8. embedded video Development of Chaotic Secure Communication Method according to claim 1, it is characterized in that, step S1 is further comprising the steps of before video data carries out H.264 hardware encoding: photographic head picked-up video, the JPEG decoding of video image, rgb format are to the conversion of YUV420 form;
Step S2 is further comprising the steps of after realizing H.264 hardware decoding: the video after YUV420 form is converted to rgb format, deciphering shows.
9. embedded video Development of Chaotic Secure Communication Method according to claim 8, it is characterised in that described step S1 transmitting terminal adopts four thread loops to perform below scheme: thread 1 circle collection video image, after thread 2 reads video image, decompression is RGB image;Thread 3 reads RGB image and shows on an lcd display;Thread 4 reads format transformation after RGB image, does H.264 compression coding, H.264 video flowing carries out chaos stream cipher encrypting, Chaotic Scrambling encryption, sends the video stream data after two re-encryptions.
10. embedded video Development of Chaotic Secure Communication Method according to claim 8, it is characterized in that, described step S2 receiving terminal adopts two thread loops to perform below scheme: thread 1 circulation receives the video stream data after the variate-value and two re-encryptions characterizing H.264 video flowing size, carry out Chaotic Scrambling deciphering, chaos stream cipher deciphering, H.264 decoding decompression, format transformation is rgb format;Thread 2 reads rgb format data and is shown in LCD display.
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