CN105789179B - The active region contact window and its manufacturing method of dynamic random access memory - Google Patents
The active region contact window and its manufacturing method of dynamic random access memory Download PDFInfo
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- CN105789179B CN105789179B CN201410803389.3A CN201410803389A CN105789179B CN 105789179 B CN105789179 B CN 105789179B CN 201410803389 A CN201410803389 A CN 201410803389A CN 105789179 B CN105789179 B CN 105789179B
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Abstract
The present invention provides the active region contact window and its manufacturing method of a kind of dynamic random access memory, memory active area manufacturing method therein, including conductive layer is formed on substrate, covers contact hole region and bit line.Above-mentioned dynamic random access memory includes at least substrate, the isolation structure in substrate, active area, the bit line on the embedded type word line and substrate of active area separated via isolation structure, wherein each active area includes multiple contact hole regions.After forming conductive layer, the above-mentioned conductive layer other than contact hole region is removed, to form multiple active region contact windows, insulating layer is formed on the substrate, covers active region contact window.
Description
Technical field
The present invention relates to a kind of dynamic random access memory (DRAM) more particularly to a kind of dynamic random access memory
Active region contact window (AA contact) and its manufacturing method.
Background technique
As great Chang Kuo factory influences, storage market environment is increasingly severe, and each Jia great factory actively joins hands to grind in process technique
Hair and reduction processing procedure cost, microtechnology are the approach that prime cost reduces.Chip size (chip size) reduce not only for
Exposure bench technology and the great challenge of etch capabilities, also as the isolation structure of wordline spacing and memory array constantly reduces,
Lead to various adverse effects.For example the part contact hole (contact) resistance value Rs leads to contact hole because chip size is miniature
Volume is and then reduced, and then contact hole resistance value is significantly increased, therefore how to improve contact hole Rs is also a big project.
Current contact hole is the ditch embankment formula formed after adopting, i.e., is lost in insulating layer or dielectric layer by etch process
Contact window is carved, conductor material is further filled with.
Summary of the invention
The present invention provides the active region contact window and its manufacturing method of a kind of dynamic random access memory, can improve contact
Window resistance value and the processing procedure window (process window) for expanding contact hole.
A kind of manufacturing method of the active region contact window of dynamic random access memory of the invention, including the shape on substrate
At conductive layer, contact hole region and bit line are covered.The dynamic random access memory is including at least the isolation in substrate, substrate
Structure, active area, the bit line on the embedded type word line and substrate of active area separated via isolation structure, wherein each
Active area includes multiple contact hole regions.Then, the above-mentioned conductive layer other than contact hole region is removed, to form multiple active areas
Contact hole forms insulating layer on the substrate, covers active region contact window.
In one embodiment of this invention, the forming method of above-mentioned active region contact window is including the use of dotted photoetching and etching
The conductive layer other than contact hole region is removed, cylindrical active region contact window is formed.
In one embodiment of this invention, the forming method of above-mentioned active region contact window include first planarization conductive layer until
Expose the top surface of bit line, recycles the conductive layer other than line style photoetching and etching removal contact hole region.
In one embodiment of this invention, the step of removing the conductive layer other than above-mentioned contact hole region is a plurality of including leaving
Line conductive layer, and partially electronically conductive line layer is changed into insulation including the use of voluntarily oxidation technology by the method for forming above-mentioned insulating layer
Material.
In one embodiment of this invention, above-mentioned voluntarily oxidation technology includes come personally steam generation technology (ISSG), wet type
Oxidizing process or low-temperature plasma oxidizing process (SPA oxide).
In one embodiment of this invention, the method for forming above-mentioned insulating layer includes being conformally formed covering active region contact
The silicon nitride layer and silicon oxynitride layer of window recycle spin-coating method to form spin-on glasses layer (SOG) on substrate.
In one embodiment of this invention, the method for above-mentioned insulating layer is formed including the use of atomic layer deposition (ALD) in base
Silicon nitride layer is inserted between active region contact window on plate.
In one embodiment of this invention, being formed before above-mentioned conductive layer can also form clearance wall in the side of bit line, with
Conductive layer and bit line is isolated.
The present invention separately provides a kind of active region contact window of dynamic random access memory, can increasingly reduce in chip size
When still maintain its low resistance and have biggish floor space.
The active region contact window of another dynamic random access memory of the invention, the dynamic random access memory
Including at least in substrate, substrate isolation structure, separated via isolation structure active area, across the flush type word of active area
Line and the bit line intersected on substrate with embedded type word line.Each active area includes multiple contact hole regions.The active area
Contact hole is located on the contact hole region, wherein each active region contact window is cylindricality；Having between bit line two-by-two
The side of source contact window is cambered surface；And the base area of each active region contact window is greater than top surface area, and bottom surface is straight
Connect the side contacted with contact hole region.
In another embodiment of the invention, the material of above-mentioned active region contact window includes polysilicon.
In another embodiment of the invention, the face of above-mentioned active region contact window and bit line contact is plane.
In another embodiment of the invention, the top surface of above-mentioned active region contact window is higher than the top surface of bit line.
In another embodiment of the invention, the top surface of above-mentioned active region contact window is flushed with the top surface of bit line.
Based on above-mentioned, the present invention is by way of being initially formed the insulating layer that contact hole re-forms between contact hole, to increase
The contact area of active region contact window and active area, and then contact hole resistance value Rs is reduced, and because active region contact window elder generation shape
At so being avoided that the problem of existing bit line and contact hole short circuit or critical voltage are lower.In addition, when the present invention is with voluntarily oxygen
Change technology forms above-mentioned insulating layer, and the ladder height that also can avoid between memory areas and peripheral region is poor.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to cooperate attached drawing to make
Carefully it is described as follows.
Detailed description of the invention
Figure 1A to Fig. 1 D is connect according to a kind of active area of dynamic random access memory of the first embodiment of the present invention
Touch the manufacturing process diagrammatic cross-section of window；
Fig. 2 is the schematic layout pattern of the dynamic random access memory of Fig. 1 C；
Fig. 3 A to Fig. 3 D is connect according to the active area of a variety of dynamic random access memory of the second embodiment of the present invention
Touch the stereoscopic schematic diagram of window；
Fig. 4 A to Fig. 4 B is connect according to a kind of active area of dynamic random access memory of the third embodiment of the present invention
Touch the manufacturing process diagrammatic cross-section of window；
Fig. 5 is the schematic layout pattern of the dynamic random access memory of Fig. 4 A；
Fig. 6 A to Fig. 6 C is connect according to a kind of active area of dynamic random access memory of the fourth embodiment of the present invention
Touch the manufacturing process diagrammatic cross-section of window.
Description of symbols:
100: substrate；
100a: contact hole region；
102: isolation structure；
104: embedded type word line；
106: bit line；
106a, 124a, 304,322,400a, 602a, 604a: top surface；
108: insulation system；
112: epitaxial layer or polysilicon layer；
114: metal layer；
116: silicon nitride layer；
118: clearance wall；
120: barrier layer；
122: conductive layer；
124,300a, 300b, 300c, 300d, 400,604: active region contact window；
124b, 306,324: bottom surface；
126: silicon nitride layer or silicon nitride/silicon oxynitride lamination；
128: spin-on glasses layer；
200: active area；
202: contact hole region；
302,310,316,320: plane；
308,312,314,318,602b, 604b: side；
402: silicon nitride layer；
600: exposure mask；
602: line conductive layer；
606: insulating materials.
Specific embodiment
Attached drawing is please referred to herein, it is of the invention with being shown in attached drawing more fully to know from experience idea of the invention
Embodiment.But many different forms can be used also to practice in the present invention, and should not be construed as limited to the beneath reality
Apply example.In fact, providing embodiment is only to make the present invention more will be detailed and complete, and fully convey the scope of the invention to institute
Belong to technical field technical staff.
In the drawings, for clarity the size and relative size in each layer and region may be made the description exaggerated.
Figure 1A to Fig. 1 D is connect according to a kind of active area of dynamic random access memory of the first embodiment of the present invention
Touch the manufacturing process diagrammatic cross-section of window.
Please refer to Figure 1A, the dynamic random access memory of the present embodiment, including at least in substrate 100, substrate 100 every
From structure 102, the active area separated via isolation structure 102 (100 position of substrate i.e. between isolation structure 102), across having
The embedded type word line 104 and the bit line 106 on substrate 100 of source region.Can have between embedded type word line 104 and bit line 106 absolutely
Edge structure 108 separates the two.And bit line 106 is for example by epitaxial layer or polysilicon layer 112, metal layer 114 and silicon nitride layer 116
It constitutes, but the present invention is not limited thereto.In addition, clearance wall 118 can be formed in the side of bit line 106, to protect bit line 106 not
It is influenced by follow-up process.One layer of barrier layer 120 is then usually had between embedded type word line 104 and substrate 100.
In one embodiment, the material of isolation structure 102 such as silica, silicon nitride or other suitable materials.One
In embodiment, the material of embedded type word line 104 such as tungsten, aluminium, copper or other suitable materials.In one embodiment, insulation knot
Structure 108 such as silica, silicon nitride or other suitable materials.In one embodiment, the material of metal layer 114 such as titanium, nitrogen
Change titanium, tungsten or aluminium/copper lamination and other suitable materials.In one embodiment, the material of clearance wall 118 such as silica,
Silicon nitride or other suitable materials.In one embodiment, such as silica of barrier layer 120 or other suitable materials.
Then, Figure 1B is please referred to, conductive layer 122 is formed on the substrate 100, covers the contact hole region in each active area
100a, and the thickness of conductive layer 122 is such as enough big, can cover the top surface 106a of bit line.The material of conductive layer 122 such as doped polycrystalline
Silicon, titanium, titanium nitride, tungsten or other suitable conductive materials.
Then, Fig. 1 C is please referred to, the conductive layer (see the 122 of Figure 1B) other than the 100a of contact hole region is removed, and is formed
Multiple active region contact windows 124, and referring to Fig. 2, section line segment therein is exactly the position of corresponding diagram 1C.In Fig. 2,
Bit line 106 intersects with embedded type word line 104, and single active area 200 is then divided into multiple contact hole regions by embedded type word line 104
(see the 100a of Fig. 1 C).In the first embodiment, the method for forming active region contact window 124 for example utilizes dotted (dot) light
The conductive layer other than removal contact hole region 202 is carved and etches, it is so-called dotted to form cylindrical active region contact window 124
(dot) photoetching and etching are exactly dotted photoresist layer to be formed using micro-photographing process, and cover using this dotted photoresist layer as etching
Film carries out the etch process of conductive layer.Since etch process can be because of and side very fast closer to the etch-rate in center etch area
The etch-rate of wall etching region is slower, so be easy to causeing etching sectional area to be gradually reduced from top to bottom, therefore above-mentioned cylindrical
The bottom surface 124b area of active region contact window 124 is greater than top surface 124a area.
Later, Fig. 1 D is please referred to, in forming insulating layer on substrate 100, such as is first conformally formed covering active region contact
The silicon nitride layer or silicon nitride/silicon oxynitride lamination 126 of window 124 recycle spin-coating method (spin coating) in substrate 100
Upper formation spin-on glasses layer (SOG) 128 covers active region contact window 124.Since the present embodiment is to be initially formed active region contact
Window 124 re-forms insulating layer, so can be by more loose processing procedure window shape at down big up small cylindricality active region contact window
124, increase the contact area between active region contact window 124 and contact hole region 100a, and then reach reduction contact hole resistance
The effect of value Rs.So-called more loose processing procedure window is due to being formed by cylindricality active exposure window 124 than being formed after tradition
Contact hole be greater, and the contact hole of traditional rear formation is because conductor will be further filled with (i.e. by etching contact window
Ditch embankment formula), so in order to avoid the bit line 106 on damage side, therefore its size is all than the cylindricality active exposure of the present embodiment
Window 124 wants small, it is also necessary to its position is precisely controlled, so such as contact window position allows offset is also opposite to want small.Moreover,
Because active region contact window 124 and the production of non-used ditch embankment formula, are also avoided that and contact window opening in the past to be formed
(opening) it destroys short circuit caused by bit line side (such as the clearance wall 118 of Figure 1A) or critical voltage (Vth) is low asks
Topic.
Fig. 3 A to Fig. 3 D is connect according to the active area of a variety of dynamic random access memory of the second embodiment of the present invention
Touch the stereoscopic schematic diagram of window.
In figure 3 a, active region contact window 300a is in the layout that the position of dynamic random access memory can refer to Fig. 2
On contact hole region 202 between bit line, and the top surface 304 of active region contact window 300a is higher than the top surface of bit line (as schemed
106a in 1C), so with there are also part active region contact window 300a above the face 302 (such as plane) of bit line contact.Fig. 3 A is aobvious
That show is single active region contact window 300a, slightly cylindrical, and the side 308 between bit line is cambered surface.Moreover, active area
306 area of bottom surface of contact hole 300a is greater than 304 area of top surface, and the bottom surface 306 in text refers to and directly connects with contact hole region
The side of touching.
In figure 3b, the face 310 of active region contact window 300b and bit line contact is plane, the side 312 between bit line
Be cambered surface and active region contact window 300b top surface it is higher than bit line, but the top surface of the active region contact window 300b in this figure and
Bottom surface is same area.
In fig. 3 c, the top surface of active region contact window 300c with the top surface of bit line because flush, between bit line
Side 314 is cambered surface, with the face 316 of bit line contact is plane.
In fig. 3d, the top surface of active region contact window 300d with the top surface of bit line because flush, as Fig. 3 C,
Side 318 between bit line is cambered surface, is plane with the face 320 of bit line contact, and difference is that its bottom surface 324 is greater than top surface 322.
Several enforceable examples of the active region contact window of figure 3 above A to Fig. 3 D only to illustrate the invention, but not with
This is limited.
Fig. 4 A to Fig. 4 B is connect according to a kind of active area of dynamic random access memory of the third embodiment of the present invention
The manufacturing process diagrammatic cross-section for touching window, wherein being represented using the component symbol being identical with the first embodiment same or similar
Component.
In the present embodiment, after the step of forming conductive layer can refer to Figure 1B of first embodiment, A, is formed referring to figure 4.
Multiple active region contact windows 400, method for example first planarize conductive layer until the top surface 106a of its top surface 400a and bit line is neat
It is flat, and referring to Fig. 5, using line style (line) photoetching and etching removal partial electroconductive layer, the section line segment in Fig. 5 is exactly
The position of corresponding diagram 4A, so active region contact window 400 is generally between bit line 106 and contacts with active area 200.Above-mentioned line
Type (line) photoetching and etching be exactly using micro-photographing process formed line style photoresist layer, and using this line style photoresist layer as etch
Exposure mask carries out the etch process of conductive layer.
Later, B referring to figure 4., in forming insulating layer on substrate 100, such as using atomic layer deposition (ALD) in substrate
Silicon nitride layer 402 is inserted between active region contact window 400 on 100.Since the present embodiment is to be initially formed active region contact window 400
Silicon nitride layer 402 is re-formed, so the contact of active region contact window 400 with substrate 100 can be made by more loose processing procedure window
Area increases, and then achievees the effect that reduce contact hole resistance value Rs.So-called more loose processing procedure window is due to after traditional
The contact hole of formation is because conductor (i.e. ditch embankment formula) will be further filled with by etching contact window, in order to avoid damage
The bit line 106 on side, it is necessary to its position is precisely controlled, so this contact window position allows offset is opposite to be formed by
Source contact window 400 wants small, therefore the processing procedure window of the contact hole of traditional rear formation is obviously smaller than the active area of the present embodiment and connects
Touch window 40.
Fig. 6 A to Fig. 6 C is connect according to a kind of active area of dynamic random access memory of the fourth embodiment of the present invention
The manufacturing process diagrammatic cross-section for touching window, wherein being represented using the component symbol being identical with the first embodiment same or similar
Component.
In the present embodiment, after the step of forming conductive layer can refer to Figure 1B of first embodiment, selectively to conduction
Layer 122 carries out the planarization process such as chemical mechanical grinding (CMP), referring next to Fig. 6 A, in corresponding to contact hole on conductive layer 122
The appropriate location of region 100a forms exposure mask 600, material such as photoresist, silicon nitride or other suitable materials.
Then, Fig. 6 B is please referred to, using exposure mask 600 as etching mask, removes the conductive layer of exposing, and leaves line conductive layer
602.Top surface 106a high of the top surface 602a of line conductive layer 602 than bit line 106.
Then, Fig. 6 C is please referred to, using voluntarily oxidation technology (self-oxidation), partially electronically conductive line layer is changed into
Insulating materials 606, voluntarily oxidation technology therein for example when participating in the cintest steam generation technology (ISSG), wet oxidation process or low temperature etc. from
Sub- oxidizing process (SPA oxide).Since the present embodiment is to form insulating layer by voluntarily oxidation technology, so the conductor wire of Fig. 6 B
Layer 602 will become as active region contact window 604, and the top surface 602a of Fig. 6 B can be reduced to the top surface 604a of Fig. 6 C, side 602b
Also it can be reduced to the side 604b of Fig. 6 C inside.Since the present embodiment is to utilize voluntarily oxidation technology, rather than in addition deposition insulate
Material, so insulating materials will not also be formed in the peripheral region other than memory areas.Therefore, according to the processing procedure of fourth embodiment,
It is poor to eliminate the ladder height between memory areas and peripheral region (step height) that there is no need to additional CMP steps.
In conclusion method of the invention can produce down big up small contact hole, and the contact hole side between bit line
Face is cambered surface, so can increase the contact area of active region contact window Yu substrate (active area), and then reaches reduction contact hole resistance
The effect of value Rs.Moreover, because active region contact window is initially formed, rather than tradition is initially formed insulating layer and is wherein to form contact
The mode of window opening, so being avoided that short circuit or critical voltage caused by protecting structure because of the clearance wall etc. for destroying bit line side become
Low problem.In addition, the present invention can also form the insulating layer between active region contact window with voluntarily oxidation technology, to avoid
There is the problem of ladder height difference between memory areas and peripheral region.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (13)
1. a kind of manufacturing method of the active region contact window of dynamic random access memory, which is characterized in that the dynamic random
Access memory includes at least substrate, multiple isolation structures in the substrate, multiple has via what the isolation structure separated
Source region, the multiple bit lines on several embedded type word lines and the substrate of the active area, wherein each described active
Area includes multiple contact hole regions, and the manufacturing method includes:
Conductive layer is formed on the substrate, covers the contact hole region and the bit line；
The conductive layer other than the contact hole region is removed, to form multiple active region contact windows；And
Insulating layer is formed on the substrate, covers the active region contact window.
2. the manufacturing method of the active region contact window of dynamic random access memory according to claim 1, feature exist
In the method for forming the active region contact window includes: to be removed other than the contact hole region using dotted photoetching and etching
The conductive layer forms the cylindrical active region contact window.
3. the manufacturing method of the active region contact window of dynamic random access memory according to claim 1, feature exist
In the method for forming the active region contact window includes: top surface of the planarization conductive layer until exposing the bit line；And
The conductive layer other than the contact hole region is removed using line style photoetching and etching.
4. the manufacturing method of the active region contact window of dynamic random access memory according to claim 1, feature exist
In the step of removing the conductive layer other than the contact hole region includes leaving a plurality of line conductive layer；And described in being formed
The method of insulating layer is changed into insulating materials including the use of voluntarily oxidation technology, by the part line conductive layer.
5. the manufacturing method of the active region contact window of dynamic random access memory according to claim 4, feature exist
In the voluntarily oxidation technology includes come personally steam generation technology, wet oxidation process or low-temperature plasma oxidizing process.
6. the manufacturing method of the active region contact window of dynamic random access memory according to claim 1, feature exist
In the method for forming the insulating layer includes: to be conformally formed the silicon nitride layer and nitrogen oxidation that cover the active region contact window
Silicon layer；And form spin-on glasses layer on the substrate using spin-coating method.
7. the manufacturing method of the active region contact window of dynamic random access memory according to claim 1, feature exist
In, formed the method for the insulating layer including the use of the Atomic layer deposition method active region contact window on the substrate it
Between insert silicon nitride layer.
8. the manufacturing method of the active region contact window of dynamic random access memory according to claim 1, feature exist
In, being formed further includes forming clearance wall in the side of the bit line before the conductive layer, be isolated the conductive layer with it is described
Bit line.
9. a kind of active region contact window of dynamic random access memory, the dynamic random access memory includes at least base
Multiple isolation structures in plate, the substrate, the multiple active areas separated via the isolation structure, across the active area
Several embedded type word lines and several bit lines intersected on the substrate with the embedded type word line, wherein having described in each
Source region includes multiple contact hole regions, it is characterised in that:
The active region contact window is located on the contact hole region, wherein
Each active region contact window is cylindricality；
The side of the active region contact window between the bit line two-by-two is cambered surface；And
The base area of each active region contact window is greater than top surface area, and the bottom surface directly connects with the contact hole region
Touching.
10. the active region contact window of dynamic random access memory according to claim 9, which is characterized in that described to have
The material of source contact window includes polysilicon.
11. the active region contact window of dynamic random access memory according to claim 9, which is characterized in that described to have
The face of source contact window and institute's bitline contact is plane.
12. the active region contact window of dynamic random access memory according to claim 9, which is characterized in that described to have
The top surface of source contact window is higher than the top surface of the bit line.
13. the active region contact window of dynamic random access memory according to claim 9, which is characterized in that described to have
The top surface of source contact window is flushed with the top surface of the bit line.
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| CN108281424B (en) * | 2017-01-06 | 2021-09-14 | 联华电子股份有限公司 | Semiconductor element and manufacturing method thereof |
| CN108933136B (en) * | 2018-08-22 | 2023-09-26 | 长鑫存储技术有限公司 | Semiconductor structure, memory structure and preparation method thereof |
| CN111048467A (en) * | 2018-10-11 | 2020-04-21 | 长鑫存储技术有限公司 | Semiconductor device bit line forming method and semiconductor device |
| KR102605621B1 (en) | 2019-01-25 | 2023-11-23 | 삼성전자주식회사 | Method for manufacturing semiconductor device having buried gate electrodes |
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|---|---|---|---|---|
| CN1627497A (en) * | 2003-12-10 | 2005-06-15 | 南亚科技股份有限公司 | Method for forming contact window of bit line |
| CN1819154A (en) * | 2005-02-08 | 2006-08-16 | 联华电子股份有限公司 | Production of dynamic random access memory |
| CN103377997A (en) * | 2012-04-11 | 2013-10-30 | 南亚科技股份有限公司 | Method for forming buried conductive line and structure of buried conductive line |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1627497A (en) * | 2003-12-10 | 2005-06-15 | 南亚科技股份有限公司 | Method for forming contact window of bit line |
| CN1819154A (en) * | 2005-02-08 | 2006-08-16 | 联华电子股份有限公司 | Production of dynamic random access memory |
| CN103377997A (en) * | 2012-04-11 | 2013-10-30 | 南亚科技股份有限公司 | Method for forming buried conductive line and structure of buried conductive line |
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