CN105786421B - Server display method and device - Google Patents
Server display method and device Download PDFInfo
- Publication number
- CN105786421B CN105786421B CN201410826680.2A CN201410826680A CN105786421B CN 105786421 B CN105786421 B CN 105786421B CN 201410826680 A CN201410826680 A CN 201410826680A CN 105786421 B CN105786421 B CN 105786421B
- Authority
- CN
- China
- Prior art keywords
- bmc
- epld
- pch
- display
- display screen
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
The invention discloses a server display method and device, and relates to the technical field of computer application. The server display device comprises a bridge piece PCH, a single board management controller BMC and a newly-added display unit connected with both the PCH and the BMC, wherein the newly-added display unit outputs pre-stored information to a display screen if detecting that the PCH sends out a starting state signal when the BMC is not started, and switches a video graphics array VGA signal output by a display module of the BMC to the display screen when detecting that the display module of the BMC is initialized. The invention also discloses a server display method. According to the technical scheme, the display blank of the power-on self-checking period is filled, the product user experience is improved, the error indication in the self-checking stage can be output to the display screen, and the product fault can be conveniently and rapidly positioned.
Description
Technical Field
The invention relates to the technical field of computer application, in particular to a rapid display scheme of a server.
Background
With the development of server technology, more and more devices are integrated into a server product, so that the time of the power-on self-test phase of the BIOS is longer and longer, and the time is not negligible. The power-on self-test is executed before the system display module is initialized, no output is generated when the display screen is blank in the self-test period, and the user experience is poor. In the self-checking stage, if equipment is abnormal, no intuitive means is available for acquiring abnormal information, and the difficulty in positioning the server fault is increased.
Disclosure of Invention
The invention aims to provide a server display method and a server display device, and aims to solve the problem that a display screen is dark in a BISO power-up self-test stage in the prior art.
In order to solve the technical problem, the invention discloses a server display device, which comprises a bridge plate PCH and a single board management controller BMC, and further comprises a newly-added display unit connected with the PCH and the BMC;
and the newly-added display unit outputs pre-stored information to a display screen if detecting that the PCH sends out a starting state signal when the BMC is not started, and switches a Video Graphics Array (VGA) signal output by the display module of the BMC to the display screen when detecting that the display module of the BMC is initialized.
Optionally, in the above apparatus, the newly added display unit further outputs pre-stored information to a display screen according to control of the BMC when the BMC has already been started but a display module of the BMC is not initialized.
Optionally, in the above apparatus, the newly added display unit at least includes an erasable programmable logic device EPLD and a switch device, where:
the EPLD is connected with the PCH, the BMC and the switch device, when the BMC is not started, if the PCH is detected to send out a starting state signal, the input selection signal of the switch device is controlled to be a VGA signal output by the EPLD, and when the display module of the BMC is detected to be initialized, the input selection signal of the switch device is controlled to be a VGA signal output by the display module of the BMC;
the switching device is connected with the BMC and the EPLD, outputs information prestored in the EPLD to a display screen when the EPLD or the BMC control input selection signal is a VGA signal output by the EPLD, and switches a middle VGA signal output by a display module of the BMC to the display screen when the EPLD control input selection signal is a VGA signal output by the display module of the BMC.
Optionally, in the above apparatus, the newly added display unit further includes a voltage dividing resistor, and the voltage dividing resistor is configured to adjust an output voltage of the EPLD to meet a VGA signal standard.
Optionally, in the above apparatus, the EPLD is provided with a first register for inputting the selection signal of the switching device, and the EPLD controls the input selection signal of the switching device by reading and writing the first register.
Optionally, in the above apparatus, the BMC reads and writes the first register in the EPLD through a bus to control the input selection signal of the switching device.
Optionally, in the above apparatus, the EPLD is provided with a second register for the start status signal of the PCH, and the EPLD reads the second register to detect the start status signal sent by the PCH.
Optionally, in the above apparatus, when the BMC is not started, if the EPLD detects that the PCH sends a start status signal, the apparatus outputs pre-stored information to a display finger:
the EPLD reads the value of the second register;
judging scene information indicated by a starting state signal sent by the PCH according to the read value, and outputting prestored information corresponding to the judged scene information to a display screen;
wherein, the scene information indicated by the start status signal sent by the PCH at least includes one or more of the following:
and indicating whether the power-on self-test of the BIOS code is finished or not by an error.
The invention also discloses a server display method, which comprises the following steps:
when a single board management controller BMC on a mainboard of the server is not started, if a starting state signal is sent out by a bridge piece PCH on the mainboard, information prestored by a newly-added display unit on the mainboard is output to a display screen, and a video graphic array VGA signal output by a display module of the BMC is switched to the display screen until the initialization of the display module of the BMC is detected to be completed.
Optionally, the method further includes:
and when the BMC is started and the display module of the BMC is not initialized, the newly added display unit outputs pre-stored information to a display screen according to the control of the BMC.
Optionally, in the above method, the newly added display unit at least includes an erasable programmable logic device EPLD and a switch device;
when the BMC is not started, if the EPLD detects that the PCH sends a starting state signal, controlling a switch device to output information prestored in the EPLD to a display screen;
and when the EPLD detects that the display module of the BMC is initialized, the EPLD controls the switch device to switch the VGA signal output by the display module of the BMC to a display screen.
Optionally, in the foregoing method, the newly added display unit further includes a voltage dividing resistor, and the voltage dividing resistor adjusts the output voltage of the EPLD to meet the VGA signal standard.
Optionally, in the above method, the EPLD controls the switching device to output information prestored in the EPLD to the display screen finger:
and the EPLD controls the input selection signal of the switching device through reading and writing of a first register, wherein the first register is used for setting the input selection signal of the switching device.
Optionally, in the above method, the newly added display unit outputs pre-stored information to the display screen according to the control of the BMC:
and the BMC reads and writes a first register in the EPLD through a bus and controls an input selection signal of the switch device.
Optionally, in the foregoing method, the detecting, by the newly added unit, that the PCH on the motherboard sends the start status signal indicates that:
the EPLD detects the enable state of the PCH by reading a second register, wherein the second register is used to store an enable state signal of the PCH.
Optionally, in the method, when the BMC on the motherboard of the server is not started, if it is detected that the PCH on the motherboard sends a start status signal, a process of outputting information prestored by a newly added display unit on the motherboard to the display screen includes:
the EPLD reads the value of the second register;
judging scene information indicated by a starting state signal sent by the PCH according to the read value, and outputting prestored information corresponding to the judged scene information to a display screen;
wherein, the scene information indicated by the start status signal sent by the PCH at least includes one or more of the following:
and indicating whether the power-on self-test of the BIOS code is finished or not by an error.
According to the technical scheme, the display blank of the power-on self-checking period is filled, the product user experience is improved, the error indication in the self-checking stage can be output to the display screen, and the product fault can be conveniently and rapidly positioned.
Drawings
Fig. 1 is a schematic structural diagram of a server display device provided in a preferred embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be further described in detail with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments of the present application may be arbitrarily combined with each other without conflict.
Example 1
The embodiment provides a server display device, which mainly adds a set of display units independent of the original system on a server mainboard, solves the problem that the display of the original system has no output in the power-on self-test stage, and can output error indication of the stage to a display screen.
The server display device provided by this embodiment at least includes a PCH and a BMC, and a newly added display unit connected to both the PCH and the BMC.
When the BMC is not started, if a starting state signal sent by the PCH is detected, the newly added display unit outputs pre-stored information to a display screen, and when the display module of the BMC is detected to be initialized, the VGA signal output by the display module of the BMC is switched to the display screen.
When the BMC is started and the display module of the BMC is not initialized, the newly added display unit can output pre-stored information to the display screen according to the control of the BMC.
Preferably, the newly added display unit includes at least an EPLD and a switching device.
The EPLD is connected with the PCH, the BMC and the switch device, when the BMC is not started, if the PCH is detected to send out a starting state signal, the input selection signal of the switch device is controlled to be a VGA signal output by the EPLD, and when the display module of the BMC is detected to be initialized, the input selection signal of the switch device is controlled to be a VGA signal output by the display module of the BMC;
and the switching device is connected with both the BMC and the EPLD, outputs the information prestored in the EPLD to the display screen when the EPLD or BMC control input selection signal is the VGA signal output by the EPLD, and switches the VGA signal output by the display module of the BMC to the display screen when the EPLD control input selection signal is the VGA signal output by the display module of the BMC.
Specifically, the EPLD may control the input selection signal of the switching device through a register, that is, a first register in which the input selection signal of the switching device is set in the EPLD, and the input selection signal of the switching device may be controlled by reading and writing the first register. Similarly, the BMC may read and write the first register in the EPLD through the LocalBus bus, thereby controlling the input selection signal of the switching device.
The EPLD may also be implemented by a register when detecting the enable status signal sent by the PCH. That is, the EPLD is provided with a second register for the PCH start status signal, and the EPLD can detect the PCH start status signal by reading the second register.
It should be noted that the start state signal sent by the PCH is a group of signals, and a specific scenario in which the PCH start state is located can be determined according to the group of signals, for example, which stage the BIOS code power-on self test is in, whether the BIOS code power-on self test is completed, or the like. Therefore, the preferable scheme proposes that after the EPLD reads the value of the second register, the EPLD determines the scene information indicated by the start status signal sent by the PCH according to the read value, and outputs the pre-stored information corresponding to the determined scene information to the display screen.
In this embodiment, the scene information indicated by the start status signal sent by the PCH at least includes one or more of the following:
and indicating whether the BIOS code power-on self-test is finished or not according to the error indication in which stage the BIOS code power-on self-test is positioned.
In addition, the newly added display unit can also comprise a voltage dividing resistor which is mainly used for adjusting the output voltage of the EPLD to accord with the VGA signal standard.
The following detailed description is made on a specific implementation of the server display device provided in the preferred embodiment with reference to fig. 1:
at present, a normal display circuit of a main board (7) of a server is that a CPU (1) is connected to a PCH (2) through a DMI bus, the PCH (2) and a BMC (3) are interconnected through a PCIe bus, a display module is integrated on the BMC (3), a VGA signal is led out by the BMC (3) to a main board VGA socket, and the VGA socket is connected with a display VGA cable so as to light a display screen.
In the scheme of the embodiment, a set of display unit independent of the original system is added on a server main board (7), namely, an EPLD (4), a divider resistor (5) and a switch device (6) are added on the main board (7), information to be displayed is prestored in an on-chip storage space of the EPLD (4), and the EPLD (4) provides a VGA signal to form a set of display circuit independent of the system. The switching device (6) selects by default the VGA signal output by the EPLD (4) to be connected to the VGA socket.
Wherein, BMC (3) and EPLD (4) have different control priority to the switch device, before BMC (3) is started, EPLD (4) is used for controlling, and after BMC (3) is started, BMC (3) is used for controlling the input selection signal of the switch device (6).
Specifically, the BMC (3) boot status signal may be coupled to EPLD (4), for example, EPLD (4) may detect that the boot status signal of BMC3 is low, indicating that BMC (3) is not boot-up complete, and if high is detected, indicating that BMC (3) is boot-up complete.
The complete working process of the device is that when a power switch of the server is pressed:
if the EPLD (4) detects that the BMC (3) is not started completely, the EPLD (4) detects a starting state signal sent by the PCH (2), and information prestored in the on-chip storage space of the EPLD (4) is output to a display screen according to the starting state signal. When the display module of the BMC (3) is detected to be initialized, the control switch device (6) is switched to the VGA signal output by the display module integrated with the BMC (3).
If the EPLD (4) detects that the BMC (3) has started up completely, the BMC (3) controls the switch device (6). Before the display module is not initialized, VGA signals output by the EPLD (4) are selected to the VGA socket, information prestored in a storage space on the EPLD (4) is output to the display screen, and after the initialization of the display module is completed, VGA signals of the display module integrated by the BMC (3) are selected to the VGA socket, so that the rapid display function of a server product is realized.
Example 2
The embodiment provides a server display method, which mainly solves the problem that the display of the prior server at the power-up self-test stage has no output, and comprises the following steps:
when BMC on a mainboard of the server is not started, if PCH on the mainboard is detected to send out a starting state signal, information prestored by a newly-added display unit on the mainboard is output to a display screen, and a VGA signal output by a display module of the BMC is switched to the display screen until initialization of the display module of the BMC is detected to be completed.
In addition, when the BMC is started and the display module of the BMC is not initialized, the newly added display unit in the server can output pre-stored information to the display screen according to the control of the BMC.
Since the newly added display unit at least includes the EPLD and the switching device, the specific display process includes the following operations:
when the BMC is not started, if the EPLD detects that the PCH sends out a starting state signal, the switch device is controlled to output information prestored in the EPLD to a display screen;
when the EPLD detects that the initialization of the display module of the BMC is completed, the EPLD controls the switch device to switch the middle VGA signal output by the display module of the BMC to the display screen.
When the input selection signal of the EPLD control switch device outputs the information prestored in the EPLD to the display screen, the information is read and written through a first register, and the first register is used for setting the input selection signal of the switch device.
When the BMC controls the input selection signal of the switch device, the first register in the EPLD is read and written through a LocalBus bus.
The method also involves detecting a start status signal sent by the PCH on the motherboard by the add-on unit by reading a second register for storing the start status signal of the PCH.
It should be noted that the start status signal of the PCH includes a group of signals, and when the EPLD detects the start status signal sent by the PCH on the motherboard, a specific scenario may be determined according to different values of the second register, so as to select to output different information, this process includes:
the EPLD reads the value of the second register;
judging scene information indicated by a starting state signal sent by the PCH according to the read value, and outputting prestored information corresponding to the judged scene information to a display screen;
the scene information indicated by the start status signal sent by the PCH at least includes one or more of the following:
and indicating whether the BIOS code power-on self-test is finished or not according to the error indication in which stage the BIOS code power-on self-test is positioned.
Preferably, the method includes adjusting the output voltage of the EPLD to meet the VGA signal standard, specifically, by adding a voltage dividing resistor to the newly added display unit.
Since the method of this embodiment can be implemented by relying on the server display device provided in embodiment 1, other detailed descriptions of the method can refer to the corresponding contents of embodiment 1, and are not described herein again.
It can be seen from the above embodiments that, in the technical solution of the present application, the display circuit is formed by adding the EPLD and the switch on the motherboard, and when the BMC-integrated display module is not initialized yet, the display function of the display screen is provided. When a server product presses a power switch, the first step of BIOS codes is to carry out power-on self-test, the duration is several seconds and more than ten minutes, and the power-on self-test is determined according to the configuration complexity of the server product. The power-on self-test is that the display screen has no output when being blank in the self-test period before the display module is initialized. The scheme can fill up the display blank of the power-on self-checking period, improve the product user experience, output the error indication in the self-checking stage to the display screen, and conveniently and quickly locate the product fault.
It will be understood by those skilled in the art that all or part of the steps of the above methods may be implemented by instructing the relevant hardware through a program, and the program may be stored in a computer readable storage medium, such as a read-only memory, a magnetic or optical disk, and the like. Alternatively, all or part of the steps of the above embodiments may be implemented using one or more integrated circuits. Accordingly, each module/unit in the above embodiments may be implemented in the form of hardware, and may also be implemented in the form of a software functional module. The present application is not limited to any specific form of hardware or software combination.
The above description is only a preferred example of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (14)
1. A server display device comprises a bridge piece PCH and a single board management controller BMC, and is characterized by also comprising a newly-added display unit connected with the PCH and the BMC;
the newly-added display unit outputs pre-stored information to a display screen if detecting that the PCH sends a starting state signal when the BMC is not started, and switches a Video Graphics Array (VGA) signal output by a display module of the BMC to the display screen when detecting that the display module of the BMC is initialized;
the newly added display unit at least comprises an Erasable Programmable Logic Device (EPLD) and a switch device, wherein:
the EPLD is connected with the PCH, the BMC and the switch device, when the BMC is not started, if the PCH is detected to send out a starting state signal, the input selection signal of the switch device is controlled to be a VGA signal output by the EPLD, and when the display module of the BMC is detected to be initialized, the input selection signal of the switch device is controlled to be a VGA signal output by the display module of the BMC;
the switching device is connected with the BMC and the EPLD, outputs information prestored in the EPLD to a display screen when the EPLD or the BMC control input selection signal is a VGA signal output by the EPLD, and switches a middle VGA signal output by a display module of the BMC to the display screen when the EPLD control input selection signal is a VGA signal output by the display module of the BMC.
2. The apparatus of claim 1,
and the newly added display unit outputs pre-stored information to a display screen according to the control of the BMC when the BMC is started and the display module of the BMC is not initialized.
3. The apparatus of claim 1, wherein the newly added display unit further comprises a voltage dividing resistor for adjusting the output voltage of the EPLD to conform to the VGA signal standard.
4. The apparatus of claim 1, wherein a first register of input selection signals of the switching devices is provided in the EPLD, and the EPLD controls the input selection signals of the switching devices by reading from and writing to the first register.
5. The apparatus of claim 4, wherein the BMC controls the input select signal of the switching device by reading and writing a first register in the EPLD via a bus.
6. The apparatus of claim 1, wherein the EPLD has a second register for the enable status signal for the PCH set therein, the EPLD reading the second register to detect the enable status signal sent by the PCH.
7. The apparatus of claim 6, wherein when the BMC is not booted, if the EPLD detects that the PCH sends a boot status signal, then outputting pre-stored information to a display finger:
the EPLD reads the value of the second register;
judging scene information indicated by a starting state signal sent by the PCH according to the read value, and outputting prestored information corresponding to the judged scene information to a display screen;
wherein, the scene information indicated by the start status signal sent by the PCH at least includes one or more of the following:
and indicating whether the power-on self-test of the BIOS code is finished or not by an error.
8. A server display method, comprising:
when a single board management controller BMC on a mainboard of the server is not started, if a bridge piece PCH on the mainboard is detected to send a starting state signal, information prestored by a newly-added display unit on the mainboard is output to a display screen until the initialization of a display module of the BMC is detected to be completed, and then a video graphic array VGA signal output by the display module of the BMC is switched to the display screen;
the newly added display unit at least comprises an Erasable Programmable Logic Device (EPLD) and a switch device;
when the BMC is not started, if the EPLD detects that the PCH sends a starting state signal, controlling a switch device to output information prestored in the EPLD to a display screen;
and when the EPLD detects that the display module of the BMC is initialized, the EPLD controls the switch device to switch the VGA signal output by the display module of the BMC to a display screen.
9. The method of claim 8, further comprising:
and when the BMC is started and the display module of the BMC is not initialized, the newly added display unit outputs pre-stored information to a display screen according to the control of the BMC.
10. The method of claim 8, wherein the newly added display unit further comprises a voltage divider resistor, and the voltage divider resistor adjusts the output voltage of the EPLD to conform to the VGA signal standard.
11. The method of claim 8, wherein the EPLD controlling the switching device to output the information pre-stored in the EPLD to a display screen indicates:
and the EPLD controls the input selection signal of the switching device through reading and writing of a first register, wherein the first register is used for setting the input selection signal of the switching device.
12. The method of claim 11, wherein the newly added display unit outputs pre-stored information to a display screen according to the control of the BMC:
and the BMC reads and writes a first register in the EPLD through a bus and controls an input selection signal of the switch device.
13. The method as claimed in claim 8, wherein the detecting of the PCH on the motherboard by the newly added display unit sends an active status signal indicating:
the EPLD detects the enable state of the PCH by reading a second register, wherein the second register is used to store an enable state signal of the PCH.
14. The method as claimed in claim 13, wherein when the BMC on the motherboard of the server is not booted, if it is detected that the PCH on the motherboard sends a boot status signal, outputting information pre-stored in a newly added display unit on the motherboard to the display screen comprises:
the EPLD reads the value of the second register;
judging scene information indicated by a starting state signal sent by the PCH according to the read value, and outputting prestored information corresponding to the judged scene information to a display screen;
wherein, the scene information indicated by the start status signal sent by the PCH at least includes one or more of the following:
and indicating whether the power-on self-test of the BIOS code is finished or not by an error.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410826680.2A CN105786421B (en) | 2014-12-25 | 2014-12-25 | Server display method and device |
| PCT/CN2015/073653 WO2016101411A1 (en) | 2014-12-25 | 2015-03-04 | Server display method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410826680.2A CN105786421B (en) | 2014-12-25 | 2014-12-25 | Server display method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105786421A CN105786421A (en) | 2016-07-20 |
| CN105786421B true CN105786421B (en) | 2020-11-03 |
Family
ID=56149039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410826680.2A Active CN105786421B (en) | 2014-12-25 | 2014-12-25 | Server display method and device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN105786421B (en) |
| WO (1) | WO2016101411A1 (en) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106407090B (en) * | 2016-09-23 | 2020-03-24 | 郑州云海信息技术有限公司 | Status display panel of optical path diagnosis server |
| CN106406968A (en) * | 2016-11-25 | 2017-02-15 | 湖南长城银河科技有限公司 | Graphics card equipment switching device and method based on Feiteng platform, and server |
| CN108153625A (en) * | 2016-12-06 | 2018-06-12 | 佛山市顺德区顺达电脑厂有限公司 | The method for recording System self-test mistake |
| CN106951358A (en) * | 2017-02-07 | 2017-07-14 | 深圳市智微智能科技开发有限公司 | A kind of quick display status information method and system during computer system power-on self-test based on UEFI standards |
| CN107193520A (en) * | 2017-06-01 | 2017-09-22 | 郑州云海信息技术有限公司 | A kind of screenshotss method applied to server |
| CN108255685A (en) * | 2018-01-15 | 2018-07-06 | 郑州云海信息技术有限公司 | A kind of server display circuit and method |
| CN109144824B (en) * | 2018-07-19 | 2022-07-08 | 中科曙光信息产业成都有限公司 | Running state display device of double-path server node |
| CN109885437A (en) * | 2019-02-25 | 2019-06-14 | 西安易朴通讯技术有限公司 | Baseboard management controller BMC, terminal and power-up state diagnotic module, method |
| CN109905758A (en) * | 2019-03-13 | 2019-06-18 | 苏州浪潮智能科技有限公司 | A kind of method for displaying user interface and relevant apparatus of server |
| CN109918143A (en) * | 2019-03-20 | 2019-06-21 | 浪潮商用机器有限公司 | OpenPOWER platform starts information display method and relevant apparatus |
| CN109947490A (en) * | 2019-03-20 | 2019-06-28 | 浪潮商用机器有限公司 | A kind of starting information processing method, device, electronic equipment and readable storage medium storing program for executing |
| CN111966189B (en) * | 2020-09-18 | 2022-11-25 | 苏州浪潮智能科技有限公司 | Flexibly configured multi-computing-node server mainboard structure and program |
| CN113051118A (en) * | 2021-03-26 | 2021-06-29 | 联想企业解决方案(新加坡)有限公司 | Information processing apparatus and method for facilitating early display of system information |
| CN113419926B (en) | 2021-08-25 | 2021-11-19 | 苏州浪潮智能科技有限公司 | Method, system and device for monitoring server BIOS starting process |
| CN113836068B (en) * | 2021-09-30 | 2024-04-26 | 北京金山云网络技术有限公司 | PCIe display card control method and device, server and electronic equipment |
| CN114528028B (en) * | 2022-01-29 | 2023-08-08 | 苏州浪潮智能科技有限公司 | Video display device and method |
| CN115033462B (en) * | 2022-08-09 | 2023-01-10 | 苏州浪潮智能科技有限公司 | Storage server start detection method, system, device, equipment and storage medium |
| CN115866179B (en) * | 2023-03-02 | 2023-05-05 | 上海芯浦科技有限公司 | Bridge video transmission system and method avoiding video low-level protocol analysis |
| CN117311890B (en) * | 2023-11-29 | 2024-02-23 | 苏州元脑智能科技有限公司 | Picture display method and device in starting process of server |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1282016A (en) * | 1999-06-18 | 2001-01-31 | 凤凰技术有限公司 | Display picture during period of leading and turn-off computer |
| CN101872310A (en) * | 2010-05-31 | 2010-10-27 | 江苏中科梦兰电子科技有限公司 | Method for displaying and storing picture under BIOS |
| CN101888299A (en) * | 2010-06-22 | 2010-11-17 | 中兴通讯股份有限公司 | Method and device for implementing display mode switching by low-frequency clock |
| CN102073349A (en) * | 2011-01-27 | 2011-05-25 | 浪潮电子信息产业股份有限公司 | Method for saving peripheral circuits of mainboard of server |
| CN102662749A (en) * | 2012-03-23 | 2012-09-12 | 中兴通讯股份有限公司 | Method and device for realizing switching between dual Boots |
| CN103853608A (en) * | 2012-12-04 | 2014-06-11 | 天津中兴软件有限责任公司 | Double-Boot switching implementation method |
| CN104142870A (en) * | 2013-05-09 | 2014-11-12 | 鸿富锦精密工业（深圳）有限公司 | Virtual BIOS (basic input /output system) booting system and virtual BIOS booting method |
| CN104182290A (en) * | 2013-05-23 | 2014-12-03 | 英业达科技有限公司 | Debugging device and debugging method |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7663633B1 (en) * | 2004-06-25 | 2010-02-16 | Nvidia Corporation | Multiple GPU graphics system for implementing cooperative graphics instruction execution |
| US8941668B2 (en) * | 2004-06-25 | 2015-01-27 | Nvidia Corporation | Method and system for a scalable discrete graphics system |
| US8112513B2 (en) * | 2005-11-30 | 2012-02-07 | Microsoft Corporation | Multi-user display proxy server |
| CN102664873A (en) * | 2012-03-28 | 2012-09-12 | 山东超越数控电子有限公司 | Method for realization of KVM-OVER-IP of domestic Loongson CPU server with BMC |
-
2014
- 2014-12-25 CN CN201410826680.2A patent/CN105786421B/en active Active
-
2015
- 2015-03-04 WO PCT/CN2015/073653 patent/WO2016101411A1/en active Application Filing
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1282016A (en) * | 1999-06-18 | 2001-01-31 | 凤凰技术有限公司 | Display picture during period of leading and turn-off computer |
| CN101872310A (en) * | 2010-05-31 | 2010-10-27 | 江苏中科梦兰电子科技有限公司 | Method for displaying and storing picture under BIOS |
| CN101888299A (en) * | 2010-06-22 | 2010-11-17 | 中兴通讯股份有限公司 | Method and device for implementing display mode switching by low-frequency clock |
| CN102073349A (en) * | 2011-01-27 | 2011-05-25 | 浪潮电子信息产业股份有限公司 | Method for saving peripheral circuits of mainboard of server |
| CN102662749A (en) * | 2012-03-23 | 2012-09-12 | 中兴通讯股份有限公司 | Method and device for realizing switching between dual Boots |
| CN103853608A (en) * | 2012-12-04 | 2014-06-11 | 天津中兴软件有限责任公司 | Double-Boot switching implementation method |
| CN104142870A (en) * | 2013-05-09 | 2014-11-12 | 鸿富锦精密工业（深圳）有限公司 | Virtual BIOS (basic input /output system) booting system and virtual BIOS booting method |
| CN104182290A (en) * | 2013-05-23 | 2014-12-03 | 英业达科技有限公司 | Debugging device and debugging method |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2016101411A1 (en) | 2016-06-30 |
| CN105786421A (en) | 2016-07-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105786421B (en) | Server display method and device | |
| TWI424176B (en) | Systems and methods for testing integrated circuit devices | |
| US8386764B2 (en) | BIOS architecture | |
| CN107480011B (en) | BIOS switching device | |
| US8538720B2 (en) | Cold boot test system and method for electronic devices | |
| US9710284B1 (en) | System for programmably configuring a motherboard | |
| US8578190B2 (en) | Information processor configured to charge external devices | |
| CN105814541A (en) | Computer device and memory starting method for computer device | |
| US10140231B2 (en) | Flexible port configuration based on interface coupling | |
| CN113590511B (en) | Bandwidth deceleration repairing method and device and electronic equipment | |
| US20160092201A1 (en) | Method and Device for Updating Program Data | |
| US10235185B2 (en) | Computer and controlling method thereof | |
| CN111124803A (en) | Method and device for controlling state of indicator light and computer readable storage medium | |
| TW202111525A (en) | Boot procedure debugging system, host and method thereof | |
| CN112506745A (en) | Memory temperature reading method and device and computer readable storage medium | |
| US20080235428A1 (en) | Method and system for dynamic switching between multiplexed interfaces | |
| US20150242219A1 (en) | Computer system and control method | |
| CN112084064B (en) | Master-slave BIOS switching method, board card and equipment | |
| US20140181496A1 (en) | Method, Apparatus and Processor for Reading Bios | |
| CN114185720B (en) | Method, device, equipment and storage medium for dynamic hot backup of server | |
| CN111752623A (en) | Display configuration method and device, electronic equipment and readable storage medium | |
| US20180098120A1 (en) | Electronic device and controlling method thereof | |
| CN112579178B (en) | Debugging system for boot program, and host and method thereof | |
| CN108121562B (en) | Firmware version switching method, electronic device and BIOS chip | |
| US20140223161A1 (en) | Electronic device and booting method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |