CN105721917A - Port multiplexing circuit and digital television set top box - Google Patents
Port multiplexing circuit and digital television set top box Download PDFInfo
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- CN105721917A CN105721917A CN201610100857.XA CN201610100857A CN105721917A CN 105721917 A CN105721917 A CN 105721917A CN 201610100857 A CN201610100857 A CN 201610100857A CN 105721917 A CN105721917 A CN 105721917A
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- 238000001514 detection method Methods 0.000 claims abstract description 82
- 238000006243 chemical reaction Methods 0.000 claims abstract description 28
- 230000008054 signal transmission Effects 0.000 claims abstract description 25
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- 238000004891 communication Methods 0.000 description 4
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
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Abstract
The embodiment of the invention provides a port multiplexing circuit and a digital television set top box, relates to the technical field of televisions, and aims to conveniently realize a serial port terminal in the digital television set top box at low cost. The circuit comprises: the multiplexing interface comprises a first pin, a second pin, a third pin and a fourth pin; the fourth pin is grounded, the third pin is connected with the first power supply unit, the first pin, the second pin and the third pin are connected with the detection processing unit and the conversion unit; the conversion unit is connected with the detection processing unit and used for performing signal conversion according to the level signal transmitted by the third pin of the multiplexing interface and sending the converted signal to the detection processing unit; the detection processing unit is connected with the control processor and is used for controlling the transmission of signals between the processors at the first pin and the second pin of the multiplexing interface according to the level signal transmitted by the third pin of the multiplexing interface and the converted signal transmitted by the conversion unit.
Description
Technical field
The present invention relates to TV technology, particularly relate to circuit and the DTV STB of a kind of multiplexed port.
Background technology
DTV STB in the market is integrated with more function, it is necessary to terminal more, for save PCB space, customer requirement, prevent the reasons such as user's wrong plug, terminal can be simplified when Set Top Box manufacturer dispatches from the factory as far as possible, only retain required terminal shipment.As the serial ports of debugging terminal, because user is without actually used function, generally can be taken away.But so also with a lot of problems, e.g., when user family breaks down, in order to position failure cause accurately, generally need to connect serial ports, by serial ports investigation, localized reason.So may result in demolition, installation casing, even welding serial ports terminal, makes the operation maintenance cost of set-top box product increase.
For the problems referred to above, multiplexing IR extended line interface of the present invention, this terminal signals is digital signal and not high speed signal, and performance requirement is relatively low, it is possible to convenient, at low cost with serial port.
Summary of the invention
Embodiments of the invention provide the circuit of a kind of multiplexed port and DTV STB, in order to convenient, low cost in DTV STB, realize serial ports terminal.
For reaching above-mentioned purpose, embodiments of the invention adopt the following technical scheme that
Embodiments provide the circuit of a kind of multiplexed port, including: multiplex interface, it is used for connecting external plug；Described multiplex interface includes the first pin, the second pin, the 3rd pin, and the 4th pin；Wherein, described 4th pin ground connection；Described 3rd pin and the first power subsystem connect, first pin of described multiplex interface, second pin is connected with detection processing unit, and described 3rd pin is connected with described detection processing unit and converting unit, and described external plug includes serial interface plug or infrared IR extended line plug；Described converting unit is connected with described detection processing unit, for the level signal of the 3rd pin transmission according to described multiplex interface, carries out signal conversion, and sends the signal of described conversion to described detection processing unit；Described detection processing unit is connected with controlling processor, level signal for the 3rd pin transmission according to multiplex interface, determine the type of the external plug being inserted into described multiplex interface, and the signal of the conversion transmitted according to described converting unit, at the first pin and second pin of described multiplex interface, between described control processor, carry out the transmission of signal.
Alternatively, also include: control switch, second source unit；Described detection processing unit includes: the first triple gate, the second triple gate, the 3rd triple gate and the 4th triple gate；First pin of described multiplex interface, second pin is connected with detection processing unit, described 3rd pin and the first power subsystem are connected with described detection processing unit, described converting unit is connected with described detection processing unit and includes: the first end of described control processor and the first triple gate connects, described converting unit is connected with the control end of described first triple gate, and the second end of described first triple gate is connected with the first pin of described multiplex interface；Second pin of described multiplex interface is connected with the first end of described second triple gate, and described converting unit is connected with the control end of described second triple gate, and the second end of described second triple gate is connected with described control processor；Second pin of described multiplex interface is connected with the first end of described 3rd triple gate, and the 3rd pin of described multiplex interface is connected with the control end of described 3rd triple gate, and the second end of described 3rd triple gate is connected with described control processor；First end ground connection of described 4th triple gate, 3rd pin of described multiplex interface is connected with the control end of described 4th triple gate, second end of described 4th triple gate is connected with the described control end controlling switch, described second source unit is connected with the described control end controlling switch, and described the first end controlling switch is connected with described second source unit；Described the second end controlling switch is connected with the first pin of described multiplex interface.
Alternatively, also including: first stablizes unit, second stablizes unit and the 3rd stablizes unit；Described first steady dot element is connected with the second end of described first triple gate；Described second stablizes unit is connected with the second end of described second triple gate；Described 3rd stablizes unit is connected with the second end of described 3rd triple gate；Described first stablizes unit, for providing burning voltage for described first triple gate；Described second stablizes unit, for providing burning voltage for described second triple gate；Described 3rd stablizes unit, for providing burning voltage for described 3rd triple gate.
Alternatively, the described first steady dot element includes: the first resistance that the first power module is connected with described first power module；Described first steady dot element is connected with the second end of described first triple gate and includes: the other end of described first resistance is connected with the second end of described first triple gate；Described second steady dot element includes: the second resistance that second source module is connected with described second source module；Described second stablizes unit is connected with the second end of described second triple gate and includes: the other end of described second resistance is connected with the second end of described second triple gate；Described 3rd steady dot element includes: the 3rd resistance that the 3rd power module is connected with described 3rd power module；Described 3rd stablizes unit is connected with the second end of described 3rd triple gate and includes: the other end of described 3rd resistance is connected with the second end of described 3rd triple gate.
Alternatively, described converting unit includes: switch module, the 4th power module and outfan；Wherein, described 4th power module and outfan are connected with the first end of described switch module, the second end ground connection of described switch module；Described 3rd pin is connected with described converting unit and includes: described 3rd pin is connected with the control end of described switch module；Described converting unit is connected with described detection processing unit and includes: the outfan of described converting unit is connected with described detection processing unit.
Alternatively, described switch module is NPN type triode；Described 4th power module is 3.3v power module.
Alternatively, also include: the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, electric capacity；The described switch that controls is for PNP type triode；Second end of described 4th triple gate is connected with the described control end controlling switch and includes: the second end of described 4th triple gate is connected with the described control end controlling switch by described 4th resistance；One end of described 5th resistance connects described second source unit, and the other end is connected with the described control end controlling switch；Described the second end controlling switch is connected with the first pin of described multiplex interface and includes: described the second end controlling switch is connected with the first pin of described multiplex interface by the 6th resistance；One end of described 7th resistance and described the second end controlling switch, other end ground connection；One end ground connection of described electric capacity, the other end is connected with the first pin of described multiplex interface.
Alternatively, described detection processing unit includes: 74HCU125 chip.
Further, embodiments provide a kind of DTV STB, including: the circuit of the multiplexed port described in control processor and above-described embodiment.
Embodiments provide circuit and the DTV STB of a kind of multiplexed port, including: multiplex interface, it is used for connecting external plug；Described multiplex interface includes the first pin, the second pin, the 3rd pin, and the 4th pin；Wherein, the 4th pin ground connection；3rd pin and the first power subsystem connect, the first pin of multiplex interface, and the second pin is connected with detection processing unit, and the 3rd pin is connected with detection processing unit and converting unit, and external plug includes serial interface plug or infrared IR extended line plug；Converting unit is connected with detection processing unit, for the level signal of the 3rd pin transmission according to multiplex interface, carries out signal conversion, and sends the signal of conversion to detecting processing unit；Detection processing unit is connected with controlling processor, level signal for the 3rd pin transmission according to multiplex interface, determine the type of the external plug being inserted into multiplex interface, and the signal of the conversion according to converting unit transmission, at the first pin and second pin of multiplex interface, control to carry out between processor the transmission of signal.So, can be connected with external plug by the multiplex interface in the circuit of the multiplexed port of the present invention.This external plug can be that serial interface plug may also be infrared IR extended line plug.It is to say, the circuit of multiplexed port in the present invention is will to realize the circuit multiplexer of serial ports to the circuit realizing IR extended line socket.So, the detection processing unit of the circuit of the multiplexed port in the present invention difference according to the level signal of the 3rd pin transmission of multiplex interface, carry out different signal transmission, such that it is able to convenient, the purpose realizing serial ports terminal in DTV STB of low cost.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of the embodiment of the present invention, the accompanying drawing used required in embodiment or description of the prior art will be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the premise not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
The structural representation of the circuit of a kind of multiplexed port that Fig. 1 provides for the embodiment of the present invention；
The structural representation of the circuit of the another kind of multiplexed port that Fig. 2 provides for the embodiment of the present invention；
The structural representation of the circuit of the another kind of multiplexed port that Fig. 3 provides for the embodiment of the present invention；
The structural representation of the circuit of the another kind of multiplexed port that Fig. 4 provides for the embodiment of the present invention；
The structural representation of the circuit of the another kind of multiplexed port that Fig. 5 provides for the embodiment of the present invention；
The structural representation of the circuit of the another kind of multiplexed port that Fig. 6 provides for the embodiment of the present invention；
The structural representation of a kind of DTV STB that Fig. 7 provides for the embodiment of the present invention；
Accompanying drawing labelling:
11-multiplex interface, first pin of 111-multiplex interface, second pin of 112-multiplex interface, 3rd pin of 113-multiplex interface, 4th pin of 114-multiplex interface, 12-the first power subsystem, 13-detects processing unit, 14-converting unit, 141-switch module, 142-the 4th power module, 143-outfan, 15-controls switch, 16-second source unit, 17-first stablizes unit, 171-the first power module, 172-the first resistance, 18-second stablizes unit, 181-second source module, 182-the second resistance, 19-the 3rd stablizes unit, 191-the 3rd power module, 192-the 3rd resistance, 20-the 4th resistance, 21-the 5th resistance, 22-the 6th resistance, 23-the 7th resistance, 24-electric capacity.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of protection of the invention.
Embodiments provide the circuit of a kind of multiplexed port, as it is shown in figure 1, include: multiplex interface 11, be used for connecting external plug.
Wherein, multiplex interface 11 includes the first pin 111, the second pin 112, the 3rd pin 113, and the 4th pin 114.4th pin 114 ground connection, the 3rd pin 113 is connected with the first power subsystem 12.First pin 111 of multiplex interface 11, the second pin 112 is connected with detection processing unit 13, and the 3rd pin 113 is connected with detection processing unit 13 and converting unit 14, and external plug includes serial interface plug or infrared IR extended line plug.
Converting unit 14 is connected with detection processing unit 13, for the level signal of the 3rd pin 113 transmission according to multiplex interface 11, carries out signal conversion, and sends the signal of conversion to detection processing unit 13.
Detection processing unit 13 is connected with controlling processor, level signal for the 3rd pin 113 transmission according to multiplex interface 11, determine the type of the external plug being inserted into multiplex interface 11, and the signal of the conversion according to converting unit 14 transmission, at the first pin 111 and the second pin 112 of multiplex interface 11, control to carry out between processor the transmission of signal.
It should be noted that be that the circuit to existing IR extended line improves in the present invention so that it is the port realizing IR (InfraredRadiation, infrared) extended line function at the same time it can also be realize the function of serial ports.Owing to IR extended line plug includes power connector end, IR signal connection end and earth terminal, serial interface plug includes rs 232 serial interface signal receiving terminal, rs 232 serial interface signal transmitting terminal, serial port power source connection, and earth terminal.And the rs 232 serial interface signal receiving end signal of the IR signal connection end of IR extended line plug and serial interface plug is all the circuit sending the signal to multiplexed port；The power connector end of the rs 232 serial interface signal transmitting terminal of serial interface plug and IR extended line plug is all the circuit output signal of multiplexed port, therefore to be easy to multiplexing, by the same pin of the multiplex interface of the circuit of the IR signal connection end common port multiplexing of the rs 232 serial interface signal receiving terminal of serial interface plug and IR extended line plug, the same pin of the multiplex interface of the circuit of the rs 232 serial interface signal transmitting terminal of serial interface plug and the power connector end common port multiplexing of IR extended line plug.
Concrete, the circuit of multiplexed port includes multiplex interface 11, the first power subsystem 12, detects processing unit 13 and converting unit 14.Wherein, multiplex interface 11 includes the first pin 111, the second pin 112, the 3rd pin 113, and the 4th pin 114.Multiplex interface 11 is connected with external plug, is, and serial interface plug or IR extended line plug can be inserted into multiplex interface 11 by user, are connected with each pin of multiplex interface 11.4th pin 114 ground connection of multiplex interface 11, therefore, the earth terminal in the earth terminal of serial interface plug and IR extended line plug is connected with the 4th pin 114 of multiplex interface 11.The power connector end of IR extended line plug and serial interface plug rs 232 serial interface signal transmitting terminal are connected with the first pin 111 of multiplex interface 11.The rs 232 serial interface signal receiving terminal of serial interface plug and the IR signal connection end of IR extended line plug are connected with the second pin 112 of multiplex interface 11.Earth terminal in IR extended line plug is connected with the 3rd pin 113 of multiplex interface 11, and the serial port power source connection of serial interface plug is connected with the 3rd pin 113 of multiplex interface 11.It follows that be inserted into the multiplex interface 11 of the electric current of multiplexed port at serial interface plug, when being inserted into the multiplex interface 11 of circuit of multiplexed port with IR extended line plug, the level signal of the 3rd pin 113 of the multiplex interface 11 of the circuit of multiplexed port is different.Therefore, the 3rd pin 113 is connected with the first power subsystem 12, and the 3rd pin 113 is connected with detection processing unit 13 and converting unit 14.So, when IR extended line plug is inserted into the multiplex interface 11 of electric current of multiplexed port, owing to earth terminal and the 3rd pin 113 of IR extended line plug connect, therefore, the voltage that first power subsystem 12 provides is connected with the earth terminal of IR extended line plug by the 3rd pin 113, it is the first power subsystem 12 ground connection, now, the level signal that the detection processing unit 13 of the circuit of multiplexed port obtains from the 3rd pin 113 of multiplex interface 11 is low level signal, now, detection processing unit 13 may determine that the external plug being inserted into multiplex interface 11 is IR extended line plug.
When serial interface plug is inserted into the multiplex interface 11 of electric current of multiplexed port, owing to serial port power source connection and the 3rd pin 113 of serial interface plug connect, therefore, the voltage that first power subsystem 12 provides is connected with the serial port power source connection of serial interface plug by the 3rd pin 113, is the first power subsystem 12 and powers for serial interface plug.Now, the level signal that the detection processing unit 13 of the circuit of multiplexed port obtains from the 3rd pin 113 of multiplex interface 11 is high level signal, and now, detection processing unit 13 may determine that the external plug being inserted into multiplex interface 11 is serial interface plug.
After rotating unit 14 gets level signal by the 3rd pin, it is possible to this level signal is changed, it is and the high level signal of reception is converted to low level signal, the low level signal of reception is converted to high level signal.Signal after conversion is sent the detection processing unit 13 to its connection.
Detection processing unit 13 can determine that the type of external plug according to the level signal of the 3rd pin 113 transmission of multiplex interface 11.Being, detection processing unit 13 is when receiving the level signal of the 3rd pin 113 transmission of multiplex interface 11 and being high level signal, it may be determined that external plug is serial interface plug；When receiving the level signal of the 3rd pin 113 transmission of multiplex interface 11 and being low level signal, it may be determined that external plug is IR extended line plug.After determining the type of external plug of multiplex interface, it is possible to the signal according to the conversion of converting unit 14 transmission, at multiplex interface 11 first pin 111 and the second pin 112, control to carry out between processor the transmission of signal.
When external plug is IR extended line plug, detection processing unit 13 can provide voltage signal to the first pin 111 of multiplex interface 11, in order to powers to IR extended line plug.Receive, by the second pin 112 of multiplex interface 11, the IR signal that IR extended line plug sends, and this IR signal is transmitted to controlling processor.So, control processor to process accordingly according to the IR signal received.
When external plug is serial interface plug, detection processing unit 13 can provide serial ports output signal to the first pin 111 of multiplex interface 11, now, when needs send serial ports output signal to serial interface plug, control processor and can send serial ports output signal to detection processing unit 13, now serial ports can be exported signal and send the first pin 111 to multiplex interface 11 by detection processing unit 13, and serial interface plug can be got by the rs 232 serial interface signal transmitting terminal being connected with the first pin 111 of multiplex interface 11 and control the serial ports output signal that processor sends, serial interface plug processes accordingly thus can export signal according to serial ports.When serial interface plug need to send serial ports input signal to controlling processor, serial ports input signal can be sent to the first pin 111 of multiplex interface 11, sent to detection processing unit 13 by the first pin 111 of multiplex interface 11, this serial ports can be inputted signal and send to controlling processor by detection processing unit 13, in order to controls processor and carries out corresponding signal processing according to serial ports input signal.
Further, when external plug is serial interface plug, detection processing unit 13 can according to the signal of converting unit 14 conversion, by its interior be that associated components during IR extended line plug is closed with external plug.When external plug is IR extended line plug, detection processing unit 13 can according to the signal of converting unit 14 conversion, by its interior be that associated components during serial interface plug is closed with external plug.
Can be connected with external plug by the multiplex interface in the circuit of the multiplexed port of the present invention.This external plug can be that serial interface plug may also be infrared IR extended line plug.It is to say, the circuit of multiplexed port in the present invention is will to realize the circuit multiplexer of serial ports to the circuit realizing IR extended line socket.So, the detection processing unit of the circuit of the multiplexed port in the present invention difference according to the level signal of the 3rd pin transmission of multiplex interface, carry out different signal transmission, such that it is able to convenient, the purpose realizing serial ports terminal in DTV STB of low cost.
Further, the circuit of above-mentioned multiplexed port, as in figure 2 it is shown, also include: control switch 15, second source unit 16.Detection processing unit 13 includes: the first triple gate 131, the second triple gate 132, the 3rd triple gate 133 and the 4th triple gate 134.
Now, the first pin 111 of multiplex interface 11, the second pin 112 is connected with detection processing unit 13, and the 3rd pin 113 is connected with detection processing unit 13, and converting unit 14 is connected with detection processing unit 13 and includes:
The first end controlling processor and the first triple gate 131 connects, and converting unit 14 is connected with the control end of the first triple gate 131, and the second end of the first triple gate 131 is connected with the first pin 111 of multiplex interface 11.
Second pin 112 of multiplex interface 11 is connected with the first end of the second triple gate 132, and converting unit 14 is connected with the control end of the second triple gate 132, and the second end of the second triple gate 132 is connected with controlling processor.
Second pin of multiplex interface 11 and the first end of the 3rd triple gate 133 connect, and the 3rd pin 113 of multiplex interface 11 is connected with the control end of the 3rd triple gate 133, and the second end of the 3rd triple gate 133 is connected with controlling processor.
First end ground connection of the 4th triple gate 134,3rd pin 113 of multiplex interface 11 is connected with the control end of the 4th triple gate 134, second end of the 4th triple gate 134 is connected with the control end controlling switch 15, second source unit 16 is connected with the control end controlling switch 15, and the first end controlling switch 15 is connected with second source unit 16；The second end controlling switch 15 is connected with the first pin 111 of multiplex interface 11.
Concrete, triple gate in the embodiment of the present invention is control termination when receiving low level signal, controls the first end and the conducting of the second end, when receiving high level signal, controls the first end and the second end disconnects.So, when serial interface plug is inserted into the multiplex interface 11 of circuit of multiplexed port by user, now, the rs 232 serial interface signal receiving terminal of serial interface plug is connected with the second pin 112 of multiplex interface 11, the rs 232 serial interface signal transmitting terminal of serial interface plug is connected with the first pin 111 of multiplex interface 11, the serial port power source connection of serial interface plug is connected with the 3rd pin 113 of multiplex interface 11, and the earth terminal of serial interface plug is connected 114 with the 4th pin of multiplex interface 11.Now, owing to the 3rd pin 113 is connected with the first power subsystem 12, therefore, the first power subsystem 12 can be powered to serial interface plug by the 3rd pin 113.And, 3rd pin 113 is connected with converting unit 14, owing to the first power subsystem 12 can be powered for serial interface plug by the 3rd pin 113, therefore, converting unit 14 can be passed through the 3rd pin 113 and get high level signal, and high level signal can be converted to low level signal by converting unit 14.
The control end of the first triple gate 131 in detection processing unit 13 is connected with converting unit 14, and due to converting unit 14 output is low level signal, and therefore the first triple gate 131 turns on the first end and the second end.And the first end of the first triple gate 131 is connected with control processor, second end of the first triple gate 131 is connected with the first pin 111 of multiplex interface 11, therefore, serial ports can be exported signal by the first triple gate 131 and send the first pin 111 to multiplex interface 11 by control processor, it is, control processor when needs send serial ports output signal to serial interface plug, serial ports can be exported signal and send the first end to the first triple gate 131, the first end and the conducting of the second end due to the first triple gate 131, therefore, serial ports can be exported signal and transmit to the second end by the first triple gate 131, serial ports is exported the signal transmission the first pin 111 to multiplex interface 11 by the second end of the first triple gate 131.And then by the first pin 111 of multiplex interface 11, serial ports exported signal and send the rs 232 serial interface signal transmitting terminal to serial interface plug.
The control end of the second triple gate 132 is connected with rotating unit 14, and due to converting unit 14 output is low level signal, and therefore the second triple gate 132 turns on the first end and the second end.And the second pin 112 of the first end connection multiplexing interface 11 of the second triple gate 132, second end of the second triple gate 132 connects control processor, therefore, serial ports can be inputted signal and send the second pin 112 to multiplex interface 11 by rs 232 serial interface signal receiving terminal by serial interface plug.Serial ports can be inputted the signal transmission the first end to the second triple gate 132 by the second pin 112 of multiplex interface 11, the first end and the conducting of the second end due to the second triple gate 132, therefore serial ports can be inputted signal transmission to the second end by the second triple gate 132, second end of the second triple gate 132 is connected with controlling processor, and therefore serial ports can be inputted signal transmission to controlling processor by the second triple gate 132.
The end that controls of the 3rd triple gate 133 is connected with the 3rd pin 113 of multiplex interface 11, owing to the first power subsystem 12 can be powered for serial interface plug by the 3rd pin 113, therefore, the end that controls of the 3rd triple gate 133 gets high level signal from the 3rd pin 113 of multiplex interface 11.3rd triple gate 133 disconnects the first end and the second end.Owing to the second pin 112 of multiplex interface 11 is connected with the first end of the 3rd triple gate 133, the second end controlling processor and the 3rd triple gate 133 connects, therefore, the second pin 112 of multiplex interface 11 cannot be communicated with controlling processor by the 3rd triple gate 133.
The end that controls of the 4th triple gate 134 is connected with the 3rd pin 113 of multiplex interface 11, owing to the first power subsystem 12 can be powered for serial interface plug by the 3rd pin 113, therefore, the end that controls of the 4th triple gate 134 gets high level signal from the 3rd pin 113 of multiplex interface 11.4th triple gate 134 disconnects the first end and the second end.And the first end ground connection of the 4th triple gate 134, the second end is connected with the control controlling switch 15.And the control end controlling switch 15 is also connected with second source unit 16, therefore, the termination that controls controlling switch 15 receives the high level signal that second source unit 16 provides.Owing to controlling the switch 15 switch for low level signal conducting, therefore controlling switch 15 when receiving high level signal, it is not turned on its first end and the second end.And then second source unit 16 is not powered to the first pin 111 of multiplex interface 11.
So, by the open and close of each triple gate of above-mentioned detection processing unit 13, it is achieved serial interface plug and the communication controlled between processor.So that the circuit realiration of the multiplexed port function of serial ports terminal.
When IR extended line plug is inserted into the multiplex interface 11 of circuit of multiplexed port by user, now, the power connector end of IR extended line plug is connected with the first pin 111 of multiplex interface 11, IR signal connection end is connected with the second pin 112 of multiplex interface 11, and earth terminal is connected with the 3rd pin 113 and the 4th pin 114 of multiplex interface 11.Now, owing to the 3rd pin 113 is connected with the first power subsystem 12, therefore, the first power subsystem 12 is by the 3rd pin 113 ground connection.3rd pin 113 is connected with converting unit 14, and due to the first power subsystem 12 and the 3rd pin 113 ground connection, therefore, converting unit 14 can be passed through the 3rd pin 113 and get low level signal, and low level signal can be converted to high level signal by converting unit 14.
The control end of the first triple gate 131 in detection processing unit 13 is connected with converting unit 14, and due to converting unit 14 output is high level signal, and therefore, the first triple gate 131 disconnects the first end and the second end.And the first end of the first triple gate 131 is connected with control processor, second end of the first triple gate 131 is connected with the first pin 111 of multiplex interface 11, now, control processor to be communicated by the first pin 111 of the first triple gate 131 with multiplex interface 11.
In like manner, the control end of the second triple gate 132 is connected with rotating unit 14, and due to converting unit 14 output is high level signal, and now, the second triple gate 132 disconnects the first end and the second end.And the second pin 112 of the first end connection multiplexing interface 11 of the second triple gate 132, the second end of the second triple gate 132 connects control processor, and therefore, controlling processor cannot be communicated by the second pin 112 of the second triple gate 132 with multiplex interface 11.
The end that controls of the 3rd triple gate 133 is connected with the 3rd pin 113 of multiplex interface 11, due to the 3rd pin 113 ground connection, therefore the control end of the 3rd triple gate 133 gets low level signal from the 3rd pin 113, and now, its first end and the second end can be turned on by the 3rd triple gate 133.And the second pin 112 of multiplex interface 11 is connected with the first end of the 3rd triple gate 133, the second end controlling processor and the 3rd triple gate 133 connects, therefore, IR extended line plug needs the transmission of IR signal to when controlling processor, it is possible to by the second pin 112 of the multiplex interface 11 that IR signal is connected to IR signal connection end by the transmission of IR signal connection end.Second pin 112 of multiplex interface 11 can by the first end of IR signal transmission to the 3rd triple gate 133.Due to the first end and the conducting of the second end of the 3rd triple gate 133, therefore IR signal can be transmitted to the second end by the 3rd triple gate 133, and IR signal is transmitted to controlling processor by the 3rd triple gate 133 by its second end.
The end that controls of the 4th triple gate 134 is connected with the 3rd pin 113 of multiplex interface 11, due to the 3rd pin 113 ground connection, therefore the control end of the 4th triple gate 134 gets low level signal from the 3rd pin 113, and now, its first end and the second end can be turned on by the 4th triple gate 134.And the first end ground connection of the 4th triple gate 134, second end is connected with the control controlling switch 15, now, when its first end and the second end are turned on by the 4th triple gate 134, then the second end also ground connection of the 4th triple gate 134, now, controls the control end ground connection of switch 15, thus the control end controlling switch 15 can get low level signal, its first end and the second end now can be turned on.The first end controlling switch 15 connects second source unit 16, first pin 111 of the second end connection multiplexing interface 11, so, the first pin 111 that second source unit 16 can be multiplex interface 11 is powered, owing to the first pin 111 of multiplex interface 11 is connected with the power connector end of IR extended line plug, therefore second source unit 16 can be powered for the power connector end of IR extended line plug.
So, open and close by each triple gate of above-mentioned detection processing unit 13, realize IR extended line plug and the communication controlled between processor, while the circuit realiration function of serial ports terminal that can make multiplexed port, also the normal realization of the function of IR extended line port can be ensured, it is, completes serial port circuit multiplexing to IR extended line circuit in the present invention.
Further, the circuit of above-mentioned multiplexed port, as it is shown on figure 3, also include: first stablizes unit 17, second stablizes unit 18 and the 3rd stablizes unit 19.
Wherein, the first steady dot element 17 is connected with the second end of the first triple gate 131；Second stablizes unit 18 is connected with the second end of the second triple gate 132；3rd stablizes unit 19 is connected with the second end of the 3rd triple gate 133.First stablizes unit 17, for providing burning voltage for the first triple gate 131.Second stablizes unit 18, for providing burning voltage for the second triple gate 132.3rd stablizes unit 19, for providing burning voltage for the 3rd triple gate 133.
So, stablizing unit 17 by first, second stablizes unit 18 and the 3rd, and to stablize unit 19 can be the first triple gate 131, and the second triple gate 132, the 3rd triple gate 133 is more stable.
Further, with reference to shown in Fig. 3, the first steady dot element 17 includes: the first resistance 172 that the first power module 171 is connected with the first power module 171.
Now, the first steady dot element 17 is connected with the second end of the first triple gate 131 and includes: the other end of the first resistance 172 and the second end of the first triple gate 131 connect.
Second steady dot element 18 includes: the second resistance 182 that second source module 181 is connected with second source module 181.
Now, second stablizes unit 18 and is connected with the second end of the second triple gate 132 and includes: the other end of the second resistance 182 and the second end of the second triple gate 132 connect.
3rd steady dot element 19 includes: the 3rd resistance 192 that the 3rd power module 191 is connected with the 3rd power module 191.
Now, the 3rd stablizes unit 19 and is connected with the second end of the 3rd triple gate 133 and includes: the other end of the 3rd resistance 192 and the second end of the 3rd triple gate 133 connect.
Further, above-mentioned first resistance 172 is 10k ohm.Second resistance 182 is 10k ohm.3rd resistance 192 is 10k ohm.
Further, as shown in Figure 4, converting unit 14 includes: switch module 141, the 4th power module 142 and outfan 143.Wherein, the 4th power module 142 and outfan 143 are connected with the first end of switch module 141, the second end ground connection of switch module 142.
Now, the 3rd pin 133 is connected with converting unit 14 and includes: the 3rd pin 133 is connected with the control end of switch module 141.
Converting unit 14 is connected with detection processing unit 13 and includes: the outfan 143 of converting unit 14 is connected with detection processing unit 13.
Concrete, the 3rd pin 113 of multiplex interface 11 is connected with the control end of switch module 141, so, and the switch module 141 level signal according to the level signal control output end output of the 3rd pin 113 transmission of multiplex interface 11.When the 3rd pin 113 of multiplex interface 11 is high level signal, control end by this high level signal transmission to switch module 141, after the control termination of switch module 141 receives high level signal, control switch module 141 first end and the conducting of the second end, now, the second end ground connection due to switch module 141, therefore, first end of switch module 141 also corresponds to ground connection, the 4th power module 142 being now connected with the first end of switch module 141 and outfan 143 are equivalent to ground connection, outfan 143 output low level signal.The outfan 143 of converting unit 14 is connected with detection processing unit 13, and now, low level signal can be exported detection processing unit 13 by the outfan 143 of converting unit 14.So, the termination that controls of the switch module 141 of converting unit 14 receives the high level signal that the 3rd pin 113 of multiplex interface 11 transmits, and exporting the signal to detection processing unit 13 at outfan 143 is low level signal, it is achieved that the conversion of signal.
When the 3rd pin 113 of multiplex interface 11 is low level signal, control end by this low level signal transmission to switch module 141, after the control termination of switch module 141 receives low level signal, control switch module 141 first end and the second end disconnects, now, the 4th power module 142 and outfan 143 connect, therefore, 4th power module 142 provides high level signal for outfan 143, such that it is able at outfan 143 high level signal.Therefore, high level signal can be exported detection processing unit 13 by the outfan 143 of converting unit 14.So, the termination that controls of the switch module 141 of converting unit 14 receives the low level signal that the 3rd pin 113 of multiplex interface 11 transmits, and exporting the signal to detection processing unit 13 at outfan 143 is high level signal, it is achieved that the conversion of signal.
Further, above-mentioned switch module 141 is NPN type triode.4th power module 142 is 3.3v power module.
Further, the circuit of above-mentioned multiplexed port, as it is shown in figure 5, also include: the 4th resistance 20, the 5th resistance 21, the 6th resistance 22, the 7th resistance 23, electric capacity 24.Above-mentioned control switch 15 is PNP type triode.
Wherein, the second end of the 4th triple gate 134 is connected includes with the control end controlling switch 15: the control end that the second end of the 4th triple gate 134 switchs 15 by the 4th resistance 20 with control is connected.
Second end of control switch 15 is connected with the first pin 111 of multiplex interface 11 and includes:
The second end controlling switch 15 is connected with the first pin 111 of multiplex interface 11 by the 6th resistance 22.
One end of 5th resistance 21 connects second source unit 16, and the other end is connected with the control end controlling switch 15.One end of 7th resistance 23 and the second end controlling switch 15, other end ground connection；One end ground connection of electric capacity 24, the other end is connected with the first pin 111 of multiplex interface 11.
So, the 4th resistance 20, the 5th resistance 21 can have metering function, plays certain protective effect to controlling switch 15.In like manner, the 6th resistance 22, the first pin 111 of multiplex interface 11 can be had certain protective effect by the 7th resistance 23 and electric capacity 24.
Further, detection processing unit 13 includes: 74HCU125 chip.
Further, with reference to shown in Fig. 6, also include in converting unit 14: the 8th resistance, and the 9th resistance.Wherein, the 3rd pin 113 is connected with the control end of switch module 141 and includes: the 3rd pin 113 is connected with one end of the 8th resistance, and the other end of the 8th resistance is connected with the control end of switch module 141.Being, the 3rd pin 113 is connected with the control end of switch module 141 by the 8th resistance.
4th power module 142 is connected with the first end of switch module 141 and includes: the 4th power module 142 is connected with one end of the 9th resistance, and the other end of the 9th resistance is connected with the first end of switch module 141.Being, the 4th power module 142 is connected with the first end of switch module 141 by the 9th resistance.
Exemplary, as shown in Figure 6, it is assumed that detection processing unit 13 is 74HCU125 chip.Switch module 141 is NPN type triode, first power subsystem 12, second source unit 16 is 3.3v power supply, controlling switch 15 is PNP type triode, first power module 171, second source module 181,3rd power module 191 is 3.3v power supply, and the first resistance 172 is resistance R1, and the second resistance 182 is resistance R2,3rd resistance 192 is resistance R3,4th resistance 20 is resistance R4, and the 5th resistance 21 is resistance R5, and the 6th resistance 22 is resistance R6,7th resistance 23 is resistance R7, and electric capacity 24 is electric capacity CS1.Switch module 141 is NPN type triode, and the 4th power module is 3.3v power supply, and the 8th resistance is resistance R8, and the 9th resistance is resistance R9.
74HCU125 chip includes four triple gates, wherein, the control end that pin 1 is the first triple gate of 74HCU125 chip, pin 2 is the first end of the first triple gate, pin 3 is the second end of the first triple gate, pin 4 is the control end of the second triple gate, pin 5 is the first end of the second triple gate, pin 6 is the second end of the second triple gate, pin 10 is the control end of the 3rd triple gate, pin 9 is the first end of the 3rd triple gate, pin 8 is the second end of the 3rd triple gate, pin 13 is the control end of the 4th triple gate, pin 12 is the first end of the 4th triple gate, pin 11 is the second end of the 4th triple gate, pin 14 connects power supply, for 74HCU125 chip power supply, pin 7 ground connection.Multiplex interface 11 includes four pins, respectively the first pin 111, the second pin 112, the 3rd pin 113, and the 4th pin 114.4th pin 114 ground connection.Assuming to include in the circuit of multiplexed port resistance R10, now 3.3v power supply is connected by resistance R10 and the three pin 113.3rd pin 113 is connected with pin 10 and the pin 13 of 74HCU125 chip, and the 3rd pin 113 is connected with the control end of NPN type triode by resistance R8.First end of NPN type triode is connected with one end of outfan 143 and resistance R9, and the other end of resistance R9 is connected with 3.3v power supply.Outfan 143 is connected with pin 1 and the pin 4 of 74HCU125 chip.The pin 2 of 74HCU125 chip is connected with controlling processor, and the pin 3 of 74HCU125 chip is connected with the first pin 111 of multiplex interface 11 and resistance R1 respectively, and the other end of resistance R1 is connected with 3.3v power supply；The pin 5 of 74HCU125 chip is connected with the second pin 112 of multiplex interface 11, and the pin 6 of 74HCU125 chip is connected with control processor and resistance R2 respectively, and the other end of resistance R2 is connected with 3.3v power supply；Pin 7 ground connection of 74HCU125 chip, the pin 9 of 74HCU125 chip is connected with the second pin 112 of multiplex interface 11, and the pin 8 of 74HCU125 chip is connected with control processor and resistance R3 respectively, and the other end of resistance R3 is connected with 3.3v power supply；Pin 12 ground connection of 74HCU125 chip, the pin 11 of 74HCU125 chip is connected with resistance R4, the other end of resistance R4 connects the control end of resistance R5 and PNP type triode respectively, the other end of resistance R5 connects 3.3v power supply, first end of PNP type triode is connected with 3.3v power supply, second end of PNP type triode connects resistance R6 and resistance R7 respectively, first pin 111 of the other end connection multiplexing interface 11 of resistance R6, the other end ground connection of resistance R7, one end of electric capacity CS1 is connected between the other end of resistance R6 and the first pin 111 of multiplex interface 11, other end ground connection.The pin 14 of 74HCU125 chip connects 3.3v power supply, in order to provide working power for 74HCU125 chip.
So, when serial interface plug is inserted into the multiplex interface 11 of circuit of multiplexed port by user, now, the rs 232 serial interface signal receiving terminal of serial interface plug is connected with the second pin 112 of multiplex interface 11, the rs 232 serial interface signal transmitting terminal of serial interface plug is connected with the first pin 111 of multiplex interface 11, the serial port power source connection of serial interface plug is connected with the 3rd pin 113 of multiplex interface 11, and the earth terminal of serial interface plug is connected 114 with the 4th pin of multiplex interface 11.Owing to the 3rd pin 113 is connected with 3.3v power supply, the serial port power source connection that 3.3v power supply can be serial interface plug is powered, and the 3rd pin 113 is connected with the control end of NPN type triode by resistance R8, now, the control end of NPN type triode can get high level signal from the 3rd pin 113.After the control end of NPN type triode gets high level signal, turn on its first end and the second end, due to the second end ground connection, the 3.3v power ground that the first end connects, now outfan 143 output low level signal.
The pin 1 of 74HCU125 chip is connected with outfan 143, and pin 1 is the control end of the first triple gate of 74HCU125 chip, and the control termination of the first triple gate receives low level signal, therefore turns on the first triple gate and turns on the first end and the second end.And the pin that the first end is 74HCU125 chip 2 of the first triple gate, the pin that second end is 74HCU125 chip 3 of the first triple gate, therefore, the control processor being connected with the pin 2 of 74HCU125 chip can when needs send serial ports output signal to serial interface plug, serial ports is exported signal and sends the pin 2 to 74HCU125 chip, owing to pin 2 and the pin 3 of 74HCU125 chip turn on, therefore, serial ports can be exported signal and transmit to pin 3 by 74HCU125 chip, serial ports is exported the signal transmission the first pin 111 to multiplex interface 11 by the pin 3 of 74HCU125 chip.And then by the first pin 111 of multiplex interface 11, serial ports exported signal and send the rs 232 serial interface signal transmitting terminal to serial interface plug.
The end that controls of the second triple gate of 74HCU125 chip is the pin 4 in 74HCU125 chip, is connected with outfan 143, and due to outfan 143 output is low level signal, and therefore the second triple gate of 74HCU125 chip turns on the first end and the second end.The first end that pin 5 is the second triple gate in 74HCU125 chip, the second end that pin 6 is the second triple gate in 74HCU125 chip, so, need that serial ports inputs signal at serial interface plug to send to when controlling processor, it is possible to serial ports inputs signal and sends the second pin 112 to multiplex interface 11 by rs 232 serial interface signal receiving terminal.Serial ports can be inputted the pin 5 in signal transmission extremely connected 74HCU125 chip by the second pin 112 of multiplex interface 11, owing to the pin 5 in 74HCU125 chip and pin 6 turn on, therefore serial ports can be inputted signal transmission to pin 6 by 74HCU125 chip, pin 6 in 74HCU125 chip is connected with controlling processor, and therefore serial ports can be inputted signal transmission to controlling processor by 74HCU125 chip.
The pin 10 that control end is 74HCU125 chip of the 3rd triple gate of 74HCU125 chip, it is connected with the 3rd pin 113 of multiplex interface 11, owing to 3.3v power supply can be powered for serial interface plug by the 3rd pin 113, therefore, the pin 10 of 74HCU125 chip gets high level signal from the 3rd pin 113 of multiplex interface 11.3rd triple gate disconnects the first end and the second end, and due to the pin that the first end is 74HCU125 chip 9 of the 3rd triple gate, the pin that the second end is 74HCU125 chip 8 of the 3rd triple gate, therefore the pin 9 of 74HCU125 chip and pin 8 disconnect.Owing to the second pin 112 of multiplex interface 11 is connected with the pin 9 of 74HCU125 chip, controlling processor and be connected with the pin 8 of 74HCU125 chip, therefore, the second pin 112 of multiplex interface 11 cannot be communicated with controlling processor by 74HCU125 chip.
The pin 13 that control end is 74HCU125 chip of the 4th triple gate of 74HCU125 chip, it is connected with the 3rd pin 113 of multiplex interface 11, owing to 3.3v power supply can be powered for serial interface plug by the 3rd pin 113, therefore, the pin 13 of 74HCU125 chip gets high level signal from the 3rd pin 113 of multiplex interface 11.4th triple gate disconnects the first end and the second end.Due to the pin that the first end is 74HCU125 chip 12 of the 4th triple gate, the pin that the second end is 74HCU125 chip 11 of the 4th triple gate, therefore the pin 12 of 74HCU125 chip and pin 11 disconnect.And pin 12 ground connection of 74HCU125 chip, pin 11 is connected with the control end of PNP type triode by resistance R4.And the control end of PNP type triode is also connected with 3.3v power supply by resistance R5, therefore, the termination that controls of PNP type triode receives the high level signal that 3.3v power supply provides.Due to the switch that PNP type triode is low level signal conducting, therefore at the control end of PNP type triode when receiving high level signal, it is not turned on its first end and the second end.And then 3.3v power supply is not powered to the first pin 111 of multiplex interface 11.
So by the open and close of each triple gate of above-mentioned 74HCU125 chip, it is achieved serial interface plug and the communication controlled between processor.So that the circuit realiration of the multiplexed port function of serial ports terminal.
When IR extended line plug is inserted into the multiplex interface 11 of circuit of multiplexed port by user, now, the power connector end of IR extended line plug is connected with the first pin 111 of multiplex interface 11, IR signal connection end is connected with the second pin 112 of multiplex interface 11, and earth terminal is connected with the 3rd pin 113 and the 4th pin 114 of multiplex interface 11.Owing to the 3rd pin 113 is connected with 3.3v power supply, therefore, 3.3v power supply passes through the 3rd pin 113 ground connection.3rd pin 113 is connected with the control end of NPN type triode with by resistance R8, due to 3.3v power supply and the 3rd pin 113 ground connection, therefore, the control end of NPN type triode can pass through the 3rd pin 113 and get low level signal, owing to the control end of NPN type triode is when receiving high level signal, just turn on its first end and the second end, therefore, the control end of NPN type triode is when receiving low level signal, it is impossible to turn on its first end and the second end.Now, 3.3v power supply is connected with the first end and the outfan 143 of NPN type triode by resistance R9.Owing to the first end and second end of NPN type triode disconnect, therefore, 3.3v power supply provides high level signal for outfan 143.
The pin 1 of 74HCU125 chip is connected with outfan 143, pin 1 is the control end of the first triple gate of 74HCU125 chip, due to outfan 143 output is high level signal, therefore the pin 2 of 74HCU125 chip and pin 3 disconnect, the pin 2 of 74HCU125 chip is connected with controlling processor, the pin 3 of 74HCU125 chip is connected with the first pin 111 of multiplex interface 11, and now, controlling processor cannot be communicated by the first pin 111 of 74HCU125 chip with multiplex interface 11.
In like manner, the pin 4 of 74HCU125 chip is connected with outfan 143, pin 1 is the control end of the second triple gate of 74HCU125 chip, due to outfan 143 output is high level signal, therefore the pin 5 of 74HCU125 chip and pin 6 disconnect, the pin 5 of 74HCU125 chip is connected with the second pin 112 of multiplex interface 11, the pin 6 of 74HCU125 chip is connected with controlling processor, now, control processor to be communicated by the second pin 112 of 74HCU125 chip with multiplex interface 11.
The control end that pin 10 is the 3rd triple gate of 74HCU125 chip, is connected with the 3rd pin 113.Due to the 3rd pin 113 ground connection, therefore the pin 10 of 74HCU125 chip gets low level signal from the 3rd pin 113, and now, pin 9 and the pin 8 of 74HCU125 chip turn on.And the second pin 112 of multiplex interface 11 is connected with the pin 9 of 74HCU125 chip, control processor and be connected therefore with the pin 8 of 74HCU125 chip, IR extended line plug needs the transmission of IR signal to when controlling processor, it is possible to by the second pin 112 of the multiplex interface 11 that IR signal is connected to IR signal connection end by the transmission of IR signal connection end.Second pin 112 of multiplex interface 11 can by the pin 9 of IR signal transmission to 74HCU125 chip.Owing to pin 9 and the pin 8 of 74HCU125 chip turn on, therefore IR signal can be transmitted to controlling processor by 74HCU125 chip by pin 8, the 74HCU125 chip 133 of IR signal transmission to 74HCU125 chip by its pin 8.
The control end that pin 13 is the 4th triple gate of 74HCU125 chip, being connected with the 3rd pin 113, due to the 3rd pin 113 ground connection, therefore the pin 13 of 74HCU125 chip gets low level signal from the 3rd pin 113, now, the pin 12 of 74HCU125 chip and pin 11 turn on.And pin 12 ground connection of 74HCU125 chip, pin 11 is connected with the control end of PNP type triode, therefore when the pin 12 of 74HCU125 chip and pin 11 turn on, pin 11 ground connection of 74HCU125 chip, now, the control end ground connection of PNP type triode, then PNP type triode can turn on its first end and the second end.First end of PNP type triode connects 3.3v power supply, second end is by first pin 111 of resistance R6 with multiplex interface 11, so, the first pin 111 that 3.3v power supply can be multiplex interface 11 is powered, owing to the first pin 111 of multiplex interface 11 is connected with the power connector end of IR extended line plug, therefore 3.3v power supply can be powered for the power connector end of IR extended line plug.
So, open and close by each triple gate of above-mentioned 74HCU125 chip, realize IR extended line plug and the communication controlled between processor, while the circuit realiration function of serial ports terminal that can make multiplexed port, also the normal realization of the function of IR extended line port can be ensured, it is, completes serial port circuit multiplexing to IR extended line circuit in the present invention.
Embodiments provide the circuit of a kind of multiplexed port, including: multiplex interface, it is used for connecting external plug；Described multiplex interface includes the first pin, the second pin, the 3rd pin, and the 4th pin；Wherein, the 4th pin ground connection；3rd pin and the first power subsystem connect, the first pin of multiplex interface, and the second pin is connected with detection processing unit, and the 3rd pin is connected with detection processing unit and converting unit, and external plug includes serial interface plug or infrared IR extended line plug；Converting unit is connected with detection processing unit, for the level signal of the 3rd pin transmission according to multiplex interface, carries out signal conversion, and sends the signal of conversion to detecting processing unit；Detection processing unit is connected with controlling processor, level signal for the 3rd pin transmission according to multiplex interface, determine the type of the external plug being inserted into multiplex interface, and the signal of the conversion according to converting unit transmission, at the first pin and second pin of multiplex interface, control to carry out between processor the transmission of signal.So, can be connected with external plug by the multiplex interface in the circuit of the multiplexed port of the present invention.This external plug can be that serial interface plug may also be infrared IR extended line plug.It is to say, the circuit of multiplexed port in the present invention is will to realize the circuit multiplexer of serial ports to the circuit realizing IR extended line socket.So, the detection processing unit of the circuit of the multiplexed port in the present invention difference according to the level signal of the 3rd pin transmission of multiplex interface, carry out different signal transmission, such that it is able to convenient, the purpose realizing serial ports terminal in DTV STB of low cost.
Embodiments provide a kind of digital motor top box, as it is shown in fig. 7, comprises: control the circuit 702 of processor 701 and multiplexed port.Wherein, the circuit of the multiplexed port described in circuit 702 above-described embodiment of multiplexed port.
Embodiments providing a kind of digital motor top box, including the circuit controlling processor and multiplexed port, wherein, the circuit of multiplexed port includes: multiplex interface, is used for connecting external plug；Described multiplex interface includes the first pin, the second pin, the 3rd pin, and the 4th pin；Wherein, the 4th pin ground connection；3rd pin and the first power subsystem connect, the first pin of multiplex interface, and the second pin is connected with detection processing unit, and the 3rd pin is connected with detection processing unit and converting unit, and external plug includes serial interface plug or infrared IR extended line plug；Converting unit is connected with detection processing unit, for the level signal of the 3rd pin transmission according to multiplex interface, carries out signal conversion, and sends the signal of conversion to detecting processing unit；Detection processing unit is connected with controlling processor, level signal for the 3rd pin transmission according to multiplex interface, determine the type of the external plug being inserted into multiplex interface, and the signal of the conversion according to converting unit transmission, at the first pin and second pin of multiplex interface, control to carry out between processor the transmission of signal.So, can be connected with external plug by the multiplex interface in the circuit of the multiplexed port of the present invention.This external plug can be that serial interface plug may also be infrared IR extended line plug.It is to say, the circuit of multiplexed port in the present invention is will to realize the circuit multiplexer of serial ports to the circuit realizing IR extended line socket.So, the detection processing unit of the circuit of the multiplexed port in the present invention difference according to the level signal of the 3rd pin transmission of multiplex interface, carry out different signal transmission, such that it is able to convenient, the purpose realizing serial ports terminal in DTV STB of low cost.
Last it is noted that above example is only in order to illustrate technical scheme, it is not intended to limit；Although the present invention being described in detail with reference to previous embodiment, it will be understood by those within the art that: the technical scheme described in foregoing embodiments still can be modified by it, or wherein portion of techniques feature is carried out equivalent replacement；And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (9)
1. the circuit of a multiplexed port, it is characterised in that including:
Multiplex interface, is used for connecting external plug；Described multiplex interface includes the first pin, the second pin, the 3rd pin, and the 4th pin；Wherein, described 4th pin ground connection；Described 3rd pin and the first power subsystem connect, first pin of described multiplex interface, second pin is connected with detection processing unit, and described 3rd pin is connected with described detection processing unit and converting unit, and described external plug includes serial interface plug or infrared IR extended line plug；
Described converting unit is connected with described detection processing unit, for the level signal of the 3rd pin transmission according to described multiplex interface, carries out signal conversion, and sends the signal of described conversion to described detection processing unit；
Described detection processing unit is connected with controlling processor, level signal for the 3rd pin transmission according to multiplex interface, determine the type of the external plug being inserted into described multiplex interface, and the signal of the conversion transmitted according to described converting unit, at the first pin and second pin of described multiplex interface, between described control processor, carry out the transmission of signal.
2. circuit according to claim 1, it is characterised in that also include: control switch, second source unit；
Described detection processing unit includes: the first triple gate, the second triple gate, the 3rd triple gate and the 4th triple gate；
First pin of described multiplex interface, the second pin is connected with detection processing unit, and described 3rd pin and the first power subsystem are connected with described detection processing unit, and described converting unit is connected with described detection processing unit and includes:
First end of described control processor and the first triple gate connects, and described converting unit is connected with the control end of described first triple gate, and the second end of described first triple gate is connected with the first pin of described multiplex interface；
Second pin of described multiplex interface is connected with the first end of described second triple gate, and described converting unit is connected with the control end of described second triple gate, and the second end of described second triple gate is connected with described control processor；
Second pin of described multiplex interface is connected with the first end of described 3rd triple gate, and the 3rd pin of described multiplex interface is connected with the control end of described 3rd triple gate, and the second end of described 3rd triple gate is connected with described control processor；
First end ground connection of described 4th triple gate, 3rd pin of described multiplex interface is connected with the control end of described 4th triple gate, second end of described 4th triple gate is connected with the described control end controlling switch, described second source unit is connected with the described control end controlling switch, and described the first end controlling switch is connected with described second source unit；Described the second end controlling switch is connected with the first pin of described multiplex interface.
3. circuit according to claim 2, it is characterised in that also include:
First stablizes unit, and second stablizes unit and the 3rd stablizes unit；
Described first steady dot element is connected with the second end of described first triple gate；Described second stablizes unit is connected with the second end of described second triple gate；Described 3rd stablizes unit is connected with the second end of described 3rd triple gate；
Described first stablizes unit, for providing burning voltage for described first triple gate；
Described second stablizes unit, for providing burning voltage for described second triple gate；
Described 3rd stablizes unit, for providing burning voltage for described 3rd triple gate.
4. circuit according to claim 3, it is characterised in that
Described first steady dot element includes: the first resistance that the first power module is connected with described first power module；
Described first steady dot element is connected with the second end of described first triple gate and includes:
The other end of described first resistance is connected with the second end of described first triple gate；
Described second steady dot element includes: the second resistance that second source module is connected with described second source module；
Described second stablizes unit is connected with the second end of described second triple gate and includes:
The other end of described second resistance is connected with the second end of described second triple gate；
Described 3rd steady dot element includes: the 3rd resistance that the 3rd power module is connected with described 3rd power module；
Described 3rd stablizes unit is connected with the second end of described 3rd triple gate and includes:
The other end of described 3rd resistance is connected with the second end of described 3rd triple gate.
5. the circuit according to any one of claim 1-4, it is characterised in that
Described converting unit includes: switch module, the 4th power module and outfan；Wherein, described 4th power module and outfan are connected with the first end of described switch module, the second end ground connection of described switch module；
Described 3rd pin is connected with described converting unit and includes:
Described 3rd pin is connected with the control end of described switch module；
Described converting unit is connected with described detection processing unit and includes:
The outfan of described converting unit is connected with described detection processing unit.
6. circuit according to claim 5, it is characterised in that
Described switch module is NPN type triode；
Described 4th power module is 3.3v power module.
7. circuit according to claim 2, it is characterised in that also include: the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, electric capacity；The described switch that controls is for PNP type triode；
Second end of described 4th triple gate is connected with the described control end controlling switch and includes:
Second end of described 4th triple gate is connected with the described control end controlling switch by described 4th resistance；
One end of described 5th resistance connects described second source unit, and the other end is connected with the described control end controlling switch；
Described the second end controlling switch is connected with the first pin of described multiplex interface and includes:
Described the second end controlling switch is connected with the first pin of described multiplex interface by the 6th resistance；
One end of described 7th resistance and described the second end controlling switch, other end ground connection；One end ground connection of described electric capacity, the other end is connected with the first pin of described multiplex interface.
8. the circuit according to any one of claim 1-4, it is characterised in that
Described detection processing unit includes: 74HCU125 chip.
9. a DTV STB, it is characterised in that including: the circuit of the multiplexed port described in control processor and any one of claim 1-8.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108259953A (en) * | 2018-03-06 | 2018-07-06 | 深圳康佳信息网络有限公司 | Interface multiplexing circuit, method for multiplexing interface and the set-top box of set-top box |
| CN112260911A (en) * | 2020-11-09 | 2021-01-22 | Oppo广东移动通信有限公司 | Communication device |
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| US20050268006A1 (en) * | 2004-02-26 | 2005-12-01 | Microchip Technology Incorporated | Digital interface supporting internal and external USB transceivers |
| US20070255990A1 (en) * | 2006-04-12 | 2007-11-01 | Burke Kevin C | Test access port switch |
| CN202496029U (en) * | 2012-02-16 | 2012-10-17 | 深圳市同洲电子股份有限公司 | Digital television multiplexing interface and digital television |
| CN203537553U (en) * | 2013-10-18 | 2014-04-09 | 南通同洲电子有限责任公司 | An Interface circuit realizing serial port and infrared multiplex functions |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108259953A (en) * | 2018-03-06 | 2018-07-06 | 深圳康佳信息网络有限公司 | Interface multiplexing circuit, method for multiplexing interface and the set-top box of set-top box |
| CN112260911A (en) * | 2020-11-09 | 2021-01-22 | Oppo广东移动通信有限公司 | Communication device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105721917B (en) | 2018-08-07 |
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