CN105717526B - A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing - Google Patents

A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing Download PDF

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CN105717526B
CN105717526B CN201610134546.5A CN201610134546A CN105717526B CN 105717526 B CN105717526 B CN 105717526B CN 201610134546 A CN201610134546 A CN 201610134546A CN 105717526 B CN105717526 B CN 105717526B
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mrow
phase
msub
phase error
cycle slip
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CN105717526A (en
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肖志斌
唐小妹
马春江
彭竞
雍玲
黄龙
楼生强
王勇
刘哲
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Hunan Zhongdian Xinghe Electronics Co ltd
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National University of Defense Technology
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/35Constructional details or hardware or software details of the signal processing chain
    • G01S19/37Hardware or software details of the signal processing chain
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/24Acquisition or tracking or demodulation of signals transmitted by the system
    • G01S19/29Acquisition or tracking or demodulation of signals transmitted by the system carrier including Doppler, related

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

The present invention provides a kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing.According to the principal element for causing carrier phase cycle slip, when track loop significantly phase jitter occurs or concentrates the multiple symbol identical phase deviations occurred in a short time, phase hit easily occurs for carrier tracking loop.Cause the factor of phase cycle slip according to these, the phase error of phase discriminator output can be handled in carrier tracking loop.By carrying out amplitude limit to the accumulated value of instantaneous phase demodulation error and phase demodulation error, big phase jitter can be avoided and continuously with the phase deviation of symbol, so as to reduce the probability that phase cycle slip occurs for loop.Compared to traditional carrier wave tracing method, for the present invention in the case where not considering loop dynamic, making carrier tracking loop that the probability of phase cycle slip occur reduces by 67%;In the case where input signal Doppler frequency is constant, making carrier tracking loop that the probability of phase cycle slip occur reduces by 38%.

Description

A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing
Technical field
The invention belongs to field of navigation technology, more particularly to a kind of carrier phase cycle slip based on phase error amplitude limiting processing Suppressing method, it can be used in satellite navigation signals receiver or other kinds of band spread receiver.
Background technology
In high-precision receiver, positioned frequently with carrier-phase measurement.Carrier phase cycle slip is to influence carrier wave One of an important factor for phase measurement tracking accuracy.For in general high-precision receiver, the measurement essence of carrier phase Degree can reach centimetre even grade, however, the carrier phase cycle slip once week can be such that carrier-phase measurement produces about 20cm deviation., just must be to carrier-phase measurement in order to reduce influence of the carrier phase cycle slip to carrier-phase measurement In lane jump into capable processing.
Shadow of the cycle slip to carrier phase measurement can be reduced by carrying out detection and reparation for cycle slips to carrier-phase measurement Ring, but this method is easily influenceed by receiver dynamic and satellite, receiver clock-offsets, and when cycle-skipping number is smaller or cycle-skipping When frequently occurring, its treatment effect is unsatisfactory.In order to make up existing for current cycle-slip detection and repair algorithm deficiency, it is necessary to In the carrier tracking loop for generating carrier-phase measurement, the probability that phase cycle-skipping occurs is reduced.
The content of the invention
It is an object of the invention to provide a kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing, purport The probability that cycle slip occurs for high-precision receiver carrier phase is reduced under conditions of unobvious increase operand.
The present invention basic ideas be:According to the principal element for causing carrier phase cycle slip, when track loop is in the short time During interior appearance multiple symbol identical phase deviations that significantly phase jitter or concentration occur, carrier tracking loop is easily sent out Raw phase hit.Cause the factor of phase cycle slip according to these, can be in carrier tracking loop to the phase of phase discriminator output Error is handled.By to the aggregate-value of phase demodulation error and phase demodulation error carry out amplitude limit, can avoid big phase jitter and Continuously with the phase deviation of symbol, so as to reduce the probability that phase cycle slip occurs for loop.
The technical scheme is that:A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing, tool Body comprises the steps:
The first step, build carrier tracking loop
The carrier tracking loop includes phase discriminator, instantaneous phase error limiter, phase error accumulation effect value limiter, ring Path filter and voltage controlled oscillator, the input of phase discriminator are the input signal of carrier tracking loop, and the output end of phase discriminator connects It is connected to instantaneous phase error limiter, the output end connection phase error accumulation effect value limiter of instantaneous phase error limiter, phase The output end linkloop wave filter of position error accumulation value limiter, the output end connection voltage controlled oscillator of loop filter, pressure The output end feed back input of controlled oscillator is to phase discriminator;
Second step, instantaneous phase error amplitude limit
By input signal ui(t) it is sent into phase discriminator and carries out phase demodulation, the phase error of phase discriminator output is sent into instantaneous phase and missed Poor limiter carries out amplitude limiting processing;
Assuming that the phase demodulation section of phase discriminator is [- Φ, Φ], when the phase error of t phase discriminator output is uai(t) when, The output u after instantaneous phase error amplitude limiting processing is carried out to itao(t) it is:
K in above formula1Represent the limiting figure of instantaneous phase error limiter;
3rd step, phase error accumulation effect value amplitude limit
With the output result u of instantaneous phase error limiterao(t) the input u as phase error accumulation effect value limiterbi (t), the then output u of phase error accumulation effect value limiterbo(t) it is:
Wherein, TLAnd K2The respectively time of integration of phase error accumulation effect value limiter and limiting figure;
4th step, determines COEFFICIENT K1、K2And TL
Definition average cycle slip time T is average operation when loop carrier phase error aggregate-value is equal to 2 φ needed for loop Time, average cycle slip probability P are the inverse of average cycle slip time T.To limiter parameter K1∈[1,2]、K2∈[0,1]、TL∈ [1,20] is traveled through (parameter value here only retains one decimal place), is obtained in different parameters K1、K2And TLCombobar Carrier tracking loop under the part average cycle slip time, and when taking the average cycle slip time maximum of satisfaction, corresponding limiter coefficient is K in this method1、K2And TLValue.
The beneficial effects of the invention are as follows:By carrying out amplitude limit to instantaneous phase error and phase error accumulation effect value so that carry The probability that cycle slip occurs for ripple loop tracks loop can be reduced effectively.In addition, the whole implementation process in the present invention all simply relates to And some simple arithmetical operations, be not related to invert, the complex calculation such as feature decomposition, therefore the present invention realizes simple, operand It is small, to insensitive for noise, and implement and be convenient to, can be directly used for traditional carrier tracking loop.
Brief description of the drawings
Fig. 1 is the flow chart for the carrier phase cycle slip suppressing method based on phase error amplitude limit that invention is provided
Fig. 2 is carrier wave ring phase complete cycle saltus step schematic diagram
Fig. 3 is limitation phase error amplitude schematic diagram
Fig. 4 is the structure design block diagram of phase error amplitude limiting processing
Fig. 5 is the loop average cycle slip time with instantaneous phase error limiter COEFFICIENT K1Change curve
Fig. 6 is the loop average cycle slip time with phase error accumulation effect value limiter COEFFICIENT K2Change curve
Fig. 7 is the loop average cycle slip time with phase error accumulation effect value limiter time of integration TLChange curve
Embodiment
Below in conjunction with the accompanying drawings to the carrier phase cycle slip suppressing method provided by the invention based on phase error amplitude limiting processing It is described in detail.
Fig. 1 is the flow of the carrier phase cycle slip suppressing method provided by the present invention based on phase error amplitude limiting processing Figure.
The first step:Build carrier tracking loop
Described carrier tracking loop route carrier phase discriminator, phase error limiter, loop filter and voltage-controlled shake Swing four parts of device to form, phase error limiter includes instantaneous phase error limiter and phase error accumulation effect value limiter again Two parts.The input of phase discriminator is the signal input part of carrier tracking loop, and the output end of phase discriminator is connected to instantaneous phase Errors slicer, the output end connection phase error accumulation effect value limiter of instantaneous phase error limiter, phase error accumulation effect value The output end linkloop wave filter of limiter, loop filter output end connection voltage controlled oscillator, voltage controlled oscillator it is defeated Go out to hold feed back input to phase discriminator.
Second step:Instantaneous phase error amplitude limit
Assuming that the phase demodulation section of phase-shift discriminator is [- φ, φ], when the phase error of t phase discriminator output is uai(t) When, the output u after instantaneous phase error amplitude limiting processing is carried out to itao(t) it is:
K in above formula1Represent the limiting figure of instantaneous phase error limiter.
3rd step:Phase error accumulation effect value amplitude limit
With the output result u of instantaneous phase error limiterao(t) the input u as phase error accumulation effect value limiterbi (t) the output u of limiter, is then accumulatedbo(t) it is:
Wherein, TLAnd K2Respectively accumulate the time of integration and the limiting figure of limiter.
4th step:Determine COEFFICIENT K1、K2And TL
Definition average cycle slip time T is average operation when loop carrier phase error aggregate-value is equal to 2 Φ needed for loop Time, average cycle slip probability P are the inverse of average cycle slip time T.By to different limiter COEFFICIENT Ks1、K2With time of integration TL The lower carrier tracking loop average cycle slip time is emulated, the phase cycle slip probability to be reached according to carrier tracking loop, really Determine the value of each coefficient of carrier tracking loop.
Fig. 2 is the schematic diagram that phase hit occurs in carrier wave ring, and wherein state A and state B are point of safes, also referred to as Equalization point;State C is uneven point, also referred to as saddle point;State D is intermediateness.Hypothesis loop starting is in state A, by Influenceed in by some larger noise dither, ring routing state A is transferred to state D, but state D is not one stable State, so, loop can gradually converge to another stable state B with regard to near-earth.It should have been at equalization point A's Loop is transferred to another equalization point B for being spaced one or several cycles for some reason, and corresponding phase tracking error is then There occurs the saltus step of integer multiples.Therefore, according to above-mentioned analysis, cause the factor of carrier tracking loop phase complete cycle saltus step main Short time significantly phase error jitter and the two kinds of factors of same symbol phase error continuously occurred can be divided into.
Fig. 3 is the schematic diagram limited phase error amplitude, wherein abscissa be phase error size, ordinate For the SIN function of phase error.Hypothesis loop is in equalization point A, and the amplitude of phase error single change is limited below System, its midpoint E are the lower bound of error span change, and point F is the upper bound of changes in amplitude.Make lower bound E and upper bound F in common design Keep symmetrical on equalization point A, i.e., | | E-A | |=| | F-A | |.If PEFProbability (this of phase complete cycle saltus step does not occur for loop In the cycle slip probability said it can be appreciated that loop jumps to equalization point B probability from equalization point A), when EF values are smaller, then The P of phase hit occursEFValue is bigger.
By the amplitude limit of phase error, the phase complete cycle saltus step as caused by a small number of significantly phase errors can be suppressed, but , it is necessary to time T for phase cycle slip caused by continuous multiple same symbol phase errorsLInterior phase error accumulated value enters Row amplitude limit., wherein it is desired to select suitable time of integration T for different application sceneL, as time of integration TLWhen value is excessive, then Loop dynamic performance declines;As time of integration TLWhen value is too small, then phase cycle slip can not be effectively detected again.
Fig. 4 is the structure design block diagram of context of methods, with aeronautical satellite baseband signal ui(t) as carrier tracking loop Input, by carrier phase discriminator, instantaneous phase error limiter, phase error accumulation effect value limiter, loop filter and After voltage controlled oscillator, discriminator is fed back to, forms the carrier tracking loop described in this method.The input of phase discriminator be carrier wave with The signal input part of track loop, the output end of phase discriminator are connected to instantaneous phase error limiter, instantaneous phase error limiter Output end connection phase error accumulation effect value limiter, the output end linkloop wave filter of phase error accumulation effect value limiter, The output end connection voltage controlled oscillator of loop filter, the output end feed back input of voltage controlled oscillator to phase discriminator.
Fig. 5 to Fig. 7 is the result that emulation experiment is carried out using the embodiment of the invention.The base of emulation experiment This parameter setting is as follows:
Input signal signal to noise ratio is -12dB, IF-FRE 100Hz, sample rate 1000Hz;Carrier phase discriminator is adopted With two quadrant arc tangent discriminator;Loop filter uses second order loop, noise bandwidth 5Hz, damped coefficient 2;Loop updates Time is 1ms, and a length of 50s when single emulates, simulation times are 3000 times.
Fig. 5 is the loop average cycle slip time with instantaneous phase error limiter COEFFICIENT K1Change curve.K in Fig. 51=1 Situation be equivalent to not to phase error carry out amplitude limit, when with limiting figure K1Increase, the average cycle slip time of loop Increase, that is, the probability that cycle slip occurs reduce, and work as K1When=1.6, the loop average cycle slip time reaches maximum, i.e., in the simulated conditions Under should take instantaneous phase error limiter COEFFICIENT K1For 1.6.
Fig. 6 is the loop average cycle slip time with phase error accumulation effect value limiter COEFFICIENT K2Change curve.K in Fig. 62 =1 situation is equivalent to not carry out amplitude limit to phase error, by simulation result it can be found that working as K2When=0.8, loop is put down The equal cycle slip time reaches maximum, i.e., instantaneous phase error limiter COEFFICIENT K should be taken under the simulated conditions2For 0.8.
Fig. 7 is the loop average cycle slip time with phase error accumulation effect value limiter time of integration TLChange curve.Fig. 7 Middle TL=1ms situation is equivalent to instantaneous phase limiter, by simulation result it can be found that working as TLDuring=4ms, loop is average The cycle slip time reaches maximum, i.e., instantaneous phase error limiter time of integration T should be taken under the simulated conditionsLFor 4ms.
In summary, although the present invention is disclosed above with preferred embodiment, so it is not limited to the present invention, any Those of ordinary skill in the art, without departing from the spirit and scope of the present invention, when various changes and retouching, therefore this hair can be made Bright protection domain is worked as to be defined depending on the scope that claims define.

Claims (1)

1. a kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing, it is characterised in that comprise the following steps:
The first step, build carrier tracking loop
The carrier tracking loop includes phase discriminator, instantaneous phase error limiter, phase error accumulation effect value limiter, loop filter Ripple device and voltage controlled oscillator, the input of phase discriminator are the signal input part of carrier tracking loop, and the output end of phase discriminator connects To instantaneous phase error limiter, the output end connection phase error accumulation effect value limiter of instantaneous phase error limiter, phase The output end linkloop wave filter of error accumulation value limiter, the output end connection voltage controlled oscillator of loop filter are voltage-controlled The output end feed back input of oscillator is to phase discriminator;
Second step, instantaneous phase error amplitude limit
By input signal ui(t) it is sent into phase discriminator and carries out phase demodulation, the phase error of phase discriminator output is sent into instantaneous phase error amplitude limit Device carries out amplitude limiting processing;
Assuming that the phase demodulation section of phase discriminator is [- φ, Φ], when the phase error of t phase discriminator output is uai(t) when, to it Carry out the output u after instantaneous phase error amplitude limiting processingao(t) it is:
<mrow> <msub> <mi>u</mi> <mrow> <mi>a</mi> <mi>o</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>=</mo> <mfenced open = "{" close = ""> <mtable> <mtr> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mi>a</mi> <mi>i</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>-</mo> <msub> <mi>K</mi> <mn>1</mn> </msub> <mo>*</mo> <mi>&amp;Phi;</mi> </mrow> </mtd> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mi>a</mi> <mi>i</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>&gt;</mo> <msub> <mi>K</mi> <mn>1</mn> </msub> <mo>*</mo> <mi>&amp;Phi;</mi> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mi>a</mi> <mi>i</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>,</mo> </mrow> </mtd> <mtd> <mrow> <mo>|</mo> <msub> <mi>u</mi> <mrow> <mi>a</mi> <mi>i</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>|</mo> <mo>&lt;</mo> <msub> <mi>K</mi> <mn>1</mn> </msub> <mo>*</mo> <mi>&amp;Phi;</mi> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mi>a</mi> <mi>i</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>+</mo> <msub> <mi>K</mi> <mn>1</mn> </msub> <mo>*</mo> <mi>&amp;Phi;</mi> <mo>,</mo> </mrow> </mtd> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mi>a</mi> <mi>i</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>&lt;</mo> <mo>-</mo> <msub> <mi>K</mi> <mn>1</mn> </msub> <mo>*</mo> <mi>&amp;Phi;</mi> </mrow> </mtd> </mtr> </mtable> </mfenced> </mrow>
K in above formula1Represent the limiting figure of instantaneous phase error limiter;
3rd step, phase error accumulation effect value amplitude limit
With the output result u of instantaneous phase error limiterao(t) the input u as phase error accumulation effect value limiterbi(t), then The output u of phase error accumulation effect value limiterbo(t) it is:
Wherein, TLAnd K2The respectively time of integration of phase error accumulation effect value limiter and limiting figure;
4th step, determines COEFFICIENT K1、K2And TL
Definition average cycle slip time T is average operating time when loop carrier phase error aggregate-value is equal to 2 Φ needed for loop, Average cycle slip probability P is the inverse of average cycle slip time T;
To limiter parameter K1∈[1,2]、K2∈[0,1]、TL∈ [1,20] is traveled through, and is obtained in different parameters K1、K2And TL Carrier tracking loop under the combination condition average cycle slip time, and when taking the average cycle slip time maximum of satisfaction, corresponding amplitude limit Device coefficient is K in carrier tracking loop1、K2And TLValue.
CN201610134546.5A 2016-03-10 2016-03-10 A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing Active CN105717526B (en)

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CN106873008B (en) * 2016-12-21 2019-09-10 湖南北云科技有限公司 A kind of satellite navigation half cycle jump inhibition device
CN106597495B (en) * 2016-12-23 2018-12-18 湖南北云科技有限公司 A kind of satellite navigation loop parameter limiter setting device based on pessimistic counter
CN106526635B (en) * 2016-12-29 2019-02-22 中国人民解放军国防科学技术大学 A kind of filtering method of GNSS signal carrier track and navigation calculation tight integration

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CN101334458B (en) * 2008-06-03 2011-04-27 电子科技大学 Satellite navigation positioning carrier phase cycle slip rehabilitation method
US8170796B2 (en) * 2009-05-20 2012-05-01 Northrop Grumman Guidance And Electronics Company, Inc. Ins based GPS carrier phase cycle slip detection and repairing
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