CN105702749B - The polycrystalline multilayer passivated reflection reducing of high PID resistances penetrates film and preparation method thereof - Google Patents

The polycrystalline multilayer passivated reflection reducing of high PID resistances penetrates film and preparation method thereof Download PDF

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CN105702749B
CN105702749B CN201610168721.2A CN201610168721A CN105702749B CN 105702749 B CN105702749 B CN 105702749B CN 201610168721 A CN201610168721 A CN 201610168721A CN 105702749 B CN105702749 B CN 105702749B
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film
refractive index
reflection reducing
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CN105702749A (en
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瞿辉
徐春
曹玉甲
张源
张一源
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Jiangsu Shunfeng Photovoltaic Technology Co Ltd
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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Abstract

The present invention relates to a kind of polycrystalline multilayer passivated reflection reducing of high PID resistances to penetrate film and preparation method thereof, after entering PECVD bodies of heater including polysilicon chip after etching, after first leading to the oxygen-containing gas such as oxygen or air, redeposited multilayer passivated reflection reducing penetrates film layer, the bottom SiN that polysilicon chip substrate front surface is set gradually from bottom to top and refractive index is successively decreasedxLayer, intermediate layer SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyLayer;Its total film thickness is 70~135nm, and total refractive index is 1.95~2.20.The present invention is based on conventional multi-crystalline silicon battery process, and the preparation method and passivated reflection reducing when only changing PECVD penetrate the film quality structure of film, can be compatible with conventional crystalline silicon battery process, can be produced after being transformed directly using common etching apparatus and PECVD device or slightly.

Description

The polycrystalline multilayer passivated reflection reducing of high PID resistances penetrates film and preparation method thereof
Technical field
The present invention relates to solar energy crystal silicon battery manufacturing field, the polycrystalline multilayer passivation of especially a kind of high PID resistances subtracts Reflectance coating and preparation method thereof.
Background technology
As environmental problem and energy problem obtain the concern of more and more people, solar cell as a kind of clean energy resource, People research and develop to it has had been introduced into a new stage.PID (potential induced degradation) is imitated It should refer under long-term action of high voltage, leaky in component between glass and encapsulating material be present, cause surface passivation before this Antireflective coating fails, and then PN junction fails, and finally assembly property is reduced.The p-type solar energy crystal silicon component of traditional handicraft is all In the presence of certain PID Problem of Failure, so research PID phenomenons, the solar cell for developing PID Free is vast solar energy factory One of target of business research and development department and part research institutions.More general and stricter at present is that double 85PID are tested, its test condition For 1000V negative voltage, 85 DEG C of environment temperature, 85% humidity, 96h testing time, the final peak power output of component Attenuation ratio, which is less than 5%, can be determined as PID test passes, i.e. PID Free.
The SiNx passivated reflection reducings of traditional solar energy polycrystal battery surface penetrate film layer nearly all because refractive index is relatively low so that PID declines Subtract more serious;Existing market is in order to pursue PID Free, and main method is to improve the refractive index of SiNx film layers, but battery is changed The more conventional technique of efficiency reduces 1-2%;Also method is exactly the ozone O generated using ultraviolet ionization, high frequency ozone generator3Oxygen Change silicon chip surface, generate relatively thin SiOxLayer uses laughing gas N2OPECVD methods directly deposit one layer of SiO in silicon chip surfacexFilm, Make battery that there is certain PID resistances.
On the other hand, the conventional antireflective coating of polycrystalline battery surface is mostly two to three layers of nitridation in large-scale production at present Silicon, its usual optical thickness are a quarter or half of specific wavelength.For single-layer silicon nitride silicon antireflective coating, its Only there is preferable anti-reflective effect to single wavelength, there is of a relatively high reflectivity and poor passivation effect.It can drop Antiradar reflectivity and improve passivation effect antireflective coating be solar cell research focus.
The content of the invention
The technical problem to be solved in the present invention is:It is proposed a kind of polycrystalline multilayer passivated reflection reducing of high PID resistances penetrate film and its Preparation method, this method need not use ozone devices or other method, and silicon chip top layer specially increases SiOx layers after etching, After directly being transformed using common etching apparatus and PECVD device or slightly.Passivated reflection reducing prepared by this method penetrates film can Reflectivity is reduced, improves passivation effect, improves efficiency of solar cell, and there is very excellent anti-PID attenuation characteristics.
The technical solution adopted in the present invention is:A kind of polycrystalline multilayer passivated reflection reducing of high PID resistances penetrates film, is included in more The bottom SiN that crystal silicon chip substrate front surface is set gradually from bottom to topxLayer, intermediate layer SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyLayer;Described bottom SiNxLayer, intermediate layer SiNxLayer, single or multiple lift optics are excellent Change layer SiNxLayer and top layer optical optimization layer SiOxNyThe refractive index of layer is successively decreased;Described bottom SiNxLayer, intermediate layer SiNxLayer, Single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyThe total film thickness of layer is 70~135nm, total refraction Rate is 1.95~2.20.
Further, bottom SiN of the present inventionxLayer, intermediate layer SiNxLayer and single or multiple lift optical optimization layer SiNxLayer is prepared using PECVD;Described bottom SiNxThe refractive index of layer is 2.15~2.35, and thickness is 4~15nm;Institute The intermediate layer SiN statedxThe refractive index of layer is 2.10~2.30, and thickness is 10~25nm;Described single or multiple lift optical optimization Layer SiNxThe refractive index of layer is 1.95~2.25, and thickness is 20~65nm.
Further say, top layer optical optimization layer SiO of the present inventionxNyLayer using PECVD by oxygen-containing gas with SiH4、NH3Deposition forms together;Its thickness is 15~60nm, and refractive index is 1.6~1.95.
Meanwhile present invention also offers the preparation method that a kind of polycrystalline multilayer passivated reflection reducing of high PID resistances penetrates film, including Following steps:
1) performed etching after the processing of polysilicon chip common process;
2) polysilicon chip is sent into the PECVD cavitys 300 DEG C to 550 DEG C by carrier after etching, and is passed through oxygen-containing gas 3min to 20min;
3) film is penetrated using PECVD device plating multilayer passivated reflection reducing;Be included in polysilicon chip substrate front surface from bottom to top according to The bottom SiN of secondary settingxLayer, intermediate layer SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyLayer;
4) using conventional batteries typography printing back electrode, Al-BSF, positive grid line and positive electrode, and sinter.
The present invention principle be:Polysilicon chip enters in the PECVD cavitys between 300 DEG C to 550 DEG C after etching, is passed through oxygen For the oxygen-containing gas such as gas or air with after certain time, silicon chip surface grown a thin layer of hot SiO2Layer, the SiOx layers relatively cause It is close, there is preferable passivation effect, can effectively reduce the recombination-rate surface of cell piece;And the fine and close relatively thin (0.1nm- of SiOx layers 2nm), clearly, a part of electric charge that can be enriched with battery surface guides from preventing because of electric charge heap the tunneling effect of electronics Product potential induction attenuation (PID) caused by battery surface, makes battery have anti-PID attenuation characteristics.
Multilayer passivated reflection reducing penetrates the SiN of film bottom high index of refractionxThe introducing of layer can both strengthen film layer passivation effect, again may be used With the free positively charged ion in effective barrier assembly, the anti-PID attenuation characteristics of battery are effectively improved;According to certain rules successively Reduce multilayer SiNxThe reflectivity of cell piece side to light, Neng Gouyou can also be greatly reduced in layer while having certain PID resistances Effect reduces the reflectivity of intermediate waves wave band, improves the short circuit current of cell piece;In conjunction with the SiO of top layer low-refractionxNyLayer, makes Overall film layer refractive index it is lower, continue increase incident ray ratio, improve short circuit current, and cell piece lamination after color compared with Secretly, overall uniform colorless is poor.The polycrystalline multilayer film battery PID resistances prepared using this method are splendid, and the component of preparation can lead to The PID tests crossed under the conditions of the non-resistance EVA of in the market double 85, and battery conversion efficiency is higher than the conventional PECVD coating process of tradition.
The beneficial effects of the invention are as follows:Based on conventional polysilicon battery process, only preparation method during change PECVD and passivation The film quality structure of antireflective coating, can be compatible with conventional crystalline silicon battery process, directly using common etching apparatus and PECVD device or It can be produced after slightly transforming.This method to equipment and polysilicon chip without particular/special requirement, be easily achieved and due to depositional coating before The oxygen-containing gas such as oxygen or air are passed through, safety problem when being not in vent gas treatment, suitable for large-scale production, can also be transported For some advanced battery process, such as:Carry on the back passivation cell, N-type double-side cell, MWT battery etc..
Brief description of the drawings
The present invention is further described with reference to the accompanying drawings and examples.
Fig. 1 is the structural representation of the present invention;
In figure:1st, bottom SiNx layer;2nd, intermediate layer SiNxLayer;3rd, single or multiple lift optical optimization layer SiNxLayer;4th, top layer light Learn optimization layer SiOxNyLayer.
Embodiment
Presently in connection with accompanying drawing and preferred embodiment, the present invention is further detailed explanation.These accompanying drawings are simplified Schematic diagram, only illustrate the basic structure of the present invention in a schematic way, therefore it only shows the composition relevant with the present invention.
A kind of polycrystalline multilayer passivated reflection reducing of high PID resistances as shown in Figure 1 penetrates membrane structure, is included in polysilicon chip substrate The bottom SiN that front surface is set gradually from bottom to topxLayer 1, intermediate layer SiNxLayer 2, single or multiple lift optical optimization layer SiNxLayer 3 And top layer optical optimization layer SiOxNyLayer 4.These film layers from bottom to top successively decrease by refractive index, and its total film thickness is 70~135nm, always Refractive index is 1.95~2.20.
It is further described below by two groups of embodiments:
Embodiment 1
1) original silicon chip is pre-processed, the pretreatment includes the techniques such as making herbs into wool, diffusion and the etching in battery process;
2) silicon chip is into being warming up to 500 DEG C after 380 DEG C of PECVD device after etching, first lead in PECVD cavitys oxygen or The oxygen-containing gas such as air 15min;The multilayer that refractive index reduces successively according to certain rules is sequentially depositing on polysilicon chip surface again SiNxLayer, wherein bottom SiNxLayer, refractive index 2.35, thicknesses of layers 10nm;Intermediate layer SiNxLayer, refractive index 2.2, film Thickness degree is 20nm;Individual layer SiNxLayer, refractive index 2.10, thicknesses of layers 30nm;It is surplus in diffusingsurface plating using PECVD device Remaining SiOxNyLayer, refractive index 1.75, thicknesses of layers 30nm;
4) using conventional batteries typography printing back electrode, Al-BSF, positive grid line and positive electrode, and sinter.
Found by detection, the photoelectric transformation efficiency for the solar battery sheet that the present embodiment obtains increases and PID resistances have Larger lifting.Specific data see the table below 1:
The photoelectric transformation efficiency and PID for the solar cell that the present embodiment of table 1 obtains
As can be seen from Table 1:Double-layer reflection reducing coating process efficiency gain 0.11% prepared by this method, mainly due to short circuit 50 milliamperes of current gain, filling FF increases by 0.05;Double 85 condition PID (potential induction attenuation) power attenuations in 96 hours only have simultaneously 1.3%, PID decays to 2.8% within 192 hours.
Embodiment 2
1) original silicon chip is pre-processed, the pretreatment includes the techniques such as making herbs into wool, diffusion and the etching in battery process;
2) silicon chip is into being warming up to 550 DEG C after 380 DEG C of PECVD device after etching, first lead in PECVD cavitys oxygen or The oxygen-containing gas such as air 5min;The multilayer SiN that refractive index reduces successively according to certain rules is sequentially depositing on polysilicon chip surface againx Layer, wherein bottom SiNxLayer, refractive index 2.4, thicknesses of layers 8nm;Intermediate layer SiNxLayer, refractive index 2.20, thicknesses of layers For 15nm;Individual layer SiNxLayer, refractive index 2.05, thicknesses of layers 30nm;Using PECVD device residue is plated in diffusingsurface SiOxNyLayer, refractive index 1.75, thicknesses of layers 40nm;
4) using conventional batteries typography printing back electrode, Al-BSF, positive grid line and positive electrode, and sinter.
Found by detection, the photoelectric transformation efficiency for the solar battery sheet that the present embodiment obtains increases and PID resistances have Larger lifting.Specific data see the table below 2:
The photoelectric transformation efficiency and PID for the solar cell that the present embodiment of table 2 obtains
As can be seen from Table 1:Double-layer reflection reducing coating process efficiency gain 0.18% prepared by this method, mainly due to short circuit 80 milliamperes of current gain, filling FF increases by 0.05;PID (potential induction attenuation) power attenuation in 96 hours simultaneously only has 0.7%, 192 hours PID decay to 2.8%, and battery PID pad values are very low.
The embodiment of the simply present invention described in description above, various illustrations are not to the reality of the present invention Matter Composition of contents limits, and person of an ordinary skill in the technical field can be to described in the past specific after specification has been read Embodiment is made an amendment or deformed, without departing from the spirit and scope of the invention.

Claims (4)

1. a kind of polycrystalline multilayer passivated reflection reducing of high PID resistances penetrates the preparation method of film, it is characterised in that:Comprise the following steps:
1) performed etching after the processing of polysilicon chip common process;
2) polysilicon chip is sent into the PECVD cavitys 300 DEG C to 550 DEG C by carrier after etching, and is passed through oxygen-containing gas 3min To 20min;
3) film is penetrated using PECVD device plating multilayer passivated reflection reducing;It is included in polysilicon chip substrate front surface to set successively from bottom to top The bottom SiN putxLayer, intermediate layer SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNy Layer;
4) using conventional batteries typography printing back electrode, Al-BSF, positive grid line and positive electrode, and sinter.
2. the polycrystalline multilayer passivated reflection reducing of high PID resistances as claimed in claim 1 penetrates the preparation method of film, it is characterised in that: Described bottom SiNxLayer, intermediate layer SiNxLayer, single or multiple lift optical optimization layer SiNxLayer and top layer optical optimization layer SiOxNyThe refractive index of layer is successively decreased;Described bottom SiNxLayer, intermediate layer SiNxLayer, single or multiple lift optical optimization layer SiNxLayer with And top layer optical optimization layer SiOxNyThe total film thickness of layer is 70~135nm, and total refractive index is 1.95~2.20.
3. the polycrystalline multilayer passivated reflection reducing of high PID resistances as claimed in claim 1 penetrates the preparation method of film, it is characterised in that: Described bottom SiNxLayer, intermediate layer SiNxLayer and single or multiple lift optical optimization layer SiNxLayer is prepared using PECVD; Described bottom SiNxThe refractive index of layer is 2.15~2.35, and thickness is 4~15nm;Described intermediate layer SiNxThe refractive index of layer For 2.10~2.30, thickness is 10~25nm;Described single or multiple lift optical optimization layer SiNxThe refractive index of layer for 1.95~ 2.25, thickness is 20~65nm.
4. the polycrystalline multilayer passivated reflection reducing of high PID resistances as claimed in claim 1 penetrates the preparation method of film, it is characterised in that: Described top layer optical optimization layer SiOxNyLayer uses PECVD by oxygen-containing gas and SiH4、NH3Deposition forms together;Its thickness For 15~60nm, refractive index is 1.6~1.95.
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CN109888060A (en) * 2019-03-15 2019-06-14 通威太阳能(合肥)有限公司 A kind of solar cell and preparation method thereof with three layers of passivation layer structure
CN216624291U (en) * 2021-12-30 2022-05-27 天合光能股份有限公司 Solar cell front passivation film layer

Citations (3)

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CN102903764A (en) * 2012-09-27 2013-01-30 东方电气集团(宜兴)迈吉太阳能科技有限公司 Three-layered silicon nitride antireflective film of crystalline silicon solar cell and preparation method thereof
CN103794658A (en) * 2014-01-27 2014-05-14 镇江大全太阳能有限公司 Composite membrane efficient crystalline silicon solar cell and manufacturing method of composite membrane efficient crystalline silicon solar cell
CN104916710A (en) * 2015-06-30 2015-09-16 江苏顺风光电科技有限公司 High-efficiency polycrystalline multilayer passivation anti-reflection film structure with high PID resistance

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102903764A (en) * 2012-09-27 2013-01-30 东方电气集团(宜兴)迈吉太阳能科技有限公司 Three-layered silicon nitride antireflective film of crystalline silicon solar cell and preparation method thereof
CN103794658A (en) * 2014-01-27 2014-05-14 镇江大全太阳能有限公司 Composite membrane efficient crystalline silicon solar cell and manufacturing method of composite membrane efficient crystalline silicon solar cell
CN104916710A (en) * 2015-06-30 2015-09-16 江苏顺风光电科技有限公司 High-efficiency polycrystalline multilayer passivation anti-reflection film structure with high PID resistance

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