CN105675990B - The link impedance detecting method of multi-layered interconnection board - Google Patents

The link impedance detecting method of multi-layered interconnection board Download PDF

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CN105675990B
CN105675990B CN201610009243.0A CN201610009243A CN105675990B CN 105675990 B CN105675990 B CN 105675990B CN 201610009243 A CN201610009243 A CN 201610009243A CN 105675990 B CN105675990 B CN 105675990B
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link
impedance
route
test point
needed
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CN105675990A (en
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范红
王红飞
陈蓓
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Guangzhou Xingsen Electronic Co Ltd
Shenzhen Fastprint Circuit Tech Co Ltd
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Guangzhou Xingsen Electronic Co Ltd
Shenzhen Fastprint Circuit Tech Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant

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  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

The invention discloses the link impedance detecting methods of multi-layered interconnection board, the described method comprises the following steps: the position of route is measured needed for S1, acquisition;Link where measurement route needed for S2, analysis, and find out the test point at the link terminal position;S3, the TDR curve that whole link is measured at test point;TDR curve regions corresponding to measurement route needed for S4, selection, and calculate average value.The present invention can accurately reflect each section of link of impedance value.

Description

The link impedance detecting method of multi-layered interconnection board
Technical field
The present invention relates to the link impedance detecting methods of a kind of test method, especially multi-layered interconnection board.
Background technique
In the test of PCB line impedance, the copper with the line width of the impedance line of required control, wiring layer can be generally designed Thick, the identical testing impedance item of laminated construction.Testing impedance item and actual track and testing impedance local environment with There is some difference for true environment locating for actual track, such as residual copper ratio, gummosis, substrate copper thickness, the thick uniformity that is situated between, etching are equal Even property etc., and the difference directly contributes the line impedance measured using testing impedance item and actual track impedance is not consistent.Cause This, in order to accurately measure the line impedance of a certain layer, it will usually is using required measurement route as measurement object, and will be with required measurement The hole that line end is directly connected to is as test point, and required measurement route can be single ended line, is also possible to differential lines.
In multilayer interconnection PCB, required measurement route is connected together with other sandwich circuits constitutes link, and required measurement line Road is not the terminal for being always at entire link.In this way, when required measurement route is not on link terminal, with required measurement The hole that line end is directly connected to as test point test when, due to be located at the test point hole simultaneously with required measurement route with And other connections, therefore will lead to transmitting signal and shunt, so that the line impedance value measured is less than normal, cause test result tight It is distorted again, or the test result of mistake.
Summary of the invention
In view of the deficiencies of the prior art, the purpose of the present invention is intended to provide a kind of link impedance of multi-layered interconnection board Test method, this method can be used for the link testing impedance of multi-layered interconnection board.
To achieve the above object, the present invention adopts the following technical scheme:
The link impedance detecting method of multi-layered interconnection board, the described method comprises the following steps:
The position of route is measured needed for S1, acquisition;
Link where measurement route needed for S2, analysis, and find out the test point at the link terminal position;
S3, the TDR curve that whole link is measured at test point, point and link in the different time sections of the TDR curve The line impedance value of upper each section of interconnection corresponds.;
TDR curve in period corresponding to measurement route needed for S4, selection, counts in the period on TDR curve The corresponding impedance value of each point, and the decision value of route is measured needed for calculating.
Preferably, in the step S2 further include link terminal corresponding to measurement route and test point needed for determining it Between be separated by k sections of routes.
Further ,+1 section of the kth of TDR curve from the off as required measurement route institute is right in the step S4 The TDR curve answered.
Preferably, when required measurement route is single ended line, the test point is the weldering on the via hole of link terminal position Pad on disk and neighbouring ground hole;When required measurement route is differential lines, the test point is the difference of link terminal position Divide the pad on hole.
Preferably, in step s 2 using genesis software analyze needed for measurement route where link and find out survey Pilot position, and determine and be separated by k sections of routes between test point and required measurement route.
Preferably, the TDR curve of whole link is measured using impedance instrument in step s3.
Further, measurement needed for being calculated in step s 4 using impedance instrument according to the TDR curve of corresponding period The decision value of route.
Preferably, the length of required measurement route is between 1inch-4inch.
Compared with prior art, the beneficial effects of the present invention are:
For the link testing impedance of multi-layered interconnection board, with the pad and via hole on the via hole at link terminal position When the pad on pad or difference hole on neighbouring ground hole is test point, the impedance of each section of route of link can be accurately reflected Value.
Detailed description of the invention
Fig. 1 is test method flow chart of the invention;
Fig. 2 is the TDR curve graph of differential lines under different test points, wherein curve 1 is from the difference hole A of link terminal Pad measurement when TDR curve, curve 2 be from the B of difference hole pad measure when TDR curve;
Fig. 3 is test philosophy schematic diagram;
Fig. 4 is the TDR curve graph of single ended line under different test points, wherein curve 1 is from the via hole via1 of link terminal Pad and via hole via1 attachment ground hole on pad measurement when TDR curve, curve 2 be from via hole via2 pad and TDR curve when pad on ground hole near via hole via2 measures.
Specific embodiment
In the following, being described further in conjunction with attached drawing and specific embodiment to the present invention:
Embodiment one:
Fig. 2 is referred to, required measurement route is the differential lines of two pairs of interconnection, which is located at La layers and Ln layers, A link is connected and composed by difference hole B between two pairs of differential lines, and the impedance design value of two pairs of differential lines is 100ohm.When actually using impedance instrument measurement, if corresponding to differential lines in Ln layers of measurement according to traditional test methods Impedance, from the pad measurement on the B of difference hole, the obtained TDR curve being connected with difference hole B is line impedance value.This implementation Example in impedance instrument using agilent company production Network Analyzer but it is also possible to be Tyke TDR time-domain analysis instrument, The TDR waving map instrument or other instruments with same test function of Polar company exploitation.Curve 2 in Fig. 2 be from The TDR curve that pad measurement on the B of difference hole obtains, and from curve 2 it can be seen that Ln layer on a pair of of difference impedance values About 50ohm, the impedance value differ half with design value.This is because when directly measuring the pad on the B of difference hole, measurement circuit Similar to the equivalent circuit in the lower right corner in Fig. 3, that is, when giving the pad excitation electric signal on the B of difference hole, electric signal can be along L1 It is propagated with Ln both direction, correspondingly, electricity will disperse on the route in L1 layers and Ln layers.And according to testing impedance principle, When the electric signal at certain moment being all only added in Ln layers of route, Ln layers of line impedance could be accurately measured.Therefore, it is surveying When the difference line impedence of Ln layers of amount, when selecting the pad on the difference hole B being connected directly with the differential lines as test point, due to Electric signal can be propagated along La and Ln both direction, and the differential lines on La can divide part electricity, so that the pad on the B of difference hole The Ln layer difference line impedence that place measures is significantly less than design value.
If the difference hole A or the pad on the C of difference hole that click directly on the terminal location of link where differential lines, excitation electricity Signal can integrally extend at any time, propagate forward, as shown in the picture left above and lower-left figure in Fig. 3, in this way, electric signal is just not present Distributary phenomenon, thus on measurement route needed for being distributed in all excitation electric signals.And electric signal is constituting link at any time Each route on propagate, corresponding, there are following relational expression (1) with the time for transmission range:
L=1/2 × Vt...... (1),
Wherein, L is transmission range, and using terminal location as starting point, the line length that electric signal reached;V is electricity The spread speed of signal;T is the time.
Therefore, Ln is measured using the link impedance detecting method of multi-layered interconnection board proposed by the present invention in embodiment one When the difference line impedence of layer, as shown in Figure 1, the position of differential lines need to be found in Ln layers first, the post analysis differential lines institute Network link, and find out link terminal differential position hole A, difference hole A is also the corresponding difference hole of La layers of differential lines, Pad on the A of difference hole is test point.
Above- mentioned information can be obtained or be analyzed from the genesis software that Frontline company develops and obtain.It should Genesis software is the computer-aided manufacturing software in terms of a wiring board, it can make CAM, i.e. computer-aided manufacturing Industry process is made into the module of multinomial standard according to the number of plies and labor and materials specification of difference, automated analysis and compiles data processing.Cause This, layer and specific location where measurement route needed for being obtained from genesis software, and route institute is measured needed for analyzing Via hole and pad at link and link terminal position.In addition, in addition to the genesis software of Frontline company exploitation, also Can using the computer-aided manufacturing software in terms of All other routes plate, with can obtain and analyze route to be measured position and Subject to link condition.
After test point position has been determined, whole link is measured at the pad on the A of difference hole using impedance instrument TDR curve.In the present embodiment using agilent company production Network Analyzer but it is also possible to be Tyke TDR time-domain analysis instrument, The TDR waving map instrument or other instruments with same test function of Polar company exploitation.In example 1, differential lines The terminal location of place link is at La layers, and pad and institute of the differential lines of required measurement at Ln layers, on test point difference hole A It need to measure and be separated by a segment difference separated time between differential lines, know that the propagation of electrical signals time is directly proportional to line length according to formula (1), Thus, as shown in Fig. 2, t1The each point on TDR curve in period and the impedance value of La layers of differential lines correspond, and t2-t1 The each point on TDR curve in period and the impedance value of Ln layers of differential lines correspond.Therefore in selected different time sections After TDR curve, according to the corresponding impedance value of each point on TDR curve, the Network Analyzer developed with agilent company or other tools The decision value of measurement differential lines needed for having the instrument statistics of same test function.As shown in Fig. 2, from link end points difference hole When pad on A measures, the decision value of La layers of differential lines is 102ohm, and the decision value of Ln layers of differential lines is 100ohm, the decision value of above-mentioned two pairs of differential lines is close with design value, belongs to normal fluctuation range.Therefore, for more The link testing impedance of layer interconnection line plate, when using the pad on the difference hole at link terminal position as test point, Neng Gouzhun The really impedance value of each section of link of reaction.
Embodiment two:
Fig. 4 is referred to, embodiment two and the difference of embodiment one are, soft in the genesis of Frontline company exploitation Three layers, i.e. L1 layers, Ln+1 layers and Lk+1 layers are designed in part, are mutually linked as in three single-ended impedance lines being located on above-mentioned three layers The impedance design value of one link, every single ended line is 50ohm.Conventionally measurement and L1 layers of single ended line, Ln+1 layers The all connected via hole via2 of single ended line on pad and via hole via2 near ground hole on pad when, be connected with via hole via2 TDR curve be line impedance value.Curve 2 in Fig. 4 is from the ground hole of pad and via hole via2 attachment on via hole via2 On pad test when corresponding TDR curve.And it can be seen that the impedance value of L1 layers of single ended line is about from the curve of Fig. 42 26ohm, hence it is evident that be less than design value, lead to test distortion.
Different from above-mentioned traditional test methods, in example 2 from the weldering on the via hole via1 from link end points position Pad measurement on ground hole near disk and via hole via1.Pass through the resistance of each point on the corresponding TDR curve of statistics different time sections Anti- value, the decision value that can obtain L1 layers of single ended line is 50ohm, and the decision value of Ln+1 layers of single ended line is 51ohm, Lk The decision value of+1 layer of single ended line is 50ohm.The decision value and design value of three single ended lines are close, belong to normal fluctuation Range.Therefore, for the link testing impedance of multi-layered interconnection board, near the via hole and via hole at link terminal position When pad on ground hole is that test point measures, each section of link of impedance value can be accurately obtained.
In the above embodiments one and embodiment two, in order to accurately be surveyed under the test equipment with certain resolution The TDR curve of route is measured, i.e., using the Network Analyzer with certain resolution or other of agilent company exploitation with phase With test function and when the TDR curve of the apparatus measures route with certain resolution, it need to be developed by Frontline company Genesis software finds designated layer, and analyze with identical line width institute it is wired, with length between 1inch-4inch One single ended line or a pair of of differential lines are as measurement object.
It will be apparent to those skilled in the art that can make various other according to the above description of the technical scheme and ideas Corresponding change and deformation, and all these changes and deformation all should belong to the protection scope of the claims in the present invention Within.

Claims (7)

1. the link impedance detecting method of multi-layered interconnection board, which is characterized in that the described method comprises the following steps:
The position of route is measured needed for S1, acquisition;
Link where measurement route needed for S2, analysis, and find out the test point at the link terminal position;
S3, the TDR curve that whole link is measured at test point, the point and chain road in the different time sections of the TDR curve are each The line impedance value of section interconnection corresponds;
TDR curve corresponding to measurement route needed for S4, selection in the period counts in the period each point on TDR curve Corresponding impedance value, and the decision value of route is measured needed for calculating;
When required measurement route is single ended line, the test point is near pad and via hole on the via hole of link terminal position Ground hole on pad;When required measurement route is differential lines, the test point is on the difference hole of link terminal position Pad.
2. the link impedance detecting method of multi-layered interconnection board according to claim 1, which is characterized in that in the step It further include being separated by k sections of routes between link terminal corresponding to measurement route and test point needed for determining in rapid S2.
3. the link impedance detecting method of multi-layered interconnection board according to claim 2, which is characterized in that in the step + 1 section of the kth of TDR curve from the off is TDR curve corresponding to required measurement route in rapid S4.
4. the link impedance detecting method of multi-layered interconnection board according to claim 2, which is characterized in that in step S2 It is middle using genesis software analyze needed for measurement route where link and find out test point position, and determine test point It is separated by k sections of routes between required measurement route.
5. the link impedance detecting method of multi-layered interconnection board according to claim 1, which is characterized in that in step S3 The middle TDR curve that whole link is measured using impedance instrument.
6. the link impedance detecting method of multi-layered interconnection board according to claim 5, which is characterized in that in step S4 The middle decision value for calculating required measurement route according to the TDR curve of corresponding period using impedance instrument.
7. the link impedance detecting method of multi-layered interconnection board described in any one of -6 according to claim 1, feature It is, the length of required measurement route is between 1inch-4inch.
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CN106855590A (en) * 2016-11-18 2017-06-16 深圳崇达多层线路板有限公司 A kind of PCB impedance modules structure and its detection method
CN107656187B (en) * 2017-09-07 2020-02-28 南京协辰电子科技有限公司 Differential line test information determining method and device
CN107703360A (en) * 2017-09-15 2018-02-16 郑州云海信息技术有限公司 A kind of impedance test system and method for server complete signal link
CN107656141A (en) * 2017-09-22 2018-02-02 信利光电股份有限公司 Position point impedance method of testing, system, device and readable storage medium storing program for executing on circuit
CN107589300A (en) * 2017-09-22 2018-01-16 信利光电股份有限公司 A kind of line impedance detection method, system, device and readable storage medium storing program for executing
CN107664717A (en) * 2017-09-22 2018-02-06 信利光电股份有限公司 Paste PI reinforcement line testing process, system, equipment and readable storage medium storing program for executing
CN107632202A (en) * 2017-09-22 2018-01-26 信利光电股份有限公司 Paste impedance detecting method, system, equipment and the readable storage medium storing program for executing of steel disc circuit
CN107677890A (en) * 2017-09-22 2018-02-09 信利光电股份有限公司 Paste electromagnetic shielding film line testing process, system, equipment and readable storage medium storing program for executing
CN113125855B (en) * 2021-04-25 2023-02-28 无锡江南计算技术研究所 Impedance measurement method for printed board differential signal line

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1313722A (en) * 2000-03-02 2001-09-19 索尼公司 Multi-layer printed circuit board and method for measuring impendance thereof
CN1523363A (en) * 2003-02-18 2004-08-25 ���루���������޹�˾ Method of testing transmission line characteristic impedance
CN101876674A (en) * 2009-04-30 2010-11-03 鸿富锦精密工业(深圳)有限公司 Characteristic impedance testing system and method
CN201639854U (en) * 2009-11-30 2010-11-17 英业达股份有限公司 Multilayer printed circuit board structure for testing impedance value of high-speed signal line
CN102331527A (en) * 2010-07-12 2012-01-25 英业达股份有限公司 Method for automatically detecting impedance characteristic in printed circuit board

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1313722A (en) * 2000-03-02 2001-09-19 索尼公司 Multi-layer printed circuit board and method for measuring impendance thereof
CN1523363A (en) * 2003-02-18 2004-08-25 ���루���������޹�˾ Method of testing transmission line characteristic impedance
CN101876674A (en) * 2009-04-30 2010-11-03 鸿富锦精密工业(深圳)有限公司 Characteristic impedance testing system and method
CN201639854U (en) * 2009-11-30 2010-11-17 英业达股份有限公司 Multilayer printed circuit board structure for testing impedance value of high-speed signal line
CN102331527A (en) * 2010-07-12 2012-01-25 英业达股份有限公司 Method for automatically detecting impedance characteristic in printed circuit board

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