CN105657421B - 8x8 residual error coefficients block coding method and system - Google Patents
8x8 residual error coefficients block coding method and system Download PDFInfo
- Publication number
- CN105657421B CN105657421B CN201610027150.0A CN201610027150A CN105657421B CN 105657421 B CN105657421 B CN 105657421B CN 201610027150 A CN201610027150 A CN 201610027150A CN 105657421 B CN105657421 B CN 105657421B
- Authority
- CN
- China
- Prior art keywords
- residual error
- module
- fifo module
- coeff
- zero
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/13—Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/43—Hardware specially adapted for motion estimation or compensation
- H04N19/433—Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/48—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using compressed domain processing techniques other than decoding, e.g. modification of transform coefficients, variable length coding [VLC] data or run-length data
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Error Detection And Correction (AREA)
Abstract
8x8 residual error coefficients block coding method provided by the invention and system, this method include pre-treatment step, are pre-processed to 8x8 residual error coefficient blocks；Storing step accesses 8x8 residual error coefficient blocks；Coding step carries out CABAC codings to syntactic element；Wherein, pre-treatment step includes that parameter calculates step, and parameter calculates the 4x4 residual error coefficient block numbers LUMA_4x4_NUM that the last one non-zero residual error coefficient position LAST_NZ_PST and 8x8 the residual error coefficient block for non-zero residual error coefficient number NOT_ZERO_NUM, the 8x8 residual error coefficient block that step includes determining 8x8 residual error coefficients block can divide；Storing step includes access control step, and access control step controls two fifo modules to 4x4 residual error coefficients block into line access, and fifo module determines time/number that accessing operation is carried out to 4x4 residual error coefficient blocks according to NOT_ZERO_NUM.The system is the system using the above method, and the coding mode of coding method of the invention compatible 4x4 residual error coefficient blocks on the basis of not increasing data buffer storage unit makes the percentage of circuit utilization higher of H.264 residual error coefficient CABAC codings, circuit area smaller.
Description
Technical field
The invention belongs to field of video encoding, and in particular to a kind of H.264 High profile 8x8 residual error coefficient blocks
The method and its hardware implementing architecture of CABAC codings.
Background technology
High Profile are H.264 state-of-the-art standards in series standard, increase 8x8 intra predictions, self-defined amount
Change and the technology contents such as lossless video encoding, real-time and fluency to realize video conference provide strong branch
It holds.Wherein self-defined quantization introduces the 8x8 pixel dividing modes for changing less image for details, compares H.264 its
For his standard, the code check needed for the video of same clarity is lower, is conducive to the promotion of Video Frequency Conference Quality.8x8 block of pixels
It is related to the CABAC codings of 8x8 residual error coefficient blocks, has corresponding software processing mode, but its in the C++ codes that official increases income at present
Processing mode and the processing mode of 4x4 residual error coefficient blocks do not share.Residual error coefficient in non-H.264 High Profile versions
Block resolves into 4x4 residual error coefficient blocks and is handled, and the CABAC for not including 8x8 residual error coefficient blocks is encoded.It is proposed by the present invention
The CABAC coding methods of 8x8 residual error coefficient blocks and its hardware structure are different from the processing mode for the C++ codes that official increases income, and are
For hardware realization and the implementation method and framework of compatible original 4x4 residual error coefficient blocks CABAC codings.
Invention content
The main object of the present invention is to provide a kind of 8x8 residual error coefficient block coding methods of compatible 4x4 residual error coefficients block.
It is a further object of the present invention to provide a kind of 8x8 residual error coefficient block coding systems of compatible 4x4 residual error coefficients block.
For the main purpose for realizing above-mentioned, 8x8 residual error coefficients coding method provided by the invention includes pre-processing successively
Step pre-processes 8x8 residual error coefficient blocks；Storing step accesses 8x8 residual error coefficient blocks；Coding step, to syntactic element
Carry out CABAC codings；Wherein, pre-treatment step includes that parameter calculates step, and it includes determining 8x8 residual error coefficients that parameter, which calculates step,
The non-zero residual error coefficient number NOT_ZERO_NUM of block, the last one the non-zero residual error coefficient position for determining 8x8 residual error coefficient blocks
LAST_NZ_PST and determine the number LUMA_4x4_NUM that 4x4 residual error coefficient blocks can be divided into 8x8 residual error coefficient blocks；It deposits
Storage step includes access control step, and access control step controls two fifo modules to 4x4 residual error coefficients block into line access,
Fifo module according to non-zero residual error coefficient number NOT_ZERO_NUM determine to 4x4 residual error coefficient blocks carry out accessing operation when
Between/number.
By said program as it can be seen that the coding method of the present invention is returned by the 4x4 residual error coefficient blocks to 8x8 residual error coefficient blocks
Class can be compatible with the cataloged procedure of 4x4 residual error coefficient blocks, need not increase the list that special circuit carries out 8x8 residual error coefficient blocks
Solely coding, circuit area are small；Residual error coefficient, which is encoded, to be carried out with residual error coefficient processing using the mode of table tennis, and the two is not interfere with each other,
Coding rate is fast.
One Preferable scheme is that, fifo module include the first fifo module and the second fifo module, the first fifo module
And second access 4x4 residual error coefficient blocks between fifo module by the way of table tennis.
Therefore memory module includes the first fifo module and the second fifo module of two 16x16 bits, uses two
The purpose of a fifo module is to ensure that residual error system for the alternately access of 4x4 residual error coefficients block by the way of table tennis
It is carried out while number encoder is stored with residual error coefficient, improves the speed of residual error coefficient coding.
One Preferable scheme is that, execute processing step before executing storing step, processing step includes that will be stored in SRAM
In 8x8 residual error coefficient blocks disassemble at syntactic element, syntactic element includes significant_coeff_flag, last_
Significant_coeff_flag, coeff_sign_flag and coeff_abs_level_minus1.
Therefore SRAM stores the residual error coefficient of entire macro block, wherein the residual error coefficient stored is after being disassembled, with language
Method element coeff_abs_level_minus1 is stored with the mode that coeff_sign_flag phases merge to the first fifo module
And/or second in fifo module, for syntactic element coeff_abs_level_minus1 and/or coeff_sign_flag into
It is used when row CABAC codings.
One Preferable scheme is that, coding step include the first coding step and the second coding step,
First coding step includes to syntactic element significant_coeff_flag and/or syntactic element last_
Significant_coeff_flag carries out CABAC codings；Second coding module includes to syntactic element coeff_abs_
Level_minus1 and/or syntactic element coeff_sign_flag carry out CABAC codings.
Therefore that syntactic element coding progress is significant_coeff_flag, last_significant_
The CABAC arithmetic codings of coeff_flag, coeff_abs_level_minus1 and coeff_sign_flag operate, with shape
At final code stream.
One Preferable scheme is that, the first coding step further include to fifo module carry out write operation, the second coding step
Further include that write operation and/or read operation are carried out to fifo module.
Therefore in syntactic element significant_coeff_flag and last_significant_coeff_
Flag coding stages and in syntactic element coeff_abs_level_minus1 and coeff_sign_flag coding stage,
According to NOT_ZERO_NUM（NOT_ZERO_NUM non-zeros）Numerical value determination the first fifo module and the second fifo module are write
Operation；To the read operation of the first fifo module and the second fifo module occur over just coeff_abs_level_minus1 and
During the coding of coeff_sign_flag.
In order to realize that another object of the present invention, the preprocessing module provided by the invention are used for 8x8 residual errors system
Several piece is pre-processed, and memory module is used to carry out CABAC to syntactic element for accessing 8x8 residual error coefficient blocks, coding module
Coding, wherein preprocessing module includes parameter calculating module, and parameter calculating module is used to determine the non-zero of 8x8 residual error coefficient blocks
Residual error coefficient number NOT_ZERO_NUM, the last one the non-zero residual error coefficient position LAST_NZ_ for determining 8x8 residual error coefficient blocks
The 4x4 residual error coefficient block numbers LUMA_4x4_NUM that PST and determining 8x8 residual error coefficients block can divide；Memory module includes depositing
Control module, access control module is taken to control two fifo modules and carry out storage operation, fifo module root to 4x4 residual error coefficients block
Time/number that accessing operation is carried out to 4x4 residual error coefficient blocks is determined according to NOT_ZERO_NUM.
By said program as it can be seen that the NOT_ZERO_NUM of preprocessing module is written fifo module and/or reads to determine
The number taken, LAST_NZ_PST auxiliary instruction syntactic elements significant_coeff_flag and/or last_
End-of-encode moment when significant_coeff_flag is encoded, SIG_VAL correspond to each in 8x8 residual error coefficient blocks and compile
The actual value of the syntactic element significant_coeff_flag of code, when LUMA_4X4_NUM is encoded for residual error coefficient,
To the statistics of the 4x4 residual error coefficient blocks of division, and compare at the time of determine the last one 4x4 residual error coefficient block coding, has
Help the judgement to 8x8 residual error coefficient block coding finish times.
Description of the drawings
Fig. 1 is the work flow diagram of 8x8 residual error coefficients block coding method embodiment of the present invention.
Fig. 2 is the structure diagram of 8x8 residual error coefficients block coding system embodiment of the present invention.
Fig. 3 is in the second coding step in 8x8 residual error coefficients block coding method embodiment of the present invention when 32< NOT_
The read-write schematic diagram of fifo module when ZERO_NUM≤48.
Fig. 4 is in the second coding step in 8x8 residual error coefficients block coding method embodiment of the present invention when 48< NOT_
The read-write schematic diagram of fifo module when ZERO_NUM≤64.
The invention will be further described with reference to the accompanying drawings and embodiments.
Specific implementation mode
Referring to Fig. 1, Fig. 1 is 8x8 residual error coefficients block coding flow chart of the present invention, and residual error coefficient pre-treatment step is first carried out
S1 pre-processes residual error coefficient, then executes processing step S2, at syntactic element, then 8x8 residual error coefficient blocks are disassembled
It is performed simultaneously residual error coefficient storing step S3 and residual error coefficient coding step S4, is started to the storage of residual error coefficient and to residual error
The syntactic element coding of coefficient dismantling, step S5 is executed after executing step S4, is judged whether to need to store residual error coefficient, is to return
Step S3 is returned, is recycled, otherwise end-of-encode.
Wherein, residual error coefficient pre-treatment step S1 is specifically included to non-zero residual error coefficient number in 8x8 residual error coefficient blocks
The operations such as label of statistics, non-zero residual error coefficient, in order to carry out syntactic element significant_coeff_flag,
Last_significant_coeff_flag provides its corresponding numerical value when encoding, and removes the residual error coefficient to being stored in SRAM from
Multiple reading.Meanwhile according to the residual error coefficient number of statistics, for during residual error coefficient syntactic element encodes to residual error
The access of coefficient provides control reference.
It is the residual error coefficient number that is provided according to residual error coefficient pre-treatment step S1, non-in residual error coefficient coding step S4
The parameters such as zero residual error coefficient position are realized to residual error coefficient coeff_abs_level_minus1 and/or coeff_sign_flag
Access.Residual error coefficient coding includes to syntactic element significant_coeff_flag, last_significant_
The coding of coeff_flag, coeff_abs_level_minus1 and coeff_sign_flag.
The coding of syntactic element significant_coeff_flag and/or last_significant_coeff_flag
The storage to residual error coefficient is only related in the process, and the residual error coefficient during which stored is up to 32.The reading of residual error coefficient exists
Occur in the cataloged procedure of coeff_abs_level_minus1 and/or coeff_sign_flag, if the non-zero of residual error coefficient block
The number of residual error coefficient is more than 32, during which can also trigger the storage operation to residual error coefficient.
It is the structure diagram of 8x8 residual error coefficient block coding systems referring to Fig. 2, Fig. 2,8x8 residual error coefficient blocks of the invention are compiled
Code system includes preprocessing module 1, SRAM2, memory module 3, coding module 4 and processing module 5.Preprocessing module 1 includes
Parameter calculating module 11 and residual error coefficient preparation module 12；Memory module 3 includes access control module 31, the first fifo module 32
And second fifo module 33；Coding module 4 includes the first coding module 41 and the second coding module 42.
For preprocessing module 1 for being pre-processed to 8x8 residual error coefficient blocks, preprocessing module 1 includes parameter calculating module
11 and residual error coefficient preparation module 12, residual error coefficient preparation module 12 is used to cache the partial data of current 8x8 residual error coefficients block,
Play the role of transmitting the 8x8 residual error coefficients being stored in SRAM2 to processing module 5, parameter calculating module 11 is used for basis and works as
The numeric distribution of preceding 8x8 residual error coefficients block determines non-zero residual error coefficient number（It is indicated using NOT_ZERO_NUM）, determine 8x8
The position of the last one non-zero residual error coefficient in residual error coefficient block（It is indicated using LAST_NZ_PST）, determine current 8x8 residual errors system
The non-zero residual error coefficient distribution overview of several piece（It is indicated using SIG_VAL）And it can be divided in determining current 8x8 residual error coefficients block
For the 4x4 residual error coefficient block numbers of 4x4 blocks processing（LUMA_4X4_NUM）.Wherein, NOT_ZERO_NUM to determine to storage
The number of write-in and/or the reading of first fifo module 32 and the second fifo module 33 in module 3, LAST_NZ_PST auxiliary refer to
Show end-of-encode when syntactic element significant_coeff_flag, last_significant_coeff_flag coding
Moment, SIG_VAL correspond to the true of the syntactic element significant_coeff_flag that each in 8x8 residual error coefficient blocks encodes
Real number value, LUMA_4X4_NUM is for when encoding, to the statistics of the 4x4 residual error coefficient blocks of division, comparing and determining the last one
At the time of 4x4 residual error coefficient block codings, contribute to the judgement terminated to 8x8 residual error coefficient block codings.
For the effective 4x4 residual error coefficients block for including in 8x8 residual error coefficient blocks, the present invention according to NOT_ZERO_NUM and
The value range and size of LUMA_4X4_NUM is, it is specified that there is following five kinds of situations：
Situation one：NOT_ZERO_NUM=0, LUMA_4X4_NUM=0, the 8x8 residual error coefficient blocks are without effective
4x4 residual error coefficient blocks（Effectively indicate non-zero residual error coefficient）；
Situation two：0 <NOT_ZERO_NUM≤16, LUMA_4X4_NUM=1 are equivalent to the 8x8 residual error coefficient blocks
Including an effective 4x4 residual error coefficient block；
Situation three：16 <NOT_ZERO_NUM≤32, LUMA_4X4_NUM=2 are equivalent to the 8x8 residual error coefficient blocks
Including two effective 4x4 residual error coefficient blocks；
Situation four：32 <NOT_ZERO_NUM≤48, LUMA_4X4_NUM=3 are equivalent to the 8x8 residual error coefficient blocks
Including three effective 4x4 residual error coefficient blocks；
Situation five：48 <NOT_ZERO_NUM≤64, LUMA_4X4_NUM=4 are equivalent to the 8x8 residual error coefficient blocks
Including four effective 4x4 residual error coefficient blocks.
SRAM2 is used to store the residual error coefficient of entire macro block, wherein the 8x8 residual error coefficients stored residual error coefficient warp in the block
It crosses after processing module 5 disassembles, the side that is merged with coeff_sign_flag phases with syntactic element coeff_abs_level_minus1
Formula is stored into the first fifo module 32 and/or the second fifo module 33, for syntactic element coeff_abs_level_
Minus1 and coeff_sign_flag used when CABAC codings.
Memory module 3 includes the first fifo module 32 and second of access control module 31 and two 16x16 bits
Fifo module 33, access control module 31 control the first fifo module 32 and the second fifo module 33 to 4x4 residual error coefficient blocks
Carry out storage operation and/or read operation, the purpose using two fifo modules be in order to using by the way of rattling alternately into
The access of row 4x4 residual error coefficient blocks ensure that residual error coefficient coding is carried out at the same time with residual error coefficient storage, improve residual error coefficient
The speed of coding.
Coding module 4 is used to carry out CABAC codings to syntactic element, and coding module 4 includes the first coding module 41 and the
Two coding modules 42, the first coding module 41 are used for syntactic element significant_coeff_flag and/or syntactic element
Last_significant_coeff_flag carries out CABAC codings；Second coding module is used for syntactic element coeff_abs_
Level_minus1 and/or syntactic element coeff_sign_flag carry out CABAC codings.
The storage moment of first fifo module 32 and/or the second fifo module 33 depends on NOT_ in preprocessing module 1
The size of ZERO_NUM has following several situations：If 1,0<NOT_ZERO_NUM≤32, then only in syntactic element
Significant_coeff_flag, last_significant_coeff_flag carry out the first fifo module 32 during encoding
And/or second fifo module 33 4x4 residual error coefficient blocks storage；If 2,32<NOT_ZERO_NUM≤64, then in grammer member
Plain significant_coeff_flag, last_significant_coeff_flag, coeff_abs_level_minus1,
It is both needed to carry out the 4x4 residual errors system of the first fifo module 32 and/or the second fifo module 33 during the coding of coeff_sign_flag
The storage of several piece；If 3, NOT_ZERO_NUM=0, do not occur to the first fifo module 32 and/or the second fifo module 33
The storage of 4x4 residual error coefficient blocks；Meanwhile to the 4x4 residual error coefficient blocks of the first fifo module 32 and/or the second fifo module 33
During reading the coding for occurring over just syntactic element coeff_abs_level_minus1, coeff_sign_flag, the purpose is to
The numerical value for providing true coeff_abs_level_minus1, coeff_sign_flag carries out CABAC codings for it.
The table tennis read-write operation of first fifo module 32 and/or the second fifo module 33 is described as follows：
First, in the first coding step, i.e., in syntactic element significant_coeff_flag, last_
Significant_coeff_flag coding stages, according to the NOT_ZERO_NUM in parameter calculating module 11（NOT_ZERO_
NUM non-zeros）Numerical value determine to the read-write situation of the first fifo module 32 and/or the second fifo module 33：
a）Work as NOT_ZERO_NUM<When 16, the non-zero residual error coefficient in residual error coefficient is converted into Chinese idiom by inverse scan direction
The first fifo module 32 is written after method element coeff_abs_level_minus1 and/or coeff_sign_flag.
b）As 16≤NOT_ZERO_NUM<When 32, first 16 treated residual error coefficients are written by the direction of inverse scan
First fifo module 32, remaining residual error coefficient are written after processing in the second fifo module 33.
c）Work as NOT_ZERO_NUM>When 32, by the direction of inverse scan respectively toward the first fifo module 32 and/or the 2nd FIFO
16 residual error coefficients after processing are written in module 33, meanwhile, record the position for the non-zero residual error coefficient not being written（With
LAST_32_PST is indicated）With number（It is indicated with LEFT_NUM）, in coeff_abs_level_minus1, coeff_sign_
Again corresponding first fifo module, 32 and/or second fifo module is written in remaining non-zero residual error coefficient by flag coding stages
33。
Then, in the second coding step, i.e., in syntactic element coeff_abs_level_minus1, coeff_sign_
Flag coding stages, according to the NOT_ZERO_NUM in parameter calculating module 11（NOT_ZERO_NUM non-zeros）Numerical value determine pair
The read-write situation of first fifo module 32 and/or the second fifo module 33：
A) work as NOT_ZERO_NUM<When 16, syntactic element coeff_abs_level_minus1 and/or coeff_sign_
The residual error coefficient that flag codings are directly read when starting one by one in the first fifo module 32 carries out CABAC codings, this stage is not required to
Carry out the write operation of the first fifo module 32 and/or the second fifo module 33.
b）As 16≤NOT_ZERO_NUM<When 32, it is successively read in the first fifo module 32 and/or the second fifo module 33
The data of storage carry out the coding of syntactic element coeff_abs_level_minus1 and/or coeff_sign_flag, this stage
It need not carry out the write operation of the first fifo module 32 and/or the second fifo module 33.
c）When 32<When NOT_ZERO_NUM≤48, as shown in figure 3, first carry out storing in the first fifo module 32
The reading of 16 data uses for coding, the reading of data in the second fifo module 33 is then carried out, in the second fifo module
LEFT_NUM during 33 digital independents to not being written before the write-in of the first fifo module 32（LEFT_NUM≤16, it is remaining
Quantity）A treated residual error coefficient is read after having read the data in the second fifo module 33 in the first fifo module 32
Data continue syntactic element coeff_abs_level_minus1 and/or coeff_sign_flag CABAC coding.
d）When 48<When NOT_ZERO_NUM≤64, the read-write feelings of the first fifo module 32 and the second fifo module 33
Condition is carried out according to process shown in Fig. 4, is first carried out the reading of 16 data stored in the first fifo module 32 and is used for encoding,
Then the reading for carrying out 16 data stored in the second fifo module 33, during the second fifo module 33 reads data
To 16 treated residual error coefficients not being written before the write-in of the first fifo module 32, read in the second fifo module 33
Data after read data in the first fifo module 32, couple the 2nd FIFO during the first fifo module 32 reads data
The LEFT_NUM not being written before the write-in of module 33（LEFT_NUM≤16, volume residual）A treated residual error coefficient is read
It takes the data read in the second fifo module 33 after the data in the first fifo module 32 and continues syntactic element coeff_
The CABAC of abs_level_minus1, coeff_sign_flag are encoded.
The process respectively needs to carry out the data write operation of first fifo module 32 and the second fifo module 33, purpose
It is that the first fifo module 32 and/or the second fifo module 33 is written into all non-zero residual error coefficients, to guarantee to use
All coeff_abs_level_minus1, coeff_sign_flag carry out CABAC codings.
Therefore it is residual can be compatible with 4x4 by the 4x4 blocks classification to 8x8 residual error coefficient blocks for coding method of the invention
The cataloged procedure of poor coefficient block need not increase special circuit and carry out the separately encoded of 8x8 residual error coefficient blocks, to circuit face
Product is small, and carries out residual error coefficient coding using the mode of table tennis and accessed with residual error coefficient, and the two is not interfere with each other, coding rate
Soon.
Claims (4)
1.8x8 residual error coefficient block coding methods, this method include：
Pre-treatment step pre-processes 8x8 residual error coefficient blocks；
Processing step disassembles the 8x8 residual error coefficients block of storage in sram at multiple syntactic elements, institute's syntax elements
Including significant_coeff_flag, coeff_sign_flag, last_significant_coeff_flag and
coeff_abs_level_minus1；
Storing step accesses the 8x8 residual error coefficients block；
Coding step carries out CABAC codings to institute's syntax elements；
It is characterized in that：
The pre-treatment step includes that parameter calculates step and residual error parameter preparation process, and it includes true that the parameter, which calculates step,
The non-zero residual error coefficient number NOT_ZERO_NUM of the fixed 8x8 residual error coefficients block, the last of the 8x8 residual error coefficients block is determined
One non-zero residual error coefficient position LAST_NZ_PST, determine that the non-zero residual error coefficient distribution of presently described 8x8 residual error coefficients block is general
The 4x4 residual error coefficient block numbers LUMA_4x4_NUM that condition SIG_VAL and the determining 8x8 residual error coefficients block can divide；It is described
Residual error parameter preparation process includes the partial data for caching current 8x8 residual error coefficients block；
The storing step includes access control step, and it is residual to the 4x4 that the access control step controls two fifo modules
Poor coefficient block is determined according to the non-zero residual error coefficient number NOT_ZERO_NUM to described into line access, the fifo module
4x4 residual error coefficient blocks carry out time/number of accessing operation, and two fifo modules are the first fifo module and second respectively
Fifo module accesses the 4x4 residual errors between first fifo module and second fifo module by the way of table tennis
Coefficient block；
The coding step includes the first coding step and the second coding step；
First coding step includes to institute syntax elements significant_coeff_flag and/or institute's syntax elements
Last_significant_coeff_flag carries out CABAC codings；
Second coding step includes to institute syntax elements coeff_abs_level_minus1 and/or institute's syntax elements
Coeff_sign_flag carries out CABAC codings；
After coding step, judges whether to need to store residual error coefficient, the storing step is executed if so, then returning.
2. 8x8 residual error coefficients block coding method according to claim 1, it is characterised in that：
First coding step further includes carrying out write operation to the fifo module, including calculate in step according to the parameter
The numerical value of NOT_ZERO_NUM determine to the read-write situation of first fifo module and/or second fifo module：
Work as NOT_ZERO_NUM<When 16, the non-zero residual error coefficient in residual error coefficient is converted into syntactic element by inverse scan direction
The first fifo module is written after coeff_abs_level_minus1 and/or coeff_sign_flag；
As 16≤NOT_ZERO_NUM<When 32, by the direction of inverse scan by first 16 treated residual error coefficient write-ins described the
One fifo module, remaining residual error coefficient are written after processing in second fifo module；
Work as NOT_ZERO_NUM>When 32, by the direction of inverse scan respectively toward first fifo module and/or the 2nd FIFO
16 residual error coefficients after processing are written in module, record position and the number of the non-zero residual error coefficient not being written,
Remaining non-zero residual error coefficient is written corresponds to again by coeff_abs_level_minus1, coeff_sign_flag coding stage
The first fifo module and/or the second fifo module；
Second coding step further includes carrying out write operation and/or read operation to the fifo module, including according to the ginseng
The numerical value that number calculates the NOT_ZERO_NUM in steps are determined to first fifo module and/or second fifo module
Read and write situation：
Work as NOT_ZERO_NUM<When 16, syntactic element coeff_abs_level_minus1 and/or coeff_sign_flag are compiled
Code directly reads residual error coefficient in first fifo module and carries out CABAC codings one by one when starting, and without described the
The write operation of one fifo module and/or second fifo module；
As 16≤NOT_ZERO_NUM<When 32, it is successively read in first fifo module and/or second fifo module and deposits
The coding of data progress the syntactic element coeff_abs_level_minus1 and/or coeff_sign_flag of storage, and without
The write operation of first fifo module and/or second fifo module；
When 32<When NOT_ZERO_NUM≤48, the reading of 16 data stored in first fifo module is first carried out
So that coding uses, the reading of data in second fifo module is then carried out, in the second fifo module digital independent
During to the LEFT_NUM that is not written treated residual error coefficients before first fifo module write-in, read
The data read after data in second fifo module in first fifo module continue syntactic element coeff_
The CABAC of abs_level_minus1 and/or coeff_sign_flag is encoded；
When 48<When NOT_ZERO_NUM≤64, the reading of 16 data stored in first fifo module is first carried out
So that coding uses, the reading of 16 data stored in second fifo module is then carried out, in the 2nd FIFO moulds
16 treated residual error coefficients that first fifo module write-in is not written during reading data before for block, read
The data read after the data in second fifo module in first fifo module are taken, in first fifo module
The LEFT_NUM treated residual error systems that second fifo module write-in is not written before during reading data
Number has read the data read in second fifo module after the data in first fifo module and has continued grammer member
The CABAC of plain coeff_abs_level_minus1, coeff_sign_flag are encoded.
3.8x8 residual error coefficient block coding systems, including preprocessing module, memory module and coding module；
The preprocessing module is for pre-processing 8x8 residual error coefficient blocks；
SRAM, for storing 8x8 residual error coefficients；
Processing module, the 8x8 residual error coefficients block for that will be stored in the SRAM is disassembled into multiple syntactic elements, described
Syntactic element includes significant_coeff_flag, coeff_sign_flag, last_significant_coeff_
Flag and coeff_abs_level_minus1；
The memory module is for accessing the 8x8 residual error coefficients block；
The coding module is used to carry out CABAC codings to institute's syntax elements；
It is characterized in that：
The preprocessing module includes parameter calculating module and residual error parameter preparation module, and the parameter calculating module is for true
The non-zero residual error coefficient number NOT_ZERO_NUM of the fixed 8x8 residual error coefficients block, the last of the 8x8 residual error coefficients block is determined
One non-zero residual error coefficient position LAST_NZ_PST, determine that the non-zero residual error coefficient distribution of presently described 8x8 residual error coefficients block is general
The condition SIG_VAL and number LUMA_4x4_NUM for determining the 4x4 residual error coefficient blocks that the 8x8 residual error coefficients block can divide；Institute
State partial data of the residual error parameter preparation module for caching current 8x8 residual error coefficients block；
The memory module includes access control module and two fifo modules, and the access control module controls described in two
Fifo module carries out storage operation to the 4x4 residual error coefficients block, and the fifo module is determined according to the NOT_ZERO_NUM
Time/number of accessing operation is carried out to the 4x4 residual error coefficients block, two fifo modules are the first fifo module respectively
With the second fifo module, accessed by the way of table tennis between first fifo module and second fifo module described
4x4 residual error coefficient blocks；
The coding module includes the first coding module and the second coding module；
First coding module is used for institute syntax elements significant_coeff_flag and/or institute's syntax elements
Last_significant_coeff_flag carries out CABAC codings；
Second coding module is used for institute syntax elements coeff_abs_level_minus1 and/or institute's syntax elements
Coeff_sign_flag carries out CABAC codings.
4. 8x8 residual error coefficients block coding system according to claim 3, it is characterised in that：
First coding module is used to carry out write operation to the fifo module；Specifically for according to the parameter calculating module
In the numerical value of NOT_ZERO_NUM determine to the read-write situation of first fifo module and/or second fifo module：
Work as NOT_ZERO_NUM<When 16, the non-zero residual error coefficient in residual error coefficient is converted into syntactic element by inverse scan direction
The first fifo module is written after coeff_abs_level_minus1 and/or coeff_sign_flag；
As 16≤NOT_ZERO_NUM<When 32, by the direction of inverse scan by first 16 treated residual error coefficient write-ins described the
One fifo module, remaining residual error coefficient are written after processing in second fifo module；
Work as NOT_ZERO_NUM>When 32, by the direction of inverse scan respectively toward first fifo module and/or the 2nd FIFO
16 residual error coefficients after processing are written in module, record position and the number of the non-zero residual error coefficient not being written,
Remaining non-zero residual error coefficient is written corresponds to again by coeff_abs_level_minus1, coeff_sign_flag coding stage
The first fifo module and/or the second fifo module；
Second coding module is used to carry out write operation and/or read operation to the fifo module, is specifically used for according to
The numerical value of NOT_ZERO_NUM in parameter calculating module is determined to first fifo module and/or second fifo module
Read-write situation：
Work as NOT_ZERO_NUM<When 16, syntactic element coeff_abs_level_minus1 and/or coeff_sign_flag are compiled
Code directly reads residual error coefficient in first fifo module and carries out CABAC codings one by one when starting, and without described the
The write operation of one fifo module and/or second fifo module；
As 16≤NOT_ZERO_NUM<When 32, it is successively read in first fifo module and/or second fifo module and deposits
The coding of data progress the syntactic element coeff_abs_level_minus1 and/or coeff_sign_flag of storage, and without
The write operation of first fifo module and/or second fifo module；
When 32<When NOT_ZERO_NUM≤48, the reading of 16 data stored in first fifo module is first carried out
So that coding uses, the reading of data in second fifo module is then carried out, in the second fifo module digital independent
During to the LEFT_NUM that is not written treated residual error coefficients before first fifo module write-in, read
The data read after data in second fifo module in first fifo module continue syntactic element coeff_
The CABAC of abs_level_minus1 and/or coeff_sign_flag is encoded；
When 48<When NOT_ZERO_NUM≤64, the reading of 16 data stored in first fifo module is first carried out
So that coding uses, the reading of 16 data stored in second fifo module is then carried out, in the 2nd FIFO moulds
16 treated residual error coefficients that first fifo module write-in is not written during reading data before for block, read
The data read after the data in second fifo module in first fifo module are taken, in first fifo module
The LEFT_NUM treated residual error systems that second fifo module write-in is not written before during reading data
Number has read the data read in second fifo module after the data in first fifo module and has continued grammer member
The CABAC of plain coeff_abs_level_minus1, coeff_sign_flag are encoded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610027150.0A CN105657421B (en) | 2016-01-15 | 2016-01-15 | 8x8 residual error coefficients block coding method and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610027150.0A CN105657421B (en) | 2016-01-15 | 2016-01-15 | 8x8 residual error coefficients block coding method and system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105657421A CN105657421A (en) | 2016-06-08 |
| CN105657421B true CN105657421B (en) | 2018-08-31 |
Family
ID=56486750
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610027150.0A Active CN105657421B (en) | 2016-01-15 | 2016-01-15 | 8x8 residual error coefficients block coding method and system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105657421B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107580224B (en) * | 2017-08-08 | 2019-11-22 | 西安理工大学 | A kind of adaptive scanning method towards HEVC entropy coding |
| CN111077822A (en) * | 2019-12-24 | 2020-04-28 | 中国航天时代电子有限公司 | Multi-channel programmable acquisition system based on software channel configuration item reconstruction |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101076114A (en) * | 2007-06-15 | 2007-11-21 | 上海富瀚微电子有限公司 | Self-adaptive context binary arithmetic encoder and encoding method |
| CN101198051A (en) * | 2006-12-07 | 2008-06-11 | 深圳艾科创新微电子有限公司 | Method and device for implementing entropy decoder based on H.264 |
| CN102186075A (en) * | 2011-04-28 | 2011-09-14 | 北京大学 | Entropy coder and realization method thereof |
| CN103826120A (en) * | 2014-03-18 | 2014-05-28 | 山东大学 | Code stream parser applicable to HEVC |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DK2476255T3 (en) * | 2009-09-10 | 2018-08-06 | Guangdong Oppo Mobile Telecommunications Corp Ltd | ACCELERATION TECHNIQUES FOR DISTORTION GRADE OPTIMIZED QUANTIZATION |
-
2016
- 2016-01-15 CN CN201610027150.0A patent/CN105657421B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101198051A (en) * | 2006-12-07 | 2008-06-11 | 深圳艾科创新微电子有限公司 | Method and device for implementing entropy decoder based on H.264 |
| CN101076114A (en) * | 2007-06-15 | 2007-11-21 | 上海富瀚微电子有限公司 | Self-adaptive context binary arithmetic encoder and encoding method |
| CN102186075A (en) * | 2011-04-28 | 2011-09-14 | 北京大学 | Entropy coder and realization method thereof |
| CN103826120A (en) * | 2014-03-18 | 2014-05-28 | 山东大学 | Code stream parser applicable to HEVC |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105657421A (en) | 2016-06-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7443318B2 (en) | High speed context memory implementation for H.264 | |
| US8902994B1 (en) | Deblocking filtering | |
| CN107846597A (en) | Data cache method and device for Video Decoder | |
| US7515761B2 (en) | Encoding device and method | |
| CN105812804B (en) | The method and device of optimum quantization value during a kind of determining RDOQ | |
| CN103947211B (en) | Produce the video coding apparatus and method of subregion bit stream | |
| US10771792B2 (en) | Encoding data arrays | |
| US12003732B2 (en) | Scene aware video content encoding | |
| Papadonikolakis et al. | Efficient high-performance ASIC implementation of JPEG-LS encoder | |
| WO2013156084A1 (en) | Method for processing an image | |
| CN107277505A (en) | The video decoder structures of AVS 2 based on HW/SW Partitioning | |
| CN110392256A (en) | Method, coding side, decoding end and the system coded and decoded | |
| CN105657421B (en) | 8x8 residual error coefficients block coding method and system | |
| US20180103251A1 (en) | Method for selecting prediction mode of intra prediction, video encoding device and image processing apparatus | |
| US7007031B2 (en) | Memory system for video decoding system | |
| CN112866695B (en) | Video encoder | |
| US10616585B2 (en) | Encoding data arrays | |
| US20080238731A1 (en) | Method and apparatus for debinarization of digital video data during decoding | |
| Luo et al. | Fast intra coding unit size decision for HEVC with GPU based keypoint detection | |
| Iverson et al. | Real-time H. 24-AVC codec on Intel architectures | |
| Jilani et al. | JPEG image compression using FPGA with Artificial Neural Networks | |
| US20190221006A1 (en) | Selecting encoding options | |
| Wang et al. | An efficient deep learning accelerator architecture for compressed video analysis | |
| CN100576917C (en) | The method and system of inversely scanning frequency efficiency | |
| CN106559674A (en) | JPEG high-speed decoding method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |