CN105632387B - Display device - Google Patents

Abstract

The present invention provides a kind of display device, operates during multiple displays, including multiple scan lines, multiple data lines, multiple sub-pixels and clock signal.In same scan line, these sub-pixels of each preset quantity belong to a pixel group.For each pixel group, during each display, the enabled status of multiple clock signals shares a specific quantity (X=2 × C (K, 2) multiple combinations), K is the preset quantity and is positive integer, C (K, 2) indicates all combined numbers that two clock signals are taken in K clock signal.Certain amount of multiple combinations include at least one first combination and are connected in one second combination of first combination.Enabled status sequence of the enabled status sequence of these clock signals of the second combination in contrast to these clock signals of the first combination.

Description

Display device

Technical field

The present invention relates to a kind of display device, in particular to a kind of display device can compensate for caused by clock signal Kickback voltage effect.

Background technique

Generally, due to which low temperature polycrystalline silicon (low temperature poly-silicon, LTPS) display panel has There is high electronics ionization rate, therefore LTPS panel has the advantages that fast response speed, high brightness, high-res and low power consumption.? In the driving method of LTPS display panel, time-division switching (also known as solution multiplexing (de-multiplexer, DEMUX)) can be used Method can thereby reduce the import and export pin of source electrode driver.For example, for using 1:3 solution multiplexing driving method and For LTPS display panel with high-res (such as 1080 × RGB × 120), each control clock signal will have 1080 The load of a switch.At this point, consumed power proportional is in C × V²× F, wherein C indicates parasitic capacitance, depends on switch Size (W × L)；V indicates the voltage swing of control clock signal；F then indicates the frequency of control clock signal.

According to the development trend of present electronic device, how to minimize consumption power and be important subject under discussion.For using For the electronic device of LTPS display panel, electricity can be further decreased by reducing power consumption caused by solution multiplexing method The total consumption of sub-device.According to above-mentioned, the power consumption of LTPS display panel can be reduced by reducing C, V, and/or F.? In current some technologies, proposes and disappear by the control clock signal frequency for reducing solution multiplexing driving method to reduce power Consumption.However, image on LTPS display panel will but be will lead to by switching caused Kickback voltage effect when using these means Color it is uneven.

Summary of the invention

Therefore, the present invention proposes a kind of display device, uses solution multiplexing driving method, not only can be reduced source electrode driver Import and export pin, and the color homogenization of image can be made.

The present invention provides a kind of display device, operates during multiple displays, including multiple scan lines, multiple data lines, Multiple sub-pixels and multiple clock signals.These data lines are staggered with these scan lines, and transmit multiple data letters Number.Each data-signal has multiple colouring informations.These pixel units couple these scan lines and these data lines.It is each Sub-pixel corresponds in these colouring informations one.These clock signals, which respectively correspond, couples these sub-pixels.In same scan line On, these sub-pixels of each preset quantity belong to a pixel group, and basis has these sub-pixels of each pixel group respectively The enabled status of multiple clock signals of preset quantity receives in these data-signals one.For coupling these identical numbers According to line and for being respectively coupled to two pixel groups of two adjacent scan lines, two pixel groups pass through in order it is corresponding this A little data lines receive one in these data, and be belonging respectively to two pixel groups and connected in timing receive it is corresponding this A bit as the two sub-pixels of signal receive in these colouring informations one.For each pixel group, during each display, The enabled status of these clock signals shares multiple combinations of a specific quantity (X), this specific quantity is X=2 × C (K, 2), K It for the preset quantity and is positive integer, C (K, 2) indicates for all combinations that two clock signals are taken in K clock signal Number.These certain amount of combinations include at least one first combination and one second combination for being connected in first combination.Second Enabled status sequence of the enabled status sequence of these clock signals of combination in contrast to these clock signals of the first combination.

It the present invention also provides a kind of display device, operates during multiple displays, including multiple scan lines, multiple data Line, multiple sub-pixels and multiple clock signals.These data lines are staggered with these scan lines, and transmit multiple data Signal.Each data-signal has multiple colouring informations.These pixel units couple these scan lines and these data lines.It is each Sub-pixel corresponds in these colouring informations one.These clock signals, which respectively correspond, couples these sub-pixels.In same scan line On, these sub-pixels of each preset quantity (K) belong to a pixel group, and these sub-pixels of each pixel group are respectively according to tool There is the enabled status of multiple clock signals of preset quantity to receive in these data-signals one.For couple it is identical these It data line and is respectively coupled to for two pixel groups of two adjacent scan lines, two pixel groups pass through corresponding in order These data lines receive one in these data, and be belonging respectively to two pixel groups and in timing connect receive it is corresponding The two sub-pixels of data-signal, which receive, has in these colouring informations one.For coupling these identical data lines and dividing For two pixel groups for not coupling two adjacent scan lines, during each display in, by the corresponding isochronon believe The number of Kickback voltage effect caused by number is identical.It is certain amount of during each display for each pixel group These combinations include at least one first combination and one second combination for being connected in the first combination, and these clocks of the second combination Enabled status sequence of the enabled status sequence of signal in contrast to these clock signals of the first combination.

To enable the above objects, features and advantages of the present invention to be clearer and more comprehensible, a preferred embodiment is cited below particularly, and match Attached drawing is closed, is described in detail below.

Detailed description of the invention

Fig. 1 shows display devices according to an embodiment of the invention.

Fig. 2 indicates switch unit according to an embodiment of the invention and pixel group.

Fig. 3 indicates switch unit circuit framework figure according to an embodiment of the invention.

Fig. 4 A~Fig. 4 F indicates an embodiment according to the present invention, multiple frames (also referred to as " picture frame ") during a display In period, the enabled status of clock signal is combined.

Fig. 5 indicates switch unit according to another embodiment of the present invention and pixel group.

Fig. 6 indicates switch unit circuit framework figure according to another embodiment of the present invention.

Fig. 7 A and Fig. 7 B indicate another embodiment according to the present invention, during multiple frames during a display in, clock letter Number enabled status combination.

【Symbol description】

1~display device；

10~array of display；

11~gate drivers；

12~source electrode driver；

13~switching circuit；

14~clock generator；

30 ... 32~switch；

60,61~switch；

100~sub-pixel；

100_1,1 ... 100_1,6,100_2,1 ... 100_2,6~sub-pixel；

130_1,130_2,130_3~switch unit；

CK1, CK2~clock signal；

CKR, CKG, CKB~clock signal；

DL1 ... DLm~data line；

PG1,1, PG1,2, PG2,1, PG2,2~pixel group；

PSL1, PSL2~data-signal timing；

S [1], S [2], S [3]~data-signal；

SL1 ... SLn~scan line.

Specific embodiment

To enable the above objects, features and advantages of the present invention to be clearer and more comprehensible, a preferred embodiment is cited below particularly, and match Attached drawing is closed, is described in detail below.

Fig. 1 is to indicate display device according to an embodiment of the invention.Refering to fig. 1, the operation of display device 1 is multiple continuous Display during, and including array of display 10, gate drivers 11, source electrode driver 12, switching circuit 13, clock generator 14, data line DL1~DLm and scan line SL1~SLn.Scan line SL1~SLn is sequentially configured, and every scan line along Horizontal direction extends.Data line DL1~DLn is sequentially configured, and each data line extends along vertical direction.Scan line SL1~ SLn is staggered with data line DL1~DLn, and an each group of staggered scan line sub-pixel corresponding with data line.Citing comes It says, staggered scan line SL1 and data line DL1 corresponding sub-pixel 100.According to scan line SL1~SLn, data line DL1~DLm, With the configuration relation of corresponding sub-pixel, multiple configurations of sub-pixel 100 are on multiple rows and multiple column, to form array of display 10.Gate drivers 11 couple scan line SL1~SLn, and are sequentially driven scan line SL1~SLn.The coupling of source electrode driver 12 is opened Powered-down road 13, and data-signal is transmitted to switching circuit 13.Switching circuit 13 couples data line DL1~DLm.Clock generator 14 Multiple clock signals are generated to switching circuit 13.So that switching circuit 13 passes through data line according to the enabled status of clock signal DL1~DLm transmits received data signal to corresponding sub-pixel 100.Switching circuit 13 has multiple switch unit.About The switch unit of switching circuit 13 will be hereinafter described.

In embodiments of the present invention, in the sub-pixel of coupling same scan line, the sub-pixel of every preset quantity (K) is returned Belong to/be divided into a pixel group.It will illustrate this Shen so that three sub-pixels (K=3) belong to a pixel group as an example below It please the operation of switching circuit 13.Referring to Fig.2, for scan line SL1, three sub-pixel 100_1 of head, 1,100_1,2 and 100_ 1,3 belongs to pixel group PG1, and 1；The three sub-pixel 100_1 connected, 4,100_1,5 and 100_1,6 belong to pixel group PG1,2；The ownership and so on of other sub-pixels.For scan line SL2, three sub-pixel 100_2 of head, 1,100_2, 2 and 100_2,3 belong to pixel group PG2, and 1；The three sub-pixel 100_2 connected, 4,100_2,5 and 100_2,6 belong to Pixel group PG2,2；The ownership and so on of other sub-pixels.In order to clearly illustrate the relationship between sub-pixel and pixel group, Fig. 2 only shows sub-pixel and pixel group on scan line SL1 and SL2.Sub-pixel and picture on other scan lines SL3~and SLn Relationship between plain group is omitted herein such as scan line SL1 and SL2.Referring to Fig.2, pixel group PG1,1 and PG2,1 are couplings Identical data line DL1~DL3 is met, and pixel group PG1,2 and PG2,2 are coupled to identical data line DL4~DL6.

In embodiments of the present invention, the quantity of switch unit is according to the pixel in same scan line in switching circuit 13 The quantity of group determines.Specifically, the quantity of switch unit is equal to according to the picture in same scan line in switching circuit 13 The quantity of element group.In this way, which the pixel group for coupling same scan line is respectively coupled to different switch units, and couple adjacent Two scan lines and two pixel groups of the identical data line of coupling are coupled to same switch unit.For example, scan line is coupled Pixel the group PG1,1 and PG1,2 of SL1 is respectively coupled to different switch unit 130_1 and 130_2, couples the pixel of scan line SL2 Group PG2,1 and PG2,2 are respectively coupled to different switch unit 130_1 and 130_2.On the other hand, pixel group PG1,1 and PG2,1 It is all to be controlled by same switch unit 130_1, and pixel group PG1,2 and PG2,2 are by same switch unit 130_2 It is controlled.

In the embodiment of fig. 2, three sub-pixels in each pixel group respectively correspond different information.For example, Three sub-pixels of each pixel group respectively correspond red (R), green (G) and blue (B) information, and in each pixel single group In, it respectively corresponds red (R), green (G), configured with specific pattern with the sub-pixel of blue (B) information.As shown in Fig. 2, Pixel group PG1,1, PG2,1, PG1,2 and PG2 in 2, respectively correspond red (R), green (G), the sub- picture with blue (B) information Element is sequentially to configure.

The driving of array of display 10 is using time-division switching (also known as solution multiplexing (de-multiplexer, DEMUX)) Driving method, therefore, the quantity of clock signal caused by clock generator 14 is according to the quantity (K) of sub-pixel in each pixel group To determine.In the embodiment in figure 1, the quantity of clock signal caused by clock generator 14 is equal to sub- picture in each pixel group The quantity of element determines, i.e., clock generator 14 generate three clock signal CKR, CKG, with CKB (K=3), to control each open Close unit.Fig. 3 indicates the circuit framework of each switch unit.Refering to Fig. 3, each switch unit include three switches 30,31 and 32, to realize 1:3 solution multiplexing driving method.Switch 30,31, with 32 grid receive respectively clock signal CKR, CKG, with CKB.Switch 30,31, the drain electrode coupling source electrode driver 12 with 32.Switch 30,31, with 32 source electrode be respectively coupled to corresponding number According to line.For example, for the switch of switch unit 13,0_1 30,31 and 32, grid receives clock signal respectively CKR, CKG and CKB, drain electrode coupling source electrode driver 12 is to receive data-signal S [1], and its source electrode is respectively coupled to data line DL1~DL3.Other switch units have framework identical with switch unit 130_1, therefore omit related description herein.When When clock signal is in enabled status, corresponding switch conduction, colouring information corresponding in data-signal is sent to pair The data line answered.For example, for switch unit 130_1, when clock signal CKR is in enabled status, switch 30 Conducting, corresponding red information in data-signal S [1] is sent to data line DL1；When clock signal CKG is in enable shape When state, switch 31 is connected, corresponding green information in data-signal S [1] is sent to data line DL2；As clock signal CKB When in enabled status, switch 32 is connected, corresponding blue information in data-signal S [1] is sent to data line DL3.Its Relationship between the operation and clock signal and colouring information of his switch unit is such as switch unit 130_1.

Display device 1 of the invention operates in during multiple displays.And in one embodiment, include during each display During multiple frame frames (" picture frame "), and the quantity during each display during frame depends on during the display for a picture The number of combinations (X) of the enabled status of the clock signal of element group.In another embodiment, for each pixel group, every During one display, the combination one of the enabled status of clock signal shares a combination (X=2 × C (K, 2)) of 2 × C (K, 2), In, K is the quantity (preset quantity) of sub-pixel and be positive integer in each pixel group, and C (K, 2) expression is in K clock signal Take all combined numbers of two clock signals.For the embodiment of the 2nd and 3 figures, for each pixel group, every During one display, the enabled status number of combinations of clock signal CKR, CKG and CKB are equal to 6 (X=6).Therefore, each display During period includes six frames, and for each pixel group, clock signal CKR, CKG, six enabled status groups with CKB It closes in during six frames during appearing in a display respectively.

Fig. 4 A~Fig. 4 F is illustrated respectively in during six frames during a display, clock signal CKR, CKG, with CKB Six enabled status combinations.Below will with pixel group PG1,1 and PG2,1, clock signal CKR, CKG, with CKB and corresponding Illustrate six enabled status combination of a clock signal during display for colouring information.In Fig. 4 A~Fig. 4 F, PSL1 indicates pixel group PG1, and 1 receives the timing of data-signal S [1], i.e., during the enable of PSL1, switch unit 103_1's Switch 30~32 is connected, pass through respectively by red in data-signal S [1], green, with blue information data line DL1, DL2, with DL3 is sent to sub-pixel 100_1,1,100_1,2 and 100_1, and 3.In Fig. 4 A~Fig. 4 F, PSL2 indicates pixel group PG2, and 1 connects The timing for receiving data-signal S [1], i.e., during the enable of PSL1, the switch 30~32 of switch unit 103_1 is connected, and will be counted It is believed that red in number S [1], green and blue information pass through data line DL1, DL2 respectively, are sent to sub-pixel 100_2 with DL3, 1,100_2,2 and 100_2,3.

Refering to Fig. 4 A, during first frame during a display in, during the enable of PSL1, clock signal CKR, CKB, it is in enabled status (for pixel group PG1, the first enabled status for 1 is combined) in order with CKG, and clock is believed Number CKR, CKB, it does not overlap each other with the enabled status of CKG.At this point, the red (R) of display signal S [1], blue (B) and green (G) information is successively provided to sub-pixel 100_1 respectively in time, 1,100_1,3 and 100_1, and 2.Refering to Fig. 4 B, one During second frame during display, during the enable of PSL1, it clock signal CKG, CKB, is in cause in order with CKR Energy state (for pixel group PG1, second of enabled status for 1 is combined), and clock signal CKG, CKB, the enable with CKR State does not overlap each other.At this point, showing the green (G) of signal S [1], blue (B) and red (R) information in time successively It is provided to sub-pixel 100_1 respectively, 2,100_1,3 and 100_1,1.Similarly, refering to Fig. 4 C~Fig. 4 F, in referring now to pixel Group PG1, for 1, during a display respectively third and fourth, five, with the during six frames (also referred to as " picture frame ") Three, it four, five, is combined with six kinds of enabled status.

Referring again to Fig. 4 A, during first frame during a display in, during the enable of PSL2, clock signal CKG, CKB, it is in order with CKR enabled status (for pixel group PG2, the first enabled status for 1 is combined), and when Clock signal CKG, CKB, it does not overlap each other with the enabled status of CKR.At this point, the green of display signal S [1], blue and red letter It ceases and is successively provided to sub-pixel 100_2 respectively in time, 2,100_2,3 and 100_2,1.Refering to Fig. 4 B, the phase is shown one During second interior frame, during the enable of PSL2, it clock signal CKR, CKB, is in enabled status in order with CKG (for pixel group PG2, the combination of second of enabled status) for 1, and clock signal CKR, CKB, with the enabled status of CKG that This is not overlapped.At this point, the red of display signal S [1], blue and green information are successively provided to sub- picture respectively in time Plain 100_2,1,100_2,3 and 100_2,2.Similarly, refering to Fig. 4 C~Fig. 4 F, in referring now to pixel group PG2, for 1, Respectively third and fourth during a display, five, with during six frames third and fourth, five, combine with six kinds of enabled status.

According to Fig. 4 A~Fig. 4 F it can be seen that, for pixel group PG1, for 1, during a display in, during the second frame Pattern (the enable sequence CKG- of the enabled status combination of clock signal>CLB->CKR) in contrast to clock signal during first frame Enabled status combination pattern (enable sequence CKR->CLB->CKG)；The enabled status group of clock signal during 4th frame Pattern (the enable sequence CKB- of conjunction>CLG->CKR) in contrast to the pattern of the enabled status combination of clock signal during third frame (enable sequence CKR->CLG->CKB)；Pattern (the enable sequence CKB- of the enabled status combination of clock signal during 6th frame >CLR->CKG) in contrast to pattern (the enable sequence CKG- of the enabled status combination of clock signal during the 5th frame>CLR-> CKB).Similarly, for pixel group PG2, for 1, during a display in, first and two clock signal during frame enable The pattern of combinations of states is opposite each other；The pattern that third is combined with the enabled status of clock signal during four frames is opposite each other； 5th pattern that combines with the enabled status of clock signal during six frames is opposite each other.

According to Fig. 4 A it can be seen that, one display during first frame during in, pixel group PG1,1 and PG2,1 in timing Receive data-signal S [1] in order.In other words, first by pixel group PG1,1 sub-pixel 100_1,1,100_1,3 and 100_ 1,2 receives red, blue and the green information of data-signal S [1] in order, then again by pixel group PG2,1 sub-pixel 100_2,2,100_2,3 and 100_2,1 receives green, blue and the red information of data-signal S [1] in order.Such one Come it can be seen that, the state of the clock signal CKG of corresponding green information is by during maintaining the enable to PSL2 during the enable of PSL1. Be, during the enable of PSL1 in, clock signal CKR and CKB respectively have a failing edge, and clock signal CKG does not have Failing edge.

Similarly, such as Fig. 4 B it is found that corresponding to the clock signal of red information in during the second frame during a display The state of CKR by PSL1 enable during maintain to PSL2 enable during.Be, during the enable of PSL1 in, clock letter Number CKG and CKB respectively has a failing edge, and clock signal CKR does not have failing edge.One display during third and fourth, Five, with six frames during in, clock signal CKR, CKG, with the failing edge state of CKB and so on, as shown in Fig. 4 C~Fig. 4 F.

According to above-described embodiment, during a display in six pixels during in, by clock signal CKR, CKG, with Six enabled status of CKB combine, so that being transmitted to pixel group PG1,1 red information is by caused by clock signal CKR Kickback voltage effect number, be identical to being transmitted to pixel group PG2,1 red information is drawn by clock signal CKR The number of the Kickback voltage effect risen.For pixel group PG1,1 and PG2,1, green and blue information are believed by scanning Number the case where be also the same.In this way, which display device 1 passes through six enable shapes of clock signal in during a display State combines to compensate voltage differences caused by above-mentioned Kickback voltage effect, in other words, by six causes of clock signal Energy state can reduce the degree difference of the same color in different pixels group, so that the image of display device 1 is more uniform.

In another embodiment, two sub-pixels (K=2), which belong to for a pixel group, illustrates that the application switchs electricity Road 13 operates.Refering to Fig. 5, for scan line SL1, first two sub-pixels 100_1,1 and 100_1,2 belong to pixel group PG1,1；The two sub-pixels 100_1,3 and 100_1,4 of connecting belong to pixel group PG1, and 2；The ownership of other sub-pixels with This analogizes.For scan line SL2, first two sub-pixels 100_2,1 and 100_2,2 belong to pixel group PG2, and 1；It connects Two sub-pixels 100_2,3 and 100_2,4 belong to pixel group PG2, and 2；The ownership and so on of other sub-pixels.In order to clear Chu illustrates the relationship between sub-pixel and pixel group, and Fig. 5 only shows sub-pixel and pixel group on scan line SL1 and SL2.At it Relationship on his scan line SL3~and SLn between sub-pixel and pixel group is omitted herein such as scan line SL1 and SL2. Refering to Fig. 5, pixel group PG1,1 and PG2,1 are coupled to identical data line DL1 and DL2, and pixel group PG1,2 and PG2,2 are couplings Meet identical data line DL3 and DL4.

Such as the embodiment of Fig. 2, in embodiments of the present invention, the quantity of switch unit is equal to basis and exists in switching circuit 13 The quantity of pixel group in same scan line.In this way, which the pixel group for coupling same scan line is respectively coupled to different open Unit is closed, and the two pixel groups for coupling adjacent two scan lines and the identical data line of coupling are coupled to same switch unit.Picture The plain group of configuration between switch unit omits narration such as the embodiment of Fig. 2 herein.

In the 5 embodiment of figure 5, the two sub-pixels in each pixel group respectively correspond different information.As shown in figure 5, In pixel group PG1,1 and PG2,1, respectively corresponds red (R) and green (G), is sequentially to match with the sub-pixel of blue (B) information It sets.In pixel group PG1,2 and PG2,2, respectively corresponding blue (B) and the sub-pixel of red (R) information is sequentially to configure.With one From the point of view of all pixels group in scan line, respectively correspond red (R), green (G), with the sub-pixel of blue (B) information be according to Sequence and configuration repeatedly.

Due to the driving of array of display 10 be using the time-division switching (also known as solution multiplexing (de-multiplexer, DEMUX driving method)), therefore, the quantity of clock signal caused by clock generator 14 is according to sub-pixel in each pixel group Quantity (K) determine.In the 5 embodiment of figure 5, the quantity of clock signal caused by clock generator 14 is equal to each picture Element organizes the quantity of interior sub-pixel to determine, i.e., clock generator 14 generates three clock signal CK1 and CK2 (K=2), with control Each switch unit.Fig. 6 indicates the circuit framework of each switch unit.Refering to Fig. 6, each switch unit includes two switches 60 With 61, to realize 1:2 solution multiplexing driving method.The grid of switch 60 and 61 receives clock signal CK1 and CK2 respectively.Switch 60 Drain electrode with 61 couples source electrode driver 12.The source electrode of switch 60 and 61 is respectively coupled to corresponding data line.For example, for For the switch 60 and 61 of switch unit 130_1, grid receives clock signal CK1 and CK2 respectively, and drain electrode coupling source electrode drives Device 12 is moved to receive data-signal S [1], and its source electrode is respectively coupled to data line DL1 and DL2.Other switch units have with The identical framework of switch unit 130_1, therefore related description is omitted herein.When clock signal is in enabled status, correspond to Switch conduction, colouring information corresponding in data-signal is sent to corresponding data line.For example, single for switch For first 130_1, when clock signal CK1 is in enabled status, switch 60 is connected, corresponding red in data-signal S [1] Color information is sent to data line DL1；When clock signal CK2 is in enabled status, switch 61 is connected, data-signal S [1] In corresponding green information be sent to data line DL2.For switch unit 130_2, when clock signal CK1 is in enable shape When state, switch 60 is connected, corresponding blue information in data-signal S [2] is sent to data line DL3；As clock signal CK2 When in enabled status, switch 61 is connected, corresponding red information in data-signal S [2] is sent to data line DL4.It is right For switch unit 130_3, when clock signal CK1 is in enabled status, switch 60 is connected, in data-signal S [3] Corresponding green information is sent to data line DL5；When clock signal CK2 is in enabled status, switch 61 is connected, data Corresponding blue information is sent to data line DL6 in signal S [3].In this embodiment, the operation of other switch units is with timely Relationship between clock signal and colouring information is such as switch unit 130_1~130_3.

In this embodiment, for each pixel group, during each display, the cause of clock signal CK1 and CK2 Energy combinations of states quantity is equal to 2 (X=2 × C (K, 2), wherein K=2).Therefore, during including two frames during each display, And for each pixel group, clock signal CK1 is combined respectively during appearing in a display with two enabled status of CK2 During two interior frames.

Fig. 7 A and Fig. 7 B are illustrated respectively in during two frames during a display, two causes of clock signal CK1 and CK2 It can combinations of states.Below will with pixel group PG1,1 and PG2,1, clock signal CK1 with for CK2 and corresponding colouring information To illustrate two enabled status combination of a clock signal during display.In Fig. 7 A and Fig. 7 B, PSL1 indicates pixel Group PG1,1 receives the timing of data-signal S [1], i.e., during the enable of PSL1, the switch 60 and 61 of switch unit 103_1 is led It is logical, the data line DL1 and DL2 that passes through respectively with green information red in data-signal S [1] is sent to sub-pixel 100_1,1 With 100_1,2.In Fig. 7 A and Fig. 7 B, PSL2 indicates pixel group PG2, and 1 receives the timing of data-signal S [1], i.e., PSL2's During enable, the switch 60 and 61 of switch unit 103_1 is connected, and red in data-signal S [1] is led to respectively with green information It crosses data line DL1 and DL2 is sent to sub-pixel 100_2,1 and 100_2,2.

Refering to Fig. 7 A, during first frame during a display in, during the enable of PSL1, clock signal CK1 It is in order with CK2 enabled status (for pixel group PG1, the first enabled status for 1 is combined), and clock signal The enabled status of CK1 and CK2 does not overlap each other.At this point, the red (R) of display signal S [1] and green (G) information are in time It is successively provided to sub-pixel 100_1,1 and 100_1,2 respectively.Refering to Fig. 7 B, during second frame during a display In, during the enable of PSL1, clock signal CK2 and CK1 are in enabled status (for pixel group PG1, for 1 in order Second of enabled status combination), and the enabled status of clock signal CK1 and CK2 do not overlap each other.At this point, display signal S [1] Green (G) and red (R) information be successively provided to sub-pixel 100_1,2 and 100_1,1 respectively in time.

Referring again to Fig. 7 A, during first frame during a display in, during the enable of PSL2, clock signal CK2 and CK1 is in enabled status (for pixel group PG2, the first enabled status for 1 is combined) in order, and clock is believed The enabled status of number CK1 and CK2 does not overlap each other.At this point, the green of display signal S [1] is successive in time with red information Ground is provided to sub-pixel 100_2,2 and 100_2,1 respectively.Refering to Fig. 7 B, during second frame during a display in, During the enable of PSL2, clock signal CK1 and CK2 be in order enabled status (for pixel group PG2, second for 1 Enabled status combination), and the enabled status of clock signal CK1 and CK2 do not overlap each other.At this point, the red of display signal S [1] Sub-pixel 100_2,1 and 100_2,2 are successively provided to respectively in time with green information.

According to Fig. 7 A and Fig. 7 B it can be seen that, for pixel group PG1, for 1, during a display in, during the second frame Pattern (the enable sequence CK2- of the enabled status combination of clock signal>CL1) in contrast to the cause of clock signal during first frame Pattern (the enable sequence CK1- of energy combinations of states>CL2).Similarly, for pixel group PG2, for 1, during a display in, First pattern that combines with the enabled status of clock signal during two frames is opposite each other.

According to Fig. 7 A it can be seen that, one display during first frame during in, pixel group PG1,1 and PG2,1 in timing Receive data-signal S [1] in order.In other words, first by pixel group PG1,1 sub-pixel 100_1,1 and 100_1,2 in order The red and green information for receiving data-signal S [1], then again by pixel group PG2,1 sub-pixel 100_2,2 and 100_2,1 The green and red information of data-signal S [1] are received in order.Thus it can be seen that, the state of clock signal CK2 is by PSL1 Enable during maintain to PSL2 enable during.Be, during the enable of PSL1 in, clock signal CK1 have one decline Edge, and clock signal CK2 does not have failing edge.

Similarly, such as Fig. 7 B it is found that the state of clock signal CK1 is by PSL1 in during the second frame during a display Enable during maintain to PSL2 enable during.Be, during the enable of PSL1 in, clock signal CK2 have one decline Edge, and clock signal CK1 does not have failing edge.

According to above-described embodiment, during a display in two pixels during in, pass through clock signal CK1 and CK2 Two enabled status combinations, so that being transmitted to pixel group PG1,1 green information is by recoil caused by clock signal CK2 The number of voltage effects is identical to being transmitted to pixel group PG2, and 1 green information is by anti-caused by clock signal CK2 Rush the number of voltage effects.For pixel group PG1,1 and PG2,1, red information is also by the case where scanning signal Equally.In this way, which display device 1 is compensated by two enabled status combination of clock signal in during a display Voltage differences caused by above-mentioned Kickback voltage effect can be reduced by two enabled status of clock signal in other words The degree difference of same color in different pixels group, so that the image of display device 1 is more uniform.

Though the present invention is disclosed as above with preferred embodiment, the range that however, it is not to limit the invention, art technology Personnel without departing from the spirit and scope of the present invention, when can do a little change and retouching, therefore protection scope of the present invention Subject to view the appended claims confining spectrum.

Claims (10)

1. a kind of display device operates during multiple displays, including：

Multiple scan lines；

Multiple data lines are staggered with the scan line, and transmit multiple data-signals, wherein each data-signal tool There are multiple colouring informations；And

Multiple sub-pixels, couple the scan line and the data line, and each sub-pixel corresponds in the colouring information one；

Multiple clock signals respectively correspond the coupling sub-pixel；

Wherein, in the same scan line, the sub-pixel of each preset quantity belongs to a pixel group, and each pixel group The sub-pixel data-signal is received according to the enabled status of the clock signal with the preset quantity respectively In one；

Wherein, for coupling the identical data line and being respectively coupled to two pictures of two adjacent scan lines For plain group, two pixel groups receive one in the data by the corresponding data line in order, Yi Jifen Do not belong to two pixel groups and connects two sub-pixels reception institutes for receiving the corresponding data-signal in timing One is stated in colouring information；

Wherein, for each pixel group, during each display, the enabled status of the clock signal has certain number Multiple combinations of amount, the specific quantity are 2 × C (K, 2), and K is the preset quantity and is positive integer, and C (K, 2) is indicated at K All combined numbers of two clock signals are taken in clock signal；And

Wherein, which includes at least the first combination and is connected in the second combination of first combination, And the enabled status sequence of the clock signal of second combination is in contrast to the enable of the clock signal of first combination Sequence of states.

2. display device as described in claim 1, wherein it include the specific quantity frame time during each display, and Each frame time corresponds to a combination in the certain amount of enabled status of the clock signal.

3. display device as described in claim 1, wherein the preset quantity is greater than or equal to 2.

4. display device as described in claim 1, wherein in each pixel group, the sub-pixel receives corresponding institute State colouring information different in data-signal.

5. display device as described in claim 1, further includes：

Switching circuit, couples the data line, and including：

Multiple switch receives the data-signal respectively, and is respectively coupled to the data line；

Wherein, for each pixel group, the corresponding switch is respectively by the clock signal of the preset quantity It is controlled, the corresponding data-signal is sent to the corresponding data line.

6. a kind of display device operates during multiple displays, including：

Multiple scan lines；

Multiple data lines are staggered with the scan line, and transmit multiple data-signals, wherein each data-signal tool There are multiple colouring informations；And

Multiple sub-pixels, couple the scan line and the data line, and each sub-pixel corresponds in the colouring information one；

Multiple clock signals respectively correspond the coupling sub-pixel；

Wherein, in the same scan line, the sub-pixel of each preset quantity belongs to a pixel group, and each pixel group The sub-pixel data-signal is received according to the enabled status of the clock signal with the preset quantity respectively In one；

Wherein, for coupling the identical data line and being respectively coupled to two pictures of two adjacent scan lines For plain group, two pixel groups receive one in the data by the corresponding data line in order, Yi Jifen Do not belong to two pixel groups and connects two sub-pixels reception institutes for receiving the corresponding data-signal in timing One is stated in colouring information；

Wherein, for coupling the identical data line and being respectively coupled to described in two of two two adjacent scan lines For sub-pixel, during each display in, the number by Kickback voltage effect caused by the corresponding clock signal It is identical；

Wherein, for each pixel group, during each display, the enabled status of the clock signal has one specific Multiple combinations of quantity；And

Wherein, for each pixel group, during each display, which includes at least the One combination and the second combination for being connected in first combination, and the enabled status sequence of the clock signal of second combination In contrast to the enabled status sequence of the clock signal of first combination.

7. display device as claimed in claim 6, wherein in the identical data line of correspondence and respectively correspond adjacent In the pixel group of two of two scan lines, each for corresponding to the sub-pixel of same color information, each Middle configuration number of a specific position in the corresponding pixel group is identical during the display.

8. display device as claimed in claim 6, wherein the preset quantity is greater than or equal to 2.

9. display device as claimed in claim 6, wherein in each pixel group, the sub-pixel receives corresponding institute State colouring information different in data-signal.

10. display device as claimed in claim 6, further includes：

Switching circuit, couples the data line, and including：

Multiple switch receives the data-signal respectively, and is respectively coupled to the data line；

Wherein, for each pixel group, the corresponding switch is respectively by the clock signal of the preset quantity It is controlled, the corresponding data-signal is sent to the corresponding data line.