CN105589026A

CN105589026A - Large switch matrix testing device

Info

Publication number: CN105589026A
Application number: CN201410553474.9A
Authority: CN
Inventors: 廖蓉
Original assignee: Individual
Current assignee: Individual
Priority date: 2014-10-19
Filing date: 2014-10-19
Publication date: 2016-05-18

Abstract

The invention discloses a large switch matrix testing device, which comprises a switch matrix and an automatic testing device connected with the switch matrix via a measurement channel and an excitation channel, wherein the automatic testing device comprises a computer and a control board connected with the computer; the control board is in data connection with a data bus; the data bus is in signal connection with a tested unit; and the switch matrix is also in control connection with the tested unit. The large switch matrix testing device also comprises a program control power supply in control connection with the automatic testing device, wherein the program control power supply provides power for the switch matrix. Multiple testing modules can be hooked; hot plug is supported; the universality and the scalability are strong; in comparison with the traditional fixed-type testing pin bed, a special channel board made for each tested circuit board is not needed, the size is reduced, the cost is reduced, and a new realization means is provided for a low-cost, portable, universal and multichannel testing scheme.

Description

Large-scale switch matrix testing arrangement

Technical field

The present invention relates to electronic circuit field, particularly, relate to a kind of large-scale switch matrix testing arrangement.

Background technology

ATE is more and more extensive in the application of military affairs and industrial circle, but in circuit unit especially circuit board testing, because unit under test kind is many, tested number of channels is large, and traditional switch matrix volume is large, switch speed is slow, electric property is poor. Can not meet modern testing equipment at a high speed, portable requirement.

Switch matrix is mainly realized the information exchange between ATE and circuit-under-test unit, and function is as follows: (1) adds to the power supply of programmable power supply system output on the pin that circuit-under-test unit requires automatically; (2) on the pin signal converting of ATE signal source subsystem output to circuit-under-test unit being required; (3) signal converting of circuit-under-test unit being exported is to the suitable measurement passage of ATE; (4) for circuit-under-test unit provides necessary outward element, as load, adjustment knob, large volume device etc. Its connector definition of different circuit-under-test unit is different, and each contact pin may be defined as one of power supply, input signal, output signal, outward element terminal. And the circuit unit port number of modern electronic equipment is a lot, a large amount of signalling channels has proposed stern challenge to the switch matrix design of ATE.

Summary of the invention

Can not meet the technological deficiency of the autorun of a large amount of signalling channels in order to overcome prior art, the invention discloses a kind of large-scale switch matrix testing arrangement.

Large-scale switch matrix testing arrangement of the present invention, comprise switch matrix and pass through to measure passage and the channel attached ATE of excitation with switch matrix, described ATE comprises computer and the control panel being connected with computer, described control panel is connected with data/address bus data, described data/address bus is connected with unit under test signal, described switch matrix also with unit under test control connection, also comprise and the programmable power supply of ATE control connection, described programmable power supply is switch matrix power supply.

Preferably, described measurement passage and excitation passage are parallel independently hardware data line passage.

Preferably, described computer and control panel carry out exchanges data by USB interface.

Preferably, described data/address bus is I2C bus.

Preferably, described control panel is composed in series by I2C interface chip, bus device, CPLD and multiplexing devices.

Large-scale switch matrix testing arrangement of the present invention, effectively dwindle system bulk, the switch matrix of developing can articulate multiple test modules, and support hot plug, there is very strong Universal and scalability, compared with traditional fixed test needle-bar, without making special channel plate for each circuit-under-test plate, reduce volume, reduced cost, for low cost, portability, generalization, multiple channel test scheme provide a kind of new means that realize.

Brief description of the drawings

Fig. 1 is a kind of detailed description of the invention schematic diagram of the present invention.

Detailed description of the invention

Below in conjunction with embodiment and accompanying drawing, the present invention is done to detailed description further, but embodiments of the present invention are not limited to this.

System block diagram as shown in Figure 1. Switch matrix is taked needle-bar connected mode, can effectively connect multiple connector. By monolithic processor controlled multiplexer, signal can be added to required tested passage, system architecture diagram is as shown in Figure l. System adopts the structure of upper and lower machine, and host computer is made up of computer and control software, and slave computer is made up of usb bus interface and control panel, and USB module sends control data on control panel each test module by I2C bus. On control panel, each test module is received the serial code stream that bus is sent, and extracts address value after decoding, and the multiplexer in control module is chosen respective channel. I2C is a kind of Peripheral Interface of universal serial bus, it adopts method of synchronization serial received or transmission information, master-slave equipment is worked under same clock, I2C forms bidirectional linked list bus by data wire SDA and clock line SCL, because I2C only has a data lines, therefore the sending and receiving of information can only carry out in timesharing. Each modular assembly is all connected in parallel in bus, and each module has unique address. Therefore system can increase or reduce Board Under Test quantity in allowed band, and in I2C bus, each node module is supported hot plug, so take this scheme can effectively reduce test macro volume, uses easy to operately, can connect multiple unit under tests simultaneously.

In native system, on control panel, each test module all carries out communication by I2C bus and Test Host, and each module's address is unique definite by I2C chip address on plate, and plate choosing is carried out in the first definite each board of main frame address, set up after communication with corresponding board, send Serial Control data SDA. At synchronization, in I2C bus, can only there is a module in active state, utilize " maintenance " characteristic of multiplexer state, can realize the switching of probe on test module and between test module.

As mentioned above, can realize preferably the present invention.

Claims

1. large-scale switch matrix testing arrangement, it is characterized in that, comprise switch matrix and pass through to measure passage and the channel attached ATE of excitation with switch matrix, described ATE comprises computer and the control panel being connected with computer, described control panel is connected with data/address bus data, described data/address bus is connected with unit under test signal, described switch matrix also with unit under test control connection, also comprise and the programmable power supply of ATE control connection, described programmable power supply is switch matrix power supply.

2. large-scale switch matrix testing arrangement according to claim 1, is characterized in that, described measurement passage and excitation passage are parallel independently hardware data line passage.

3. large-scale switch matrix testing arrangement according to claim 1, is characterized in that, described computer and control panel carry out exchanges data by USB interface.

4. large-scale switch matrix testing arrangement according to claim 1, is characterized in that, described data/address bus is I2C bus.

5. large-scale switch matrix testing arrangement according to claim 4, is characterized in that, described control panel is composed in series by I2C interface chip, bus device, CPLD and multiplexing devices.