CN105573869A - I2C bus based fault tolerant control method for system controller - Google Patents
I2C bus based fault tolerant control method for system controller Download PDFInfo
- Publication number
- CN105573869A CN105573869A CN201510927375.7A CN201510927375A CN105573869A CN 105573869 A CN105573869 A CN 105573869A CN 201510927375 A CN201510927375 A CN 201510927375A CN 105573869 A CN105573869 A CN 105573869A
- Authority
- CN
- China
- Prior art keywords
- module
- gppm
- system controller
- time window
- cpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2023—Failover techniques
- G06F11/2028—Failover techniques eliminating a faulty processor or activating a spare
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
Abstract
The invention relates to an I2C bus based fault tolerant control method for a system controller. The fault tolerant control method comprises the following steps of 1) initializing, in which MIDn numbers are sequentially allocated to each GPPM module after a system is energized, n is an integer, a central processing unit (CPU) calculates broadcast message sending time windows of the corresponding GPPM module according to the allocated MID number, and the system controller is a default system controller when the MID is defaulted to be zero; and 2) switching the system controller, in which the GPPM module declares to become a new system controller when the GPPM successfully sends out a broadcast message in the corresponding broadcast message sending time window, and judges that 1 is added into the MID of the GPPM module when the GPPM module does not send out the broadcast message in the corresponding broadcast message sending time window. With the fault tolerant control method, a backup mode of the system controller is changed to warm backup from heat backup, and the system reliability is improved; and meanwhile, the availability of system resources is improved, and the volume, the power consumption and the cost of the system are reduced.
Description
Technical field
The invention belongs to comprehensive core Processing System Design technical field, be specifically related to a kind of system controller fault tolerant control method based on I2C bus.
Background technology
As shown in Figure 1, comprehensive core processing system comprises multiple GPPM module, and each GPPM module comprises CPU and fault handling logic module, and system will two GPPM module definitions be wherein system controller, be respectively main system controller and standby system controller.Main system controller and standby system controller are in remaining Hot Spare duty, run identical task simultaneously, but only have main system controller Output rusults, standby system controller not Output rusults.When main system controller breaks down, its fault handling logic module exports three fault-signals, look-at-me is produced to CPU after the fault handling logic module of standby system controller receives fault-signal, have no progeny during the CPU of standby system controller receives, standby system controller becomes main system controller, simultaneously adapter system control task.
There is following problem in this fault-tolerant management mechanism:
1, when main system controller and standby system controller are simultaneously or when in succession breaking down, by occur without system controller can situation, this can affect completing of aircraft mission critical.
2, when main system controller normally works, standby system controller not Output rusults, is in dry running state, and system resource available rate is low, which results in the waste of system resource.
3, standby system controller is a redundant module in system, and this essence is the increase in the weight of system, volume and power consumption.
Summary of the invention
In order to the resource available rate solving existing comprehensive core processing system is low, the technical matters that system weight, volume and power consumption are high, the invention provides a kind of system controller fault tolerant control method based on I2C bus.The present invention changes system controller backup mode into warm spare by Hot Spare, and when main system controller and standby system controller break down simultaneously, system still can ensure completing of aircraft mission critical, improves the reliability of system.
Technical solution of the present invention:
A kind of system controller fault-tolerant control system based on I2C bus, its special character is: comprise multiple GPPM module, each GPPM module includes CPU and fault handling logic module, described fault handling logic module comprises discrete magnitude module, judge module, timer and interruption generation module
Described discrete magnitude module is for generation of discrete magnitude and send to discrete magnitude module in other GPPM modules and receive the discrete magnitude that the discrete magnitude module in other GPPM modules sends,
Described judge module is used for carrying out three to the discrete magnitude of input discrete magnitude module and gets two votings, and when voting result is " 0 ", triggered timer carries out timing; Triggered interrupts generation module produces look-at-me and sends to the CPU being in same GPPM module simultaneously;
The CPU of each GPPM module is connected by I2C bus, and CPU calculates the transmission broadcast time window of corresponding GPPM module according to No. MID of the GPPM module be connected in I2C bus;
Described CPU is used for reading and is in same GPPM module timer state, judge whether to be in and send broadcast time window, if in transmission broadcast time window, then send broadcast by I2C bus to the CPU in other GPPM modules, announce that the GPPM module belonging to this CPU becomes system controller; For after the broadcast that the CPU received in other GPPM modules sends, when stopping timer.
Based on a system controller fault tolerant control method for I2C bus, comprise the following steps:
1) initialization:
After 1.1 system electrification, each GPPM module reads No. MIDn; N is integer;
1.2) CPU calculates the transmission broadcast time window of each GPPM module according to No. MID that distributes;
1.3) the GPPM module of system default MID=0 is default system controller;
1.4) if default system controller, in the transmission broadcast time window preset, send broadcast to other backup controllers, then announce the establishment of system controller;
If do not send broadcast to other backup controllers in transmission broadcast time window, then carry out the switching of system controller;
2) switching of system controller:
2.1) when default system controller does not send broadcast to all the other backup controllers in transmission broadcast time window, the discrete magnitude module of fault handling logic module, by discrete magnitude D2 ~ D0 output low level pulse signal, sends to the discrete magnitude module of all the other backup controllers;
2.2) after all the other standby system controllers receive low level pulse signal, three are carried out to the input value of discrete magnitude D2 ~ D0 and gets two votings, current voting result is " 0 ", all the other standby system controllers start timer, simultaneously by interrupting generation module generation look-at-me and this look-at-me sent to being in same GPPM module CPU;
2.3) after the CPU of all the other standby system controllers receives look-at-me, after timer state in CPU read failure processing logic module, judge whether the GPPM module of MID=n successfully sends broadcast in the transmission broadcast time window of correspondence; Wherein n=default system controller MID+1;
2.4) if when this GPPM module successfully sends broadcast in the transmission broadcast time window of correspondence, then this GPPM module is announced to become new system controller, receives other GPPM modules of broadcast, when stopping timer,
If when this GPPM module does not successfully send broadcast in the transmission broadcast time window of correspondence, then perform step 2.5):
2.5) to step 2.4) judge that the MID of GPPM module adds 1 after, judge whether the GPPM module corresponding with the new MID produced successfully sends broadcast in corresponding transmission broadcast time window;
2.6) step 2.4 is performed).
Step 1.2) send broadcast time window=n*30ms.
15s after the transmission broadcast time window=system electrification of default system controller.
The advantageous effect that the present invention has:
1, fault-tolerant reconstitution time is short, and fault recovery speed is fast;
2, hardware circuit realizes simple and reliable;
3, improve the reliability of system;
4, improve the available rate of system resource;
5, the volume of system, power consumption and cost is reduced.
Accompanying drawing explanation
Fig. 1 is existing system controller fault tolerance management method schematic diagram;
Fig. 2 is designed system controller fault tolerance management method schematic diagram of the present invention.
Embodiment
The present invention adopts Trouble Report mechanism and I2C bus communication mechanism to realize the fault-tolerant management of multiple system controller, and its concrete technical scheme is as follows:
1, the fault handling logic module of GPPM module realizes module failure function of reporting.D2 ~ D0 is fault handling logic module three input/output type discrete magnitudes, and each discrete magnitude is designed to weak pull-up resistance in fault handling logic inside modules, and CPU can control the output state of discrete magnitude by controlling fault handling logic module.
2, after system reset, discrete magnitude acquiescence output state is " 0 "; After reset terminates, CPU can control the output state of discrete magnitude by fault handling logic module.When module breaks down, when such as house dog is reported to the police or the enable discrete magnitude of CPU exports, discrete magnitude D2 ~ D0 output low level pulse signal; When the not enable discrete magnitude of CPU exports, discrete magnitude D2 ~ D0 exports tri-state, is " weak 1 ".
3, after system controller sends Trouble Report, fault handling logic in standby system controller carries out three to the input value of discrete magnitude D2 ~ D0 and gets two votings, when voting result is " 0 ", fault handling logic starts timer, produces look-at-me simultaneously and gives CPU by this interruption.
4, standby system controller is had no progeny in receiving, and sends broadcast, announce the establishment of new system controller in official hour by I2C bus.Backup controller is (standby system controller MID-current system controller MID) * 30ms Zi receiving the maximum time window interrupted to sending broadcast.If backup controller breaks down, it does not send broadcast in official hour, then the next module that can become system controller will start broadcast transmission program.
If 5 GPPM1 are system controller, then first, second, n-th standby system controller send broadcast time window be respectively 30ms, 60ms, n*30ms.When the first standby system controller successfully sends broadcast, after declaration becomes new system controller, system controller MID is updated to current system controller MID (i.e. the first backup controller MID), and other backup controllers send broadcast time window and close.
Workflow of the present invention is as follows:
1, after system electrification, each GPPM module completes self-test in 15s, determines whether each module becomes standby system controller according to the result of self-test.The module of MID=0 is defaulted as system controller, if its self-test is correct, then need send broadcast in 15s, announces the establishment of system controller.
If the system controller fault of 2 acquiescences, fail to send broadcast in 15s, then it sends Trouble Report, carries out the switching of system controller.
3, suppose that current GPPM1 is system controller, all the other modules are standby system controller.When GPPM1 breaks down, its fault handling logic is by discrete magnitude D2 ~ D0 output low level pulse signal.
4, after standby system controller receives low level pulse signal, three are carried out to the input value of discrete magnitude D2 ~ D0 and gets two votings, current voting result is " 0 ", and the fault handling logic of standby system controller starts timer, produces look-at-me simultaneously and gives CPU by this interruption;
5, standby system controller is had no progeny in receiving, the timer state in CPU read failure processing logic, judges whether to be in send broadcast time window.Current GPPM2 is the first standby system controller, and it sends broadcast within the 30ms time, if send successfully, then the first standby system controller GPPM2 announces to become new system controller, upgrades system controller MID simultaneously.After remaining backup controller receives broadcast, stop timer, close and send broadcast time window.
If 6 GPPM2 faults, within the 30ms time, do not send broadcast, then GPPM3 enters and sends broadcast time window, if it successfully sends broadcast within the 30ms time, second standby system controller GPPM3 announces to become new system controller, by that analogy.
Claims (4)
1. the system controller fault-tolerant control system based on I2C bus, it is characterized in that: comprise multiple GPPM module, each GPPM module includes CPU and fault handling logic module, and described fault handling logic module comprises discrete magnitude module, judge module, timer and interruption generation module
Described discrete magnitude module is for generation of discrete magnitude and send to discrete magnitude module in other GPPM modules and receive the discrete magnitude that the discrete magnitude module in other GPPM modules sends,
Described judge module is used for carrying out three to the discrete magnitude of input discrete magnitude module and gets two votings, and when voting result is " 0 ", triggered timer carries out timing; Triggered interrupts generation module produces look-at-me and sends to the CPU being in same GPPM module simultaneously;
The CPU of each GPPM module is connected by I2C bus, and CPU calculates the transmission broadcast time window of corresponding GPPM module according to No. MID of the GPPM module be connected in I2C bus;
Described CPU is used for reading and is in same GPPM module timer state, judge whether to be in and send broadcast time window, if in transmission broadcast time window, then send broadcast by I2C bus to the CPU in other GPPM modules, announce that the GPPM module belonging to this CPU becomes system controller; For after the broadcast that the CPU received in other GPPM modules sends, when stopping timer.
2., based on a system controller fault tolerant control method for I2C bus, it is characterized in that, comprise the following steps:
1) initialization:
After 1.1 system electrification, each GPPM module reads No. MIDn; N is integer;
1.2) CPU calculates the transmission broadcast time window of each GPPM module according to No. MID that distributes;
1.3) the GPPM module of system default MID=0 is default system controller;
1.4) if default system controller, in the transmission broadcast time window preset, send broadcast to other backup controllers, then announce the establishment of system controller;
If do not send broadcast to other backup controllers in transmission broadcast time window, then carry out the switching of system controller;
2) switching of system controller:
2.1) when default system controller does not send broadcast to all the other backup controllers in transmission broadcast time window, the discrete magnitude module of fault handling logic module, by discrete magnitude D2 ~ D0 output low level pulse signal, sends to the discrete magnitude module of all the other backup controllers;
2.2) after all the other standby system controllers receive low level pulse signal, three are carried out to the input value of discrete magnitude D2 ~ D0 and gets two votings, current voting result is " 0 ", all the other standby system controllers start timer, simultaneously by interrupting generation module generation look-at-me and this look-at-me sent to being in same GPPM module CPU;
2.3) after the CPU of all the other standby system controllers receives look-at-me, after timer state in CPU read failure processing logic module, judge whether the GPPM module of MID=n successfully sends broadcast in the transmission broadcast time window of correspondence; Wherein n=default system controller MID+1;
2.4) if when this GPPM module successfully sends broadcast in the transmission broadcast time window of correspondence, then this GPPM module is announced to become new system controller, receives other GPPM modules of broadcast, when stopping timer,
If when this GPPM module does not successfully send broadcast in the transmission broadcast time window of correspondence, then perform step 2.5):
2.5) to step 2.4) judge that the MID of GPPM module adds 1 after, judge whether the GPPM module corresponding with the new MID produced successfully sends broadcast in corresponding transmission broadcast time window;
2.6) step 2.4 is performed).
3. the system controller fault tolerant control method based on I2C bus according to claim 2, is characterized in that:
Step 1.2) send broadcast time window=n*30ms.
4. the system controller fault tolerant control method based on I2C bus according to Claims 2 or 3, is characterized in that:
15s after the transmission broadcast time window=system electrification of default system controller.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510927375.7A CN105573869B (en) | 2015-12-11 | 2015-12-11 | System controller fault tolerant control method based on I2C bus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510927375.7A CN105573869B (en) | 2015-12-11 | 2015-12-11 | System controller fault tolerant control method based on I2C bus |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105573869A true CN105573869A (en) | 2016-05-11 |
CN105573869B CN105573869B (en) | 2019-05-28 |
Family
ID=55884035
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510927375.7A Active CN105573869B (en) | 2015-12-11 | 2015-12-11 | System controller fault tolerant control method based on I2C bus |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105573869B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107992380A (en) * | 2017-11-28 | 2018-05-04 | 北京东土科技股份有限公司 | A kind of computer system, backup management method and computer-readable recording medium |
CN108255123A (en) * | 2018-01-16 | 2018-07-06 | 广州地铁集团有限公司 | Train LCU control devices based on the voting of two from three software and hardware |
CN109407669A (en) * | 2018-11-23 | 2019-03-01 | 中国船舶科学研究中心(中国船舶重工集团公司第七0二研究所) | A kind of control method of multiple field error-tolerance type free sailing model ship |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102945217A (en) * | 2012-10-11 | 2013-02-27 | 浙江大学 | Triple modular redundancy based satellite-borne comprehensive electronic system |
US20130058444A1 (en) * | 2011-09-06 | 2013-03-07 | Cisco Technology, Inc. | Fault Tolerant Communications Over a Two-Wire Interface |
-
2015
- 2015-12-11 CN CN201510927375.7A patent/CN105573869B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130058444A1 (en) * | 2011-09-06 | 2013-03-07 | Cisco Technology, Inc. | Fault Tolerant Communications Over a Two-Wire Interface |
CN102945217A (en) * | 2012-10-11 | 2013-02-27 | 浙江大学 | Triple modular redundancy based satellite-borne comprehensive electronic system |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107992380A (en) * | 2017-11-28 | 2018-05-04 | 北京东土科技股份有限公司 | A kind of computer system, backup management method and computer-readable recording medium |
CN108255123A (en) * | 2018-01-16 | 2018-07-06 | 广州地铁集团有限公司 | Train LCU control devices based on the voting of two from three software and hardware |
CN109407669A (en) * | 2018-11-23 | 2019-03-01 | 中国船舶科学研究中心(中国船舶重工集团公司第七0二研究所) | A kind of control method of multiple field error-tolerance type free sailing model ship |
CN109407669B (en) * | 2018-11-23 | 2021-06-08 | 中国船舶科学研究中心(中国船舶重工集团公司第七0二研究所) | Control method of multilayer fault-tolerant self-propelled ship model |
Also Published As
Publication number | Publication date |
---|---|
CN105573869B (en) | 2019-05-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107187465B (en) | ATO system architecture of unit-level hot standby redundancy | |
CN107957692B (en) | Controller redundancy method, device and system | |
CN104516306B (en) | The automated system of redundancy | |
CN105988480B (en) | Flight control system command selection and data transmission | |
CN103744753B (en) | A kind of data interactive method of dual systems and device | |
CN103057572B (en) | Control switch method of main machine and standby machine | |
CN102541697A (en) | Switching method for processing fault of dual-redundancy computer | |
CN104050061A (en) | Multi-main-control-panel redundant backup system based on PCIe bus | |
US9367375B2 (en) | Direct connect algorithm | |
CN103853622A (en) | Control method of dual redundancies capable of being backed up mutually | |
EP3835903B1 (en) | Fault diagnosis system and server | |
CN110427283B (en) | Dual-redundancy fuel management computer system | |
CN102830647A (en) | Double 2-vote-2 device for fail safety | |
CN105573869A (en) | I2C bus based fault tolerant control method for system controller | |
CN210129215U (en) | Dual-redundancy electromechanical management computer architecture | |
CN102508746A (en) | Management method for triple configurable fault-tolerant computer system | |
CN104135398A (en) | Intelligent RS485 concentrator and bus deadlock detection method | |
CN105426171A (en) | Synchronization and switching method and system for multiple two-out-of-two systems | |
CN104468217A (en) | Network reconstruction method under 1394 network manager fault | |
CN104317679A (en) | Communication fault-tolerant method based on thread redundancy for SCADA (Supervisory Control and Data Acquisition) system | |
CN103793300B (en) | Fast active-standby switching device in hot-standby system and active-standby switching method | |
CN103150224B (en) | For improving the electronic equipment and method that start reliability | |
CN104503947A (en) | Multi-server and signal processing method thereof | |
CN101291201A (en) | Heart beat information transmission system and method | |
CN101557307B (en) | Dispatch automation system application state management method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |