CN105551972A - SOP8 chip packaging technology - Google Patents
SOP8 chip packaging technology Download PDFInfo
- Publication number
- CN105551972A CN105551972A CN201510895923.2A CN201510895923A CN105551972A CN 105551972 A CN105551972 A CN 105551972A CN 201510895923 A CN201510895923 A CN 201510895923A CN 105551972 A CN105551972 A CN 105551972A
- Authority
- CN
- China
- Prior art keywords
- plastic packaging
- sop8
- lead frame
- pin
- chip packaging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012536 packaging technology Methods 0.000 title abstract description 7
- 238000004806 packaging method and process Methods 0.000 claims abstract description 15
- 238000009434 installation Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 5
- 239000005022 packaging material Substances 0.000 abstract description 10
- 239000000463 material Substances 0.000 abstract description 5
- 239000002699 waste material Substances 0.000 abstract description 5
- 238000005516 engineering process Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 210000003205 muscle Anatomy 0.000 description 2
- 241000707825 Argyrosomus regius Species 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The invention provides an SOP8 chip packaging technology, aims to overcome the problem in an existing chip packaging technology that the structural design of an SOP8 lead frame wastes frame materials and plastic packaging materials, and provides the SOP8 chip packaging technology, by adopting which the lead frame materials and the plastic packaging materials are fully utilized. The technology comprises the steps of: a, designing the size of the integral lead frame to be 100 mm* 300 mm; b, setting the lead frame of one chip to be a mounting unit, staggering pins of two up and down adjacent mounting units in the same row of mounting units, and forming an IDF structure; c, arranging a plastic packaging channel in the symmetrical center every six rows of mounting units, and injecting three products respectively on the left side and the right side of each channel; d, designing an internal pin of the mounting unit to be in an L shape or a T shape; and e, arranging a connecting strip between adjacent external pins. According to the invention, the frame utilization rate is improved, the number of plastic packaging channels is reduced, the utilization rate of the plastic packaging materials is improved, and the SOP8 chip packaging technology is applicable to chip packaging.
Description
Technical field
The present invention relates to a kind of packaging technology of integrated circuit, in particular, relate to a kind of SOP8 chip package process.
Background technology
In the prior art, existing 8 row SOP8 lead frames, the pin of two neighbouring installation units is alignment, and the area between such pin and pin has just been wasted, and framework utilance is lower; The each each plastic packaging of runner the right and left 2 products during plastic packaging, the runner of setting is too many, and the plastic packaging material of runner place waste is also more.Along with encapsulation is more and more tending towards meagre profit, how reduces the waste of frame area and plastic packaging material, become reduction packaging cost, improve the key of product competitiveness.
Summary of the invention
In order to overcome in prior art chip package, there is the deficiency of waste frame material and waste plastic packaging material in the structural design of SOP8 lead frame, provides a kind of and can fill the SOP8 chip package process that part utilizes blaster fuse frame material and capsulation material.
For realizing above technical purpose, technical scheme of the present invention is:
A kind of SOP8 chip package process, includes following steps:
A. frame base is designed and sized to 100mm*300mm;
B. the lead frame setting a chips is an installation unit, and the pin of two neighbouring in same row installation unit intersects and staggers, and forms IDF type structure;
C. arrange a plastic packaging runner every 6 row installation units at its symmetrical centre place, runner the right and left respectively rushes note 3 products;
D. the interior pin of installation unit is designed to " L-type " or " T-shaped " shape;
E. intercell connector is provided with between adjacent outer pin.
Integral lead frame size in force, is accomplished the dimension limit (100mm*300mm) that bonding apparatus can be processed by the present invention; When implementing, again developing supporting bonding fixture, plastic package die, cutting muscle mould, forming a whole set of packaging technology.
The present invention can realize following beneficial effect: framework directly accomplishes the full-size that equipment can be processed, and avoids because repeatedly developing the wasting of resources caused; Adopt IDF structure, improve framework utilance, also can improve certain frame strength simultaneously; Reduce plastic packaging runner quantity, improve plastic packaging material utilance; Frame inner pin is designed to " L-type " and the special shape of " T-shaped ", improves the adhesion between pin and plastic-sealed body after plastic packaging, and when preventing Trim Molding, pin spins off in plastic-sealed body owing to being subject to downward pressure; Between outer pin, intercell connector is set, plastic packaging material during plastic packaging, can be prevented to the flowing of pin place, avoid causing pin " overflow glue ".
Accompanying drawing explanation
Fig. 1 is frame structure schematic diagram provided by the present invention.
Fig. 2 is IDF type mount structure schematic diagram.
Fig. 3 is the installation unit detailed schematic of framework described in Fig. 1.
In figure: 1 frame base; 2 installation units; 3 plastic packaging runners; 4 intercell connectors; Pin in 5.
Embodiment
Below in conjunction with accompanying drawing, design of the present invention and advantage are described in detail.
As shown in Figure 1, in design provided by the invention, frame base 1 is of a size of 100mm*300mm, the full-size that equipment of directly accomplishing is supported, avoids repeatedly developing and causes the wasting of resources.The pin of two neighbouring in same row installation unit 2 intersects and staggers, and forms IDF type structure, can increase the intensity of framework to a certain extent, is unlikely to produce distortion because of too soft; Also can to arrange more installation unit 2 simultaneously, 15 row x42 can be set and arrange, raising framework utilance.Framework just arranges a plastic packaging runner 3 at its symmetrical centre place every 6 row, and runner the right and left respectively rushes note 3, respectively rushes the design of 2 compared to original runner both sides, and runner quantity reduces, and can improve plastic packaging material utilance.As shown in Figure 2, in design provided by the invention, between the outer pin that left and right is adjacent, an intercell connector 4 is set, during plastic packaging, can effectively stops plastic packaging material to the flowing of pin place, prevent from causing pin to overflow glue.Interior pin 5 is designed to the special shape of " L-type " and " T-shaped " as figure centre circle note, improves the adhesion of pin and plastic-sealed body, prevents from causing pin to depart from plastic-sealed body owing to being subject to downward pressure during Trim Molding.Because framework did longer wider than in the past, runner arranges and have also been made improvement, so we also again develop supporting bonding fixture, plastic package die, cut muscle mould, to adapt to the needs of volume production.Design novel structure provided by the invention is unique, advantages of simple, and utilization rate of raw materials significantly increases, and for the packaging cost reducing product, the competitiveness of improving product has obviously effect.Above-mentioned execution mode is only principle and effect thereof that the present invention's design is described illustratively; for the person of ordinary skill of the art; without departing from the concept of the premise of the invention, some distortion or improvement can also be made, and these all should belong within protection scope of the present invention.
Claims (1)
1. a SOP8 chip package process, is characterized in that: include following steps:
A. integral lead frame is designed and sized to 100mm*300mm;
B. the lead frame setting a chips is an installation unit, and the pin of two neighbouring in same row installation unit intersects and staggers, and forms IDF type structure;
C. arrange a plastic packaging runner every 6 row installation units at its symmetrical centre place, runner the right and left respectively rushes note 3 products;
D. the interior pin of installation unit is designed to " L-type " or " T-shaped " shape;
E. intercell connector is provided with between adjacent outer pin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510895923.2A CN105551972A (en) | 2015-12-08 | 2015-12-08 | SOP8 chip packaging technology |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510895923.2A CN105551972A (en) | 2015-12-08 | 2015-12-08 | SOP8 chip packaging technology |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105551972A true CN105551972A (en) | 2016-05-04 |
Family
ID=55831083
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510895923.2A Pending CN105551972A (en) | 2015-12-08 | 2015-12-08 | SOP8 chip packaging technology |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105551972A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113782456A (en) * | 2021-09-07 | 2021-12-10 | 广东气派科技有限公司 | Production method for improving production efficiency of SOP type packaging product |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101477973A (en) * | 2009-01-23 | 2009-07-08 | 日月光半导体制造股份有限公司 | Conductive wire frame strip, glue sealing method and glue sealing structure |
| CN104253103A (en) * | 2013-06-26 | 2014-12-31 | 深圳赛意法微电子有限公司 | Base-pin-staggering-mode-based lead frame structure and semiconductor device manufacturing method |
| CN104900625A (en) * | 2015-06-08 | 2015-09-09 | 气派科技股份有限公司 | High-density IDF SOP8 lead frame structure |
-
2015
- 2015-12-08 CN CN201510895923.2A patent/CN105551972A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101477973A (en) * | 2009-01-23 | 2009-07-08 | 日月光半导体制造股份有限公司 | Conductive wire frame strip, glue sealing method and glue sealing structure |
| CN104253103A (en) * | 2013-06-26 | 2014-12-31 | 深圳赛意法微电子有限公司 | Base-pin-staggering-mode-based lead frame structure and semiconductor device manufacturing method |
| CN104900625A (en) * | 2015-06-08 | 2015-09-09 | 气派科技股份有限公司 | High-density IDF SOP8 lead frame structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113782456A (en) * | 2021-09-07 | 2021-12-10 | 广东气派科技有限公司 | Production method for improving production efficiency of SOP type packaging product |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160504 |