CN105512008A - Method and device obtaining fault information - Google Patents

Method and device obtaining fault information Download PDF

Info

Publication number
CN105512008A
CN105512008A CN201410486022.3A CN201410486022A CN105512008A CN 105512008 A CN105512008 A CN 105512008A CN 201410486022 A CN201410486022 A CN 201410486022A CN 105512008 A CN105512008 A CN 105512008A
Authority
CN
China
Prior art keywords
cpu
internal memory
crash info
memory
server
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410486022.3A
Other languages
Chinese (zh)
Other versions
CN105512008B (en
Inventor
周鑫涛
贾晓林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
XFusion Digital Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN201410486022.3A priority Critical patent/CN105512008B/en
Publication of CN105512008A publication Critical patent/CN105512008A/en
Application granted granted Critical
Publication of CN105512008B publication Critical patent/CN105512008B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Hardware Redundancy (AREA)

Abstract

The invention discloses a collapse information storage method and device so as to realize a black box function when a server has no BMC module; the method comprises the following steps: obtaining system collapse information when a server system collapses; storing the collapse information to a first CPU memory of the server; storing the collapse information in the first CPU memory to a second CPU nonvolatile memory of the server. The invention also provides a collapse information storage device; the method and device can realize the black box function when the server system has no BMC module.

Description

A kind of method and device obtaining failure message
Technical field
The present invention relates to communication technical field, particularly relate to a kind of method and the device that store crash info
Background technology
Current generic server generally all has black box function, when the system crash of server, black box can obtain information during system crash, and this information is carried out being kept in non-volatile memories, even if system reboot, these information also can not be lost, and can provide the important evidence of developer's quick positioning system fault, be beneficial to the diagnosis of system (English: OperatingSystem, to be called for short OS).
Black box function in the system of existing server is based on baseboard management controller module (Baseboardmanagementcontroller, BMC) realize, it is (English: KernelBlaxkbox that system board inserts kernel black box in system (Linux) kernel, be called for short: KBOX) module, occur abnormal by when resetting in system, grasping system crash info, peripheral interconnect standard is (English: PeripheralComponentInterconnectExpress, be called for short: PCIe) (English: FieldProgrammableGateArray with the field programmable gate array in BMC module, be called for short: FPGA) mutual, then Double Data Rate synchronous DRAM (DoubleDataRate is passed through by FPGA, crash info is saved in the DDR memory headroom in BMC module by controller DDR), again the crash info in DDR internal memory is saved in corresponding hard disk.
But, the system of existing server starts to tend to hypomegetic future development, the volume of mini system is little, for the consideration of arrangement space, often BMC is not had in system, when collapse occurs system, the crash info got cannot be stored in nonvolatile memory, thus cannot black box function be realized.
Summary of the invention
Embodiments provide a kind of method storing crash info, when without BMC module, crash info can be stored in the nonvolatile memory of the 2nd CPU of server, thus realize black box function.
The embodiment of the present invention, a kind of crash info storage means for server of first aspect, described server comprises the first hardware system and the second hardware system, described first hardware system comprises a CPU and the first internal memory, described second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, and described method comprises:
When described first hardware system meets collapse condition, described server obtains the crash info of described first hardware system, and is saved to by described crash info in described first internal memory;
Described server is by the described crash info mirror image in described first internal memory to described second internal memory;
Crash info in described second internal memory is stored in described nonvolatile memory by described server.
In conjunction with the first aspect of the embodiment of the present invention, in the first implementation of embodiment of the present invention first aspect, the described crash info mirror image in described first internal memory to before in described second internal memory, comprises by described server:
Set up the mirror-image channels of described first internal memory to described second internal memory, described mirror-image channels is used for, and the described crash info preserved in described first internal memory, is mirrored to described second internal memory through a described CPU, described 2nd CPU.
In conjunction with the first aspect of the embodiment of the present invention or the first implementation of first aspect, in the second implementation of embodiment of the present invention first aspect, described server, by the described crash info mirror image in described first internal memory to described second internal memory, comprising:
Crash info in described first internal memory is sent in a described CPU by the first main memory access between described first internal memory and a described CPU by described server;
Crash info in a described CPU is sent in described 2nd CPU by the PCIE channel between a described CPU and described 2nd CPU by described server;
Crash info in described 2nd CPU is sent in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory by described server.
In conjunction with the second implementation of the first aspect of the embodiment of the present invention, in the third implementation of embodiment of the present invention first aspect, crash info in described first internal memory is sent in a described CPU by the first main memory access between described first internal memory and a described CPU by described server, crash info in a described CPU is sent in described 2nd CPU by the PCIE channel between a described CPU and described 2nd CPU by described server, crash info in described 2nd CPU is sent in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory by described server, comprise:
Described server, by the described crash info in described first internal memory, maps to first port with described first internal memory with mapping relations, and described first port belongs to a described CPU;
Described server is by the described crash info in a described CPU, and map to second port with a described CPU with mapping relations, described second port belongs to described 2nd CPU;
Described server, by the described crash info in described 2nd CPU, maps to and has in the second internal memory of mapping relations with described 2nd CPU.
In conjunction with the second implementation of the first aspect of the embodiment of the present invention, in the 4th kind of implementation of embodiment of the present invention first aspect, described first internal memory comprises N number of region of memory;
Described crash info is saved to described first internal memory and comprises by described server,
Described crash info is saved in the first region of memory in described N number of region of memory by described server, described N be greater than 1 positive integer;
Crash info in described first internal memory is sent in a described CPU by the first main memory access between described first internal memory and a described CPU by described server, crash info in a described CPU is sent in described 2nd CPU by the PCIE channel between a described CPU and described 2nd CPU by described server, crash info in described 2nd CPU is sent in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory by described server, comprise
Described server is to the described crash info in the first region of memory of described first internal memory of the second region of memory transmission of described first internal memory;
Described server is to the described crash info in the first region of memory of described first internal memory of the second region of memory transmission of described first internal memory;
Described crash info in second region of memory of described first internal memory is mapped to the 3rd port with the second region of memory of described first internal memory with mapping relations by described server, and described 3rd port belongs to a described CPU;
Described crash info in a described CPU is mapped to the 4th port with described 3rd port with mapping relations by described server, and described 4th port belongs to described 2nd CPU;
Described crash info in described 2nd CPU maps to by described server to be had in first region of memory of described second internal memory of mapping relations with described 4th port.
Embodiment of the present invention second aspect provides a kind of crash info storage means for server, described server comprises the first hardware system and the second hardware system, described first hardware system comprises a CPU and the first internal memory, described second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, and described method comprises:
When described first hardware system meets collapse condition, described server obtains the crash info of described first hardware system, and is saved to by described crash info in described first internal memory;
Described server, by the ethernet channel between a described CPU and described 2nd CPU, sends the described crash info in described first internal memory to described second internal memory;
Crash info in described second internal memory is stored in described nonvolatile memory by described server.
The embodiment of the present invention third aspect provides a kind of server, comprising:
Acquiring unit, for when described first hardware system meets collapse condition, obtains the crash info of described first hardware system;
Storage unit, for being saved in described first internal memory by described crash info;
Mirror image unit, for by the described crash info mirror image in described first internal memory in described second internal memory;
Storage unit, for being stored to the crash info in described second internal memory in described nonvolatile memory.
In conjunction with the third aspect of the embodiment of the present invention, in the first implementation of the third aspect of the embodiment of the present invention, described mirror image unit comprises:
Set up unit, for setting up the mirror-image channels of described first internal memory to described second internal memory, described mirror-image channels is used for, and the described crash info preserved in described first internal memory, is mirrored to described second internal memory through a described CPU, described 2nd CPU.
In conjunction with the first implementation of the third aspect of the embodiment of the present invention, in the second implementation of the third aspect of the embodiment of the present invention, described mirror image unit comprises:
First sending module, for being sent in a described CPU by the crash info in described first internal memory by the first main memory access between described first internal memory and a described CPU;
Second sending module, for being sent in described 2nd CPU by the crash info in a described CPU by the PCIE channel between a described CPU and described 2nd CPU;
3rd sending module, for being sent to the crash info in described 2nd CPU in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory.
In conjunction with the second implementation of the third aspect of the embodiment of the present invention, in the third implementation of the third aspect of the embodiment of the present invention, described first sending module comprises the first mapping submodule, described second sending module comprises the second mapping submodule, and described 3rd sending module comprises the 3rd mapping submodule;
Described first mapping submodule, for by the described crash info in described first internal memory, map to first port with described first internal memory with mapping relations, described first port belongs to a described CPU;
Described second mapping submodule, for by the described crash info in a described CPU, map to second port with a described CPU with mapping relations, described second port belongs in described 2nd CPU;
Described 3rd mapping submodule, for by the described crash info in described 2nd CPU, maps to and has in the second internal memory of mapping relations with described 2nd CPU.
In conjunction with the second implementation of the third aspect of the embodiment of the present invention, in the 4th kind of implementation of the third aspect of the embodiment of the present invention, described storage unit comprises,
Preserve module, for described crash info being saved in the first region of memory in described N number of region of memory, described N be greater than 1 positive integer;
Described first sending module comprises transmission submodule and the 4th mapping submodule, and described second sending module comprises the 5th mapping submodule, and described 3rd sending module comprises the 6th mapping submodule;
Described transmission submodule, for sending the described crash info in the first region of memory of described first internal memory to the second region of memory of described first internal memory;
4th mapping submodule, maps in the described CPU belonging to the 3rd port with the second region of memory of described first internal memory with mapping relations by the described crash info in the second region of memory of described first internal memory;
5th mapping submodule, for mapping in described 2nd CPU belonging to the 4th end with described 3rd port with mapping relations by the described crash info in a described CPU;
6th mapping submodule, has in first region of memory of described second internal memory of mapping relations with described 4th end for being mapped to by the described crash info in described 2nd CPU.
A kind of server of embodiment of the present invention fourth aspect, comprising:
Acquiring unit, for when described first hardware system meets collapse condition, obtains the crash info of described first hardware system, and is saved to by described crash info in described first internal memory;
Transmitting element, for by the ethernet channel between a described CPU and described 2nd CPU, sends the described crash info in described first internal memory to described second internal memory;
Storage unit, for being stored to the crash info in described second internal memory in described nonvolatile memory.
Embodiment of the present invention tool has the following advantages:
By when the first hardware system collapses, server obtains the crash info in the first hardware system, this crash info is being saved in the first internal memory, and then by crash info mirror image to the second internal memory in this first internal memory, again the crash info in this second internal memory is saved in the non-volatile memories of the second hardware system, thus during in the server without BMC module, realize black box function.
Accompanying drawing explanation
Fig. 1 is an embodiment schematic diagram of a kind of crash info storage means in the embodiment of the present invention;
Fig. 2 is another embodiment schematic diagram of a kind of crash info storage means in the embodiment of the present invention;
Fig. 3 is another embodiment schematic diagram of a kind of crash info storage means in the embodiment of the present invention;
Fig. 4 is another embodiment schematic diagram of a kind of crash info storage means in the embodiment of the present invention;
Fig. 5 is another embodiment schematic diagram of a kind of crash info storage means in the embodiment of the present invention;
Fig. 6 is another embodiment schematic diagram of a kind of crash info storage means in the embodiment of the present invention;
Fig. 7 is an embodiment schematic diagram of a kind of server in the embodiment of the present invention;
Fig. 8 is another embodiment schematic diagram of a kind of server in the embodiment of the present invention;
Fig. 9 is another embodiment schematic diagram of a kind of server in the embodiment of the present invention;
Figure 10 is another embodiment schematic diagram of a kind of server in the embodiment of the present invention;
Figure 11 is another embodiment schematic diagram of a kind of server in the embodiment of the present invention;
Figure 12 is another embodiment schematic diagram of a kind of server in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those skilled in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Refer to Fig. 1, in the embodiment of the present invention, an embodiment of crash info storage means comprises:
101, server judges whether the first hardware system meets collapse condition;
Server comprises the first hardware system and the second hardware system, this first hardware system comprises a CPU and the first internal memory, this second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, judge whether the first hardware system meets collapse condition, if so, then step 103 is performed; If not, then step 102 is performed.
102, repeating to sentence the first hardware system is satisfied collapse condition;
When judgement first hardware system does not meet collapse condition, within the time pre-set, repeat to judge whether the first hardware system meets collapse condition.
103, server obtains the crash info in the first hardware system;
When judgement first hardware system meets collapse condition, server obtains the crash info in this first hardware system.
104, crash info is saved in the first internal memory;
After server obtains the crash info of the first hardware system, this crash info is saved in a CPU of the first hardware system.
105, server is by crash info mirror image to the second internal memory in the first internal memory;
Crash info is being saved to after in the first internal memory, by the crash info mirror image in this first internal memory extremely in the second internal memory of the second hardware system.
106, the crash info in the second internal memory is stored in nonvolatile memory;
By after in crash info mirror image to the second internal memory in the first internal memory, the crash info in this second internal memory is saved in the nonvolatile memory of the second hardware system by server.
In the embodiment of the present invention, by when the first hardware system collapses, server obtains the crash info in the first hardware system, this crash info is saved in the first internal memory, again by crash info mirror image to the second internal memory in this first internal memory, and then be saved in the non-volatile memories of the second hardware system by the crash info in this second internal memory, thus during in the server without BMC module, realize black box function.
Above in the present embodiment, after crash info in the first hardware system got is saved in the first internal memory by server, by in this crash info mirror image to the second internal memory in the first internal memory, actual should in, server is specially in crash info mirror image to the second internal memory in the first internal memory: after the crash info in the first hardware system got is saved in the first internal memory by server, server is by first main memory access of this crash info in this first internal memory between the first internal memory and a CPU, PCIE channel between one CPU and the 2nd CPU, the second main memory access between 2nd CPU and the second internal memory, be sent in the second internal memory.
Be described the storage means being used for the crash info of server another kind of in the embodiment of the present invention below, refer to Fig. 2, the another kind that the embodiment of the present invention provides, for the storage means of the crash info of server, specifically comprises:
201, server judges whether the first hardware system meets collapse condition;
Server comprises the first hardware system and the second hardware system, this first hardware system comprises a CPU and the first internal memory, this second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, judge that the mode whether the first hardware system meets collapse condition is, judge whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, as no, then perform step 202; If so, then step 203 is performed.
It should be noted that, in the present embodiment, judge that the mode whether the first hardware system meets collapse condition is, by judging whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, in actual applications, this judges whether the first hardware system meets the mode of collapse condition can also for judge whether the registration table of this first hardware system is lost, or judge in conjunction with two kinds of modes, other judgment mode can also be adopted, as long as meet the crash info triggering acquisition system, concrete judgment mode is not construed as limiting herein.
202, repeat to judge whether the first hardware system meets collapse condition;
When collapse does not occur judgement first hardware system, within the time pre-set, repeat to judge whether this first hardware system collapses.
Be understandable that, this time pre-set can adjust according to the actual needs, as the working time according to hardware system adjusts, when the CPU in hardware system or internal memory use need to run continuously, by short for the tune suitable time of default setting.
203, the crash info of the first hardware system is obtained;
After server electrifying startup, hardware jumps to linux system operation by BIOS, the loading procedure of startup of server KBOX also inserts KBOX in the kernel of a CPU, this KBOX carries out initialization and registers Hook Function to a CPU hardware system, after the collapse of judgement first hardware system, this KBOX obtains crash info by the Hook Function of this registration from this first hardware system.
It should be noted that, in the present embodiment, server inserts KBOX in system, and obtained the crash info of this first hardware system to the Hook Function that the first hardware system is registered by this KBOX, in actual applications, KBOX also can register other functions, as long as meet this function can obtain crash info from system, does not limit herein.
204, the mirror-image channels of the first internal memory to the second internal memory is set up;
Get the crash info of the first hardware system at KBOX after, server sets up the mirror-image channels between the first internal memory to the second internal memory.
It should be noted that, in the embodiment of the present invention, set up the mirror-image channels of the first internal memory to the second internal memory only as a preferred version of the present embodiment, actual should in, mirror-image channels between this first internal memory to the second internal memory can be set up in advance, should not limit as the uniqueness of technical solution of the present invention.
205, crash info is saved to the first internal memory by server;
Get the crash info of the first hardware system at KBOX after, this crash info is saved in the first internal memory.
206, the crash info in the first internal memory is sent to a CPU from the first main memory access between the first internal memory and a CPU;
After being saved in the first internal memory by the crash info of the first hardware system, the crash info in this first internal memory from the main memory access between this first internal memory and a CPU, is sent in a CPU by server.
It should be noted that, in the present embodiment, the crash info in this first internal memory is sent to a CPU from the main memory access between this first internal memory and a CPU by server, in actual applications, server can also send this crash info by other passages, is not construed as limiting herein.
207, crash info in a CPU is sent to the 2nd CPU from a CPU;
After being sent to by the crash info of the first hardware system in a CPU, this crash info is sent to the 2nd CPU from the PCIE channel between a CPU and the 2nd CPU by server.
It should be noted that, in the present embodiment, crash info is sent to the 2nd CPU from the PCIE channel between a CPU and the 2nd CPU by server, in actual applications, server can also send this crash info by other high-speed link passages, is not construed as limiting herein.
208, the crash info in the 2nd CPU is sent in the second internal memory;
After being sent to the 2nd CPU by the crash info of the first hardware system from a CPU, this crash info by the second main memory access between the 2nd CPU and the second internal memory, is sent in the second internal memory by server by the crash info in the 2nd CPU.
It should be noted that, in the present embodiment, serve the crash info in the 2nd CPU by the second main memory access between the 2nd CPU and the second internal memory, this crash info is sent in the second internal memory, in reality is answered, server can also send this crash info by other passages, is not construed as limiting herein.
209, the crash info in the second internal memory is stored in nonvolatile memory.
After the crash info of the first hardware system by the 2nd CPU is sent in the second internal memory, the crash info in this second internal memory, by the controller of the nonvolatile memory in the 2nd CPU, is stored in this nonvolatile memory by server.
In the embodiment of the present invention, the crash info of the first hardware system got by KBOX, this crash info is saved in the first internal memory by server, again by first main memory access of the crash info in this first internal memory between this first internal memory and a CPU, PCIE channel between one CPU and the 2nd CPU, the second main memory access between 2nd CPU and the second internal memory, be sent in the second internal memory, and then by the controller of nonvolatile memory, the crash info in this second internal memory is stored in nonvolatile memory, can make server when without BMC module on the one hand, realize black box function, on the other hand, the possibility reducing crash info and easily lose in transmitting procedure can be played, and improve the transfer efficiency of crash info.
Above in embodiment, server is by the detailed process in crash info mirror image to the second internal memory in the first internal memory, namely after the crash info in the first hardware system got is saved in the first internal memory by server, server is by first main memory access of this crash info in this first internal memory between the first internal memory and a CPU, PCIE channel between one CPU and the 2nd CPU, the second main memory access between 2nd CPU and the second internal memory, be sent in the second internal memory, be described, below to serving first main memory access of this crash info in this first internal memory between the first internal memory and a CPU, PCIE channel between one CPU and the 2nd CPU, the second main memory access between 2nd CPU and the second internal memory, be sent in the second internal memory, further describe, at least comprise two kinds of situations, the first situation is: server by the crash info of the first hardware system from the first internal memory, through the mapping relations of the port of the first internal memory and a CPU, the port of the one CPU and the mapping relations of the second cpu port, the port of the 2nd CPU and the mapping relations of the second internal memory, map in the second internal memory, the second situation is: the crash info of the first hardware system is saved to the first region of memory of the first internal memory by server, again the first region of memory of this first internal memory is sent in the second region of memory of this first internal memory, then by this crash info from the second region of memory of this first internal memory, through the mapping relations of the second region of memory of the first internal memory and the port of a CPU, the port of the one CPU and the mapping relations of the second cpu port, the mapping relations of the port of the 2nd CPU and the first region of memory of the second internal memory, map in the first region of memory of the second internal memory.
Below the first situation is described, refers to Fig. 3, embodiments provide the another kind of crash info storage means for server, specifically comprise:
301, server judges whether the first hardware system meets collapse condition;
Server comprises the first hardware system and the second hardware system, this first hardware system comprises a CPU and the first internal memory, this second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, judge that the mode whether the first hardware system meets collapse condition is, judge whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, as no, then perform step 302; If so, then step 303 is performed.
It should be noted that, in the present embodiment, judge that the mode whether the first hardware system meets collapse condition is, by judging whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, in actual applications, this judges whether the first hardware system meets the mode of collapse condition can also for judge whether the registration table of this first hardware system is lost, or judge in conjunction with two kinds of modes, other judgment mode can also be adopted, as long as meet the crash info triggering acquisition system, concrete judgment mode is not construed as limiting herein.
302, repeat to judge whether the first hardware system meets collapse condition;
When collapse does not occur judgement first hardware system, within the time pre-set, repeat to judge whether this first hardware system collapses.
Be understandable that, this time pre-set can adjust according to the actual needs, as the working time according to hardware system adjusts, when the CPU in hardware system or internal memory use need to run continuously, by short for the tune suitable time of default setting.
303, the crash info of the first hardware system is obtained;
After server electrifying startup, hardware jumps to linux system operation by BIOS, the loading procedure of startup of server KBOX also inserts KBOX in the kernel of a CPU, this KBOX carries out initialization and registers Hook Function to a CPU hardware system, after the collapse of judgement first hardware system, this KBOX obtains crash info by the Hook Function of this registration from this first hardware system.
It should be noted that, in the present embodiment, server inserts KBOX in system, and obtained the crash info of this first hardware system to the Hook Function that the first hardware system is registered by this KBOX, in actual applications, KBOX also can register other functions, as long as meet this function can obtain crash info from system, does not limit herein.
304, crash info is saved to the first internal memory by server;
Get the crash info of the first hardware system at KBOX after, this crash info is saved in the first internal memory.
305, by the crash info in the first internal memory from the first memory-mapped to a CPU;
After being saved in the first internal memory by the crash info of the first hardware system, the crash info in this first internal memory by the mapping relations between this first internal memory and the port of a CPU, maps in a CPU by server from this first internal memory.
It should be noted that, in the present embodiment, crash info in this first internal memory is passed through the mapping relations between this first internal memory and the port of a CPU by server, map in a CPU from this first internal memory, in actual applications, server can also map this crash info by other mapping relations, is not construed as limiting herein.
306, crash info in a CPU is mapped to the 2nd CPU from a CPU;
After being mapped to by the crash info of the first hardware system in a CPU, this crash info is passed through mapping relations between the port of a CPU and the port of the 2nd CPU by server, maps in the 2nd CPU from a CPU.
It should be noted that, in the present embodiment, this crash info is passed through mapping relations between the port of a CPU and the port of the 2nd CPU by server, map in the 2nd CPU from a CPU, this crash info can also be mapped in the 2nd CPU by other mapping relations by server, is not construed as limiting herein.
307, the crash info in the 2nd CPU is mapped in the second internal memory;
After mapping to the 2nd CPU by the crash info of the first hardware system from a CPU, the crash info in the 2nd CPU is passed through the mapping relations between the port of the 2nd CPU and the second internal memory by server, maps in the second internal memory from the 2nd CPU.
It should be noted that, in the present embodiment, crash info in 2nd CPU is passed through the mapping relations between the port of the 2nd CPU and the second internal memory by server, map to from the 2nd CPU in the second internal memory, in reality is answered, server can also map this crash info by other mapping relations, is not construed as limiting herein.
308, the crash info in the second internal memory is stored in nonvolatile memory.
After the crash info of the first hardware system by the 2nd CPU is sent in the second internal memory, the crash info in this second internal memory, by the controller of the nonvolatile memory in the 2nd CPU, is stored in this nonvolatile memory by server.
In the embodiment of the present invention, server passes through crash info from this first internal memory, through the first internal memory with the mapping relations of the port of a CPU, the port of a CPU and the mapping relations of the second cpu port, the port of the 2nd CPU and the mapping relations of the second internal memory, map in the second internal memory, when can to make on the one hand in server without BMC module, realize black box function; On the other hand, in guarantee crash info transfer efficiency simultaneously, transmit crash info by the mode mapped, the effect of the accuracy improving transmission crash info can be played.
Embodiment is described the first situation above, is described below, refers to Fig. 4 to the second situation, and the another kind that the embodiment of the present invention provides, for the crash info storage means of server, specifically comprises:
401, server judges whether the first hardware system meets collapse condition;
Server comprises the first hardware system and the second hardware system, this first hardware system comprises a CPU and the first internal memory, this second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, judge that the mode whether the first hardware system meets collapse condition is, judge whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, as no, then perform step 402; If so, then step 403 is performed.
It should be noted that, in the present embodiment, judge that the mode whether the first hardware system meets collapse condition is, by judging whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, in actual applications, this judges whether the first hardware system meets the mode of collapse condition can also for judge whether the registration table of this first hardware system is lost, or judge in conjunction with two kinds of modes, other judgment mode can also be adopted, as long as meet the crash info triggering acquisition system, concrete judgment mode is not construed as limiting herein.
402, repeat to judge whether the first hardware system meets collapse condition;
When collapse does not occur judgement first hardware system, within the time pre-set, repeat to judge whether this first hardware system collapses.
Be understandable that, this time pre-set can adjust according to the actual needs, as the working time according to hardware system adjusts, when the CPU in hardware system or internal memory use need to run continuously, by short for the tune suitable time of default setting.
403, the crash info of the first hardware system is obtained;
After server electrifying startup, hardware jumps to linux system operation by BIOS, the loading procedure of startup of server KBOX also inserts KBOX in the kernel of a CPU, this KBOX carries out initialization and registers Hook Function to a CPU hardware system, after the collapse of judgement first hardware system, this KBOX obtains crash info by the Hook Function of this registration from this first hardware system.
It should be noted that, in the present embodiment, server inserts KBOX in system, and obtained the crash info of this first hardware system to the Hook Function that the first hardware system is registered by this KBOX, in actual applications, KBOX also can register other functions, as long as meet this function can obtain crash info from system, does not limit herein.
404, crash info is saved in the first region of memory of the first internal memory by server;
First internal memory comprises N number of region of memory, and the second internal memory comprises M region of memory, wherein M and N be greater than 1 positive integer, get the crash info of the first hardware system at KBOX after, this crash info is saved in the first region of memory of the first internal memory.
405, the crash info in the first region of memory of the first internal memory is sent in the second region of memory of the first internal memory by server;
After in the first region of memory crash info of the first hardware system being saved to the first internal memory, the crash info in the first region of memory of this first internal memory is sent in the second region of memory of this first internal memory by server.
406, the crash info in the second region of memory of the first internal memory is mapped in a CPU;
After in the second region of memory crash info of the first hardware system being sent to the first internal memory, crash info in second region of memory of this first internal memory is passed through the mapping relations between the second region of memory of this first internal memory and the port of a CPU by server, maps in a CPU from the second region of memory of this first internal memory.
It should be noted that, in the present embodiment, crash info in second region of memory of this first internal memory is passed through the mapping relations between the second region of memory of this first internal memory and the port of a CPU by server, map in a CPU from the second region of memory of this first internal memory, in actual applications, server can also map this crash info by other mapping relations, is not construed as limiting herein.
407, crash info in a CPU is mapped to the 2nd CPU from a CPU;
After being mapped to by the crash info of the first hardware system in a CPU, this crash info is passed through mapping relations between the port of a CPU and the port of the 2nd CPU by server, is mapped in the 2nd CPU by the crash info in a CPU.
It should be noted that, in the present embodiment, this crash info is passed through mapping relations between the port of a CPU and the port of the 2nd CPU by server, crash info in one CPU is mapped in the 2nd CPU, in actual applications, this crash info can also be mapped in the 2nd CPU by other mapping relations by server, is not construed as limiting herein.
408, the crash info in the 2nd CPU is mapped in the first region of memory of the second internal memory;
After the crash info of the first hardware system is mapped to the 2nd CPU from a CPU, crash info in 2nd CPU is passed through the mapping relations between the port of the 2nd CPU and the first region of memory of the second internal memory by server, maps in the first region of memory of the second internal memory from the 2nd CPU.
It should be noted that, in the present embodiment, crash info in 2nd CPU is passed through the mapping relations between the port of the 2nd CPU and the first region of memory of the second internal memory by server, map to from the 2nd CPU in the first region of memory of the second internal memory, in reality is answered, server can also map this crash info by other mapping relations, is not construed as limiting herein.
409, the crash info in the second internal memory is stored in nonvolatile memory.
After the crash info of the first hardware system by the 2nd CPU is sent in the second internal memory, the crash info in this second internal memory, by the controller of the nonvolatile memory in the 2nd CPU, is stored in this nonvolatile memory by server.
In the embodiment of the present invention, server is by being saved to the first region of memory of the first internal memory by the crash info of the first hardware system, again the first region of memory of this first internal memory is sent in the second region of memory of this first internal memory, then by this crash info from the second region of memory of this first internal memory, through the mapping relations of the second region of memory of the first internal memory and the port of a CPU, the port of the one CPU and the mapping relations of the second cpu port, the mapping relations of the port of the 2nd CPU and the first region of memory of the second internal memory, map in the first region of memory of the second internal memory, when can to make on the one hand in server without BMC module, realize black box function, on the other hand, while guarantee crash info transfer efficiency, first crash info is saved in the first region of memory of the first internal memory, then transmits crash info by the first region of memory by the mode mapped, the effect of the accuracy improving transmission crash info can be played.
Above in embodiment, crash info is passed through mirror-image channels, from the first memory mirror to the second internal memory, in actual applications, can also, by crash info by ethernet channel, be sent in the second internal memory from the first internal memory, below another crash info storage means of the embodiment of the present invention is described, refer to Fig. 5, the storage means of another crash info that the embodiment of the present invention provides, specifically comprises:
501, server judges whether the first hardware system meets collapse condition;
Server comprises the first hardware system and the second hardware system, this first hardware system comprises a CPU and the first internal memory, this second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, judge that the mode whether the first hardware system meets collapse condition is, judge whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, as no, then perform step 502; If so, then step 503 is performed.
It should be noted that, in the present embodiment, judge that the mode whether the first hardware system meets collapse condition is, by judging whether the number percent that the first internal memory use amount of the first hardware system accounts for this first total amount of memory exceedes threshold value, in actual applications, this judges whether the first hardware system meets the mode of collapse condition can also for judge whether the registration table of this first hardware system is lost, or judge in conjunction with two kinds of modes, other judgment mode can also be adopted, as long as meet the crash info triggering acquisition system, concrete judgment mode is not construed as limiting herein.
502, repeat to judge whether the first hardware system meets collapse condition;
When collapse does not occur judgement first hardware system, within the time pre-set, repeat to judge whether this first hardware system collapses.
Be understandable that, this time pre-set can adjust according to the actual needs, as the working time according to hardware system adjusts, when the CPU in hardware system or internal memory use need to run continuously, by short for the tune suitable time of default setting.
503, the crash info of the first hardware system is obtained;
After server electrifying startup, hardware jumps to linux system operation by BIOS, the loading procedure of startup of server KBOX also inserts KBOX in the kernel of a CPU, this KBOX carries out initialization and registers Hook Function to a CPU hardware system, after the collapse of judgement first hardware system, this KBOX obtains crash info by the Hook Function of this registration from this first hardware system.
It should be noted that, in the present embodiment, server inserts KBOX in system, and obtained the crash info of this first hardware system to the Hook Function that the first hardware system is registered by this KBOX, in actual applications, KBOX also can register other functions, as long as meet this function can obtain crash info from system, does not limit herein.
504, crash info is saved to the first internal memory by server;
Get the crash info of the first hardware system at KBOX after, this crash info is saved in the first internal memory.
505, the crash info in the first internal memory is sent in the second internal memory by the ethernet channel between a CPU and the 2nd CPU;
After crash info being saved in the first internal memory, this crash info is sent to a CPU from the first main memory access between the first internal memory and a CPU, this crash info in one CPU is sent in the 2nd CPU by the ethernet channel between a CPU and the 2nd CPU, again this crash info in the 2nd CPU is passed through the second main memory access between the 2nd CPU and the second internal memory, be sent in the second internal memory;
It should be noted that, in the present embodiment, serve and the crash info in the first internal memory is sent in the second internal memory by the ethernet channel between a CPU and the 2nd CPU, in reality is answered, server can also send this crash info by other passages, is not construed as limiting herein.
506, the crash info in the second internal memory is stored in nonvolatile memory.
After the crash info of the first hardware system by the 2nd CPU is sent in the second internal memory, the crash info in this second internal memory, by the controller of the nonvolatile memory in the 2nd CPU, is stored in this nonvolatile memory by server.
In the embodiment of the present invention, by when the first hardware system collapses, server obtains the crash info in the first hardware system, this crash info is saved in the first internal memory, again the crash info in this first internal memory is sent in the second internal memory by ethernet channel, and then be saved in the non-volatile memories of the second hardware system by the crash info in this second internal memory, thus during in the server without BMC module, realize black box function.
For ease of understanding, be described in detail the method that the crash info described in above-described embodiment stores below in conjunction with a practical application scene, refer to Fig. 5, in the embodiment of the present invention, another embodiment of crash info storage means comprises:
601, KBOX is to the first hardware system registration Hook Function;
Server comprises the first hardware system and the second hardware system, this first hardware system comprises CPUm and DDR1, this second hardware system comprises CPUn, DDR2 and hard disk, after electricity starts on the server, this server jumps to linux system by BIOS system and runs, the loading procedure of startup of server KBOX, and KBOX is inserted in the kernel of CPUm, this KBOX carries out initialization, and to the registration Hook Function of the first hardware system, this Hook Function can be used for the crash info of acquisition system.
In the present embodiment, KBOX is to the first hardware system registration Hook Function, and be understandable that, in actual applications, KBOX can also register other functions, may be used for obtaining system crash information, be not construed as limiting herein as long as meet this function.
602, server sets up the mapping relations of the mapping relations of the address space of the address space of DDR1 and the port of CPUm, the address space of the port of CPUm and the address space of the address space of the port of CPUn and the port of CPUn and the address space of DDR2;
Server the detection address space of DDR1, the address space of the port of CPUm, the address space of the port of CPUn and the address space of DDR2, and by the mapping relations of address space of the port of the address space and CPUm of setting up DDR1, the address space of the port of CPUm and the mapping relations of address space of the port of CPUn and the mapping relations of the address space of the port of CPUn and the address space of DDR2.
In the present embodiment, set up the mapping relations of the address space of the address space of DDR1 and the port of CPUm, the mapping relations of the address space of the address space of the address space of the port of CPUm and the port of CPUn and the port of CPUn and the address space of DDR2, as a kind of preferred version of the embodiment of the present invention, in actual applications, the mapping relations of the address space of the address space of DDR1 and the port of CPUm, the mapping relations of the address space of the address space of the address space of the port of CPUm and the port of CPUn and the port of CPUn and the address space of DDR2 can be set up in advance, be not construed as limiting herein.
603, judge that whether the temperature of CPUm is more than 70 DEG C;
Carry out periodic detection at interval of 1 second temperature to the CPUm in the first hardware system, if when the temperature of CPUm being detected more than 70 DEG C, then determine that the CPUm in the first hardware system of server meets collapse condition, if not, then perform step 404.
In the present embodiment, server detected CPUm temperature every 1 second, was understandable that, in actual applications, the time of periodic detection can set according to actual needs, is not construed as limiting herein;
Be understandable that, in the present embodiment, be as determining the reference temperature whether CPUm collapses using the temperature of CPUm more than 70 DEG C, in reality is answered, this temperature also can need to set according to the time, as when environment temperature is too high, 65 DEG C can be set as with reference to temperature, be not construed as limiting herein;
Be understandable that, in actual applications, judge whether the first hardware system meets the condition of collapsing and can also have more multimode, such as, by judging whether the memory usage of this first hardware system exceedes threshold value etc., is not construed as limiting herein.
604, repeat to judge that whether the temperature of CPUm is more than 70 DEG C;
If when judging the temperature of CPUm lower than 70 DEG C, then continued to detect the temperature of CPUm every 1 second, thus repeat to judge whether CPUm meets collapse condition.
605, the crash info before KBOX acquisition CPUm collapse;
When determining the temperature of CPUm more than 70 DEG C, KBOX obtains the crash info in this first hardware system before CPUm collapse by the Hook Function of registration.
It should be noted that, the crash info in this CPUm is a kind of crash info of CPUm, is only exemplarily described with it herein, is specifically not construed as limiting herein.
606, the crash info in the CPUm got is saved to DDR1;
Get the crash info in CPUm at KBOX after, the crash info got is saved in DDR1.
It should be noted that, in the embodiment of the present invention, the crash info got is saved in DDR1, actual should in, this DDR1 comprises N number of region of memory, this crash info can be saved in a region of memory in DDR1, be not construed as limiting herein.
607, the crash info in DDR1 is mapped in the port of CPUm;
After the crash info got is saved in DDR1, the crash info in this DDR1 is passed through the mapping relations of the address space of the address space of DDR1 and the port of CPUm, map in the port of CPUm.
It should be noted that, in the present embodiment, crash info in this DDR1 passes through the mapping relations of the address space of the address space of DDR1 and the port of CPUm, map in the port of CPUm, actual should in, crash info in this DDR1 can be passed through the mapping relations of the address space of the port of region of memory address space and CPUm in DDR1, map in the port of CPUm, be not construed as limiting herein.
608, the crash info in the port of CPUm is mapped in the port of CPUn;
After in the port crash info in DDR1 being mapped to CPUm, by the mapping relations of the address space of the address space of the port of CPUm and the port of CPUn, this crash info is mapped in CPUn port.
It should be noted that, in the present embodiment, by the mapping relations of the address space of the address space of the port of CPUm and the port of CPUn, this crash info is mapped in CPUn port, actual should in, can also this crash info be transferred in the port of CPUn other modes, be not construed as limiting herein.
609, the crash info in the port of CPUn is mapped in DDR2;
After in the port crash info in the port of CPUm being mapped to CPUn, by the mapping relations of the address space of the port of CPUn and the address space of DDR2, this crash info in the port of CPUn is mapped in DDR2.
It should be noted that, in the present embodiment, by the mapping relations of the address space of the port of CPUn and the address space of DDR2, this crash info in the port of CPUn is mapped in DDR2, in actual applications, can also the address space of port of CPUn and the mapping relations of the address space of DDR2 region of memory be passed through, this crash info in the port of CPUn be mapped in DDR2, is not construed as limiting herein.
610, the crash info in DDR2 is saved in hard disk;
After the crash info in the port of CPUn is mapped in DDR2, this crash info is saved in hard disk by DDR2 controller.
It should be noted that, in the present embodiment, hard disk, as the one in nonvolatile memory, is only exemplarily described with it herein, is specifically not construed as limiting herein.
Be described the method that the crash info in embodiments of the invention stores above, be described a kind of server in embodiments of the invention below, refer to Fig. 7, in the embodiment of the present invention, an embodiment of server comprises:
Acquiring unit 701, for being saved in described first internal memory by described crash info;
Storage unit 702, for by the described crash info mirror image in described first internal memory in described second internal memory;
Mirror image unit 703, for by the described crash info mirror image in described first internal memory in described second internal memory;
Storage unit 704, for being stored to the crash info in described second internal memory in described nonvolatile memory.
In the embodiment of the present invention, by when the first hardware system collapses, acquiring unit 701 obtains the crash info in the first hardware system, this crash info is saved in the first internal memory by storage unit 702, mirror image unit 703 is again by crash info mirror image to the second internal memory in this first internal memory, then the crash info in this second internal memory is saved in the non-volatile memories of the second hardware system by storage unit 704 again, thus during in the server without BMC module, realizes black box function.
Above in embodiment, by mirror image unit by this crash info mirror image to the second internal memory in the first internal memory, actual should in this mirror image unit specifically by the first sending module, the second sending module and the 3rd sending module, by first main memory access of the crash info in this first internal memory between the first internal memory and a CPU, the PCIE channel between a CPU and the 2nd CPU, the second main memory access between the 2nd CPU and the second internal memory, be sent in the second internal memory.
Below server another kind of in the embodiment of the present invention is described, refers to Fig. 8, the another kind of server that the embodiment of the present invention provides, specifically comprise:
Acquiring unit 801, for being saved in described first internal memory by described crash info;
Storage unit 802, for by the described crash info mirror image in described first internal memory in described second internal memory;
Set up unit 803, for setting up the mirror-image channels of described first internal memory to described second internal memory, described mirror-image channels is used for, and the described crash info preserved in described first internal memory, is mirrored to described second internal memory through a described CPU, described 2nd CPU;
Mirror image unit 804, for by the described crash info mirror image in described first internal memory in described second internal memory;
Wherein this mirror image unit 804 comprises the first sending module 8041, second sending module 8042 and the 3rd sending module 8043,
First sending module 8041, for being sent in a described CPU by the crash info in described first internal memory by the first main memory access between described first internal memory and a described CPU;
Second sending module 8042, for being sent in described 2nd CPU by the crash info in a described CPU by the PCIE channel between a described CPU and described 2nd CPU;
3rd sending module 8043, for being sent to the crash info in described 2nd CPU in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory.
Storage unit 704, for being stored to the crash info in described second internal memory in described nonvolatile memory.
In the embodiment of the present invention, the crash info of the first hardware system got by acquiring unit 801, this crash info is saved in the first internal memory by storage unit 802, first sending module 8041, second sending module 8042 and the 3rd sending module 8043, again by first main memory access of the crash info in this first internal memory between this first internal memory and a CPU, PCIE channel between one CPU and the 2nd CPU, the second main memory access between 2nd CPU and the second internal memory, be sent in the second internal memory, then the crash info in this second internal memory is stored in nonvolatile memory by storage unit 805, can make server when without BMC module on the one hand, realize black box function, on the other hand, the possibility reducing crash info and easily lose in transmitting procedure can be played, and improve the transfer efficiency of crash info.
Above in embodiment, first sending module comprises the first mapping submodule or sends submodule and the second mapping submodule, second sending module comprises the second mapping submodule or the 5th mapping submodule, 3rd sending module comprises the 3rd mapping submodule or the 6th and reflects son and penetrate module, is described respectively below:
One, the first transmitting element comprises the first mapping submodule, and the second sending module comprises the second mapping submodule, and the 3rd sending module comprises the 3rd mapping submodule, refers to Fig. 9, and another server that the embodiment of the present invention provides comprises:
Acquiring unit 901, for being saved in described first internal memory by described crash info;
Storage unit 902, for by the described crash info mirror image in described first internal memory in described second internal memory;
Mirror image unit 903, for by the described crash info mirror image in described first internal memory in described second internal memory;
Wherein this mirror image unit 903 comprises the first sending module 9031, second sending module 9032 and the 3rd sending module 9033,
First sending module 9031, for being sent in a described CPU by the crash info in described first internal memory by the first main memory access between described first internal memory and a described CPU;
Second sending module 9032, for being sent in described 2nd CPU by the crash info in a described CPU by the PCIE channel between a described CPU and described 2nd CPU;
3rd sending module 9033, for being sent to the crash info in described 2nd CPU in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory.
Wherein, this first sending module 9031 comprises the first mapping submodule 90311, and this second sending module 9032 comprises the second mapping submodule the 90321, three sending module 9033 and comprises the 3rd mapping submodule 90331,
First mapping submodule 90311, for by the described crash info in described first internal memory, map to first port with described first internal memory with mapping relations, described first port belongs to a described CPU;
Described second mapping submodule 90321, for by the described crash info in a described CPU, map to second port with a described CPU with mapping relations, described second port belongs in described 2nd CPU;
Described 3rd mapping submodule 90331, for by the described crash info in described 2nd CPU, maps to and has in the second internal memory of mapping relations with described 2nd CPU.
Storage unit 704, for being stored to the crash info in described second internal memory in described nonvolatile memory.
Two, the first transmitting element comprises transmission submodule and the 4th mapping submodule, and the second sending module comprises the 5th mapping submodule, and the 3rd sending module comprises the 6th mapping submodule, refers to Figure 10, and another server that the embodiment of the present invention provides comprises:
Acquiring unit 1001, for being saved in described first internal memory by described crash info;
Storage unit 1002, for by the described crash info mirror image in described first internal memory in described second internal memory;
Wherein, described storage unit 1002 comprise preserve module 10021, described preservation module 10021, for described crash info being saved in the first region of memory in described N number of region of memory, described N be greater than 1 positive integer;
Mirror image unit 1003, for by the described crash info mirror image in described first internal memory in described second internal memory;
Wherein this mirror image unit 1003 comprises the first sending module 10031, second sending module 10032 and the 3rd sending module 10033,
First sending module 10031, for being sent in a described CPU by the crash info in described first internal memory by the first main memory access between described first internal memory and a described CPU;
Second sending module 10032, for being sent in described 2nd CPU by the crash info in a described CPU by the PCIE channel between a described CPU and described 2nd CPU;
3rd sending module 10033, for being sent in described second internal memory by the crash info in described 2nd CPU by the second main memory access between described 2nd CPU and described second internal memory;
Wherein, this first sending module 10031 comprises transmission submodule 100311 and the first mapping submodule 100312, and this second sending module 10032 comprises the second mapping submodule the 100321, three sending module 10033 and comprises the 3rd mapping submodule 100331,
Send submodule 100311, for the described crash info for sending to the second region of memory of described first internal memory in the first region of memory of described first internal memory;
4th mapping submodule 100312, maps in the described CPU belonging to the 3rd port with the second region of memory of described first internal memory with mapping relations by the described crash info in the second region of memory of described first internal memory;
Described 5th mapping submodule 100321, for mapping in described 2nd CPU belonging to the 4th end with described 3rd port with mapping relations by the described crash info in a described CPU;
Described 6th mapping submodule 90331, has in first region of memory of described second internal memory of mapping relations for being mapped to by the described crash info in described 2nd CPU with described 4th end;
Storage unit 1004, for being stored to the crash info in described second internal memory in described nonvolatile memory.
In the embodiment of the present invention, preserve module 1001 by the crash info of the first hardware system being saved to the first region of memory of the first internal memory, sending submodule 100311 is sent in the second region of memory of this first internal memory by the first region of memory of this first internal memory again, then the 4th mapping submodule 100312, 5th mapping submodule 100321 and the 6th mapping submodule 90331, by this crash info from the second region of memory of this first internal memory, through the mapping relations of the second region of memory of the first internal memory and the port of a CPU, the port of the one CPU and the mapping relations of the second cpu port, the mapping relations of the port of the 2nd CPU and the first region of memory of the second internal memory, map in the first region of memory of the second internal memory, when can to make on the one hand in server without BMC module, realize black box function, on the other hand, while guarantee crash info transfer efficiency, first crash info is saved in the first region of memory of the first internal memory, then transmits crash info by the first region of memory by the mode mapped, the effect of the accuracy improving transmission crash info can be played.
Above in embodiment, by mirror image unit by crash info from the first memory mirror to the second internal memory, in actual applications, by transmitting element, this crash info can also be sent in the second internal memory from the first internal memory, below another server of the embodiment of the present invention is described, refer to Figure 11, another server that the embodiment of the present invention provides, specifically comprise:
Acquiring unit 1101, for when described first hardware system meets collapse condition, obtains the crash info of described first hardware system, and is saved to by described crash info in described first internal memory;
Storage unit 1102, for being saved in described first internal memory by described crash info;
Transmitting element 1103, for by the ethernet channel between a described CPU and described 2nd CPU, sends the described crash info in described first internal memory to described second internal memory;
Storage unit 1104, for being stored to the crash info in described second internal memory in described nonvolatile memory.
In the embodiment of the present invention, by when the first hardware system collapses, acquiring unit 1101 obtains the crash info in the first hardware system, this crash info is saved in the first internal memory by storage unit 1102, crash info in this first internal memory is sent in the second internal memory by ethernet channel by transmitting element 1103 again, then 1104 again the crash info in this second internal memory is saved in the non-volatile memories of the second hardware system, thus during in the server without BMC module, realize black box function.
For ease of understanding, be described in detail the server described in above-described embodiment below in conjunction with a practical application scene, refer to Figure 12, in the embodiment of the present invention, another embodiment of server comprises:
First hardware system 1201, second hardware system 1202 and the 3rd hardware system 1203, this first hardware system 1201 comprises a CPU12011, the first internal memory 12012, this second hardware system 1202 comprises the 2nd CPU12021, the second internal memory 12022 and hard disk the 12023, three hardware system 1203 and comprises the 3rd CPU12031.
The server that the embodiment of the present invention relates to can have than more or less parts illustrated in fig. 12, two or more parts can be combined, or can have the configuration of different parts or arrange, all parts can realize in the combination comprising the hardware of one or more signal transacting and/or special IC, software or hardware and software.
3rd CPU12011, for the mapping relations of the mapping relations of address space of the port of the address space and CPUm of setting up DDR1, the address space of the port of CPUm and the address space of the address space of the port of CPUn and the port of CPUn and the address space of DDR2;
One CPU12011, for judging that whether the temperature of self is more than 85 DEG C, specifically for carrying out periodic detection at interval of 1 second temperature to self, and judges that whether the temperature of self is more than 70 DEG C;
In the present embodiment, one CPU12011 detected own temperature every 1 second, was understandable that, in actual applications, the time of periodic detection can set according to actual needs, be not construed as limiting herein, be understandable that, in the present embodiment, one CPU12011 is by judging own temperature to determine whether the condition meeting collapse, actual should in can also have more multimode, such as, by judging whether the utilization rate of this internal memory 12012 exceedes threshold value etc., is not construed as limiting herein.
One CPU12011, also for when judging own temperature more than 70 DEG C, obtains the crash info before collapse by KBOX;
It should be noted that, this crash info is a kind of crash info, is only exemplarily described with it herein, is specifically not construed as limiting herein.
One CPU12011, also for being saved in by the crash info got in the first internal memory 12012;
It should be noted that, in the embodiment of the present invention, the crash info got is saved in the first internal memory 12012 by the one CPU12011, actual should in, this first internal memory 12012 comprises N number of region of memory, this crash info can be saved in a region of memory in the first internal memory 12012, be not construed as limiting herein.
One CPU12011, for crash info is mapped in the port of a CPU12011 from the first internal memory 12012, specifically for, this crash info is passed through the mapping relations of the address space of the address space of the first internal memory 12012 and the port of a CPU12011, map in the port of the first internal memory 12012;
It should be noted that, in the present embodiment, crash info is passed through the mapping relations of the address space of the address space of the first internal memory 12012 and the port of a CPU12011 by this first internal memory 12012, map in the port of a CPU12011, actual should in, this crash info can be passed through the mapping relations of the address space of the port of region of memory address space and a CPU12011 in the first internal memory 12012, map in the port of a CPU12011, be not construed as limiting herein.
One CPU12011, also for the crash info in the port of a CPU12011 being mapped in the port of the 2nd CPU12021, specifically for the mapping relations by the address space of port of a CPU12011 and the address space of the port of the 2nd CPU12021, this crash info is mapped in the 2nd CPU12021 port.
It should be noted that, in the present embodiment, one CPU12011 passes through the mapping relations of the address space of port of a CPU12011 and the address space of the port of the 2nd CPU12021, this crash info is mapped in the 2nd CPU12021 port, actual should in, this crash info can also be transferred in the port of the 2nd CPU12021 other modes, be not construed as limiting herein.
2nd CPU12021, for mapping in the second internal memory 12022 by the crash info in the port of the 2nd CPU12021;
It should be noted that, in the present embodiment, 2nd CPU12021 is by the address space of port of the 2nd CPU12021 and the mapping relations of the address space of the second internal memory 12022, this crash info in the port of the 2nd CPU12021 is mapped in the second internal memory 12022, in actual applications, the address space of port of the second internal memory 12022 and the mapping relations of the address space of the second internal memory 12022 region of memory can also be passed through, this crash info in the port of the 2nd CPU12021 is mapped in the second internal memory 12022 internal memory, be not construed as limiting herein.
2nd CPU12021, also for being saved in hard disk 12023 by the crash info in the second internal memory 12022, specifically for being saved to this crash info in hard disk 12023 by the second Memory Controller Hub.
It should be noted that, in the present embodiment, hard disk 12023, as the one in nonvolatile memory, is only exemplarily described with it herein, is specifically not construed as limiting herein.
Those skilled in the art can be well understood to, and for convenience and simplicity of description, the system of foregoing description, the specific works process of device and unit, with reference to the corresponding process in preceding method embodiment, can not repeat them here.
In several embodiments that the application provides, should be understood that, disclosed system, apparatus and method, can realize by another way.Such as, device embodiment described above is only schematic, such as, the division of this unit, be only a kind of logic function to divide, actual can have other dividing mode when realizing, such as multiple unit or assembly can in conjunction with or another system can be integrated into, or some features can be ignored, or do not perform.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, and the indirect coupling of device or unit or communication connection can be electrical, machinery or other form.
This or can may not be as the unit that separating component illustrates and physically separates, and the parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of unit wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, also can be that the independent physics of unit exists, also can two or more unit in a unit integrated.Above-mentioned integrated unit both can adopt the form of hardware to realize, and the form of SFU software functional unit also can be adopted to realize.
If this integrated unit using the form of SFU software functional unit realize and as independently production marketing or use time, can be stored in a computer read/write memory medium.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words or all or part of of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprising some instructions in order to make a computer equipment (can be personal computer, server, or the network equipment etc.) perform all or part of step of each embodiment the method for the present invention.And aforesaid storage medium comprises: USB flash disk, portable hard drive, ROM (read-only memory) (ROM, Read-OnlyMemory), random access memory (RAM, RandomAccessMemory), magnetic disc or CD etc. various can be program code stored medium.
More than be somebody's turn to do, above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.

Claims (12)

1. the crash info storage means for server, it is characterized in that, described server comprises the first hardware system and the second hardware system, described first hardware system comprises a CPU and the first internal memory, described second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, and described method comprises:
When described first hardware system meets collapse condition, described server obtains the crash info of described first hardware system, and is saved to by described crash info in described first internal memory;
Described server is by the described crash info mirror image in described first internal memory to described second internal memory;
Crash info in described second internal memory is stored in described nonvolatile memory by described server.
2. method according to claim 1, is characterized in that, the described crash info mirror image in described first internal memory to before in described second internal memory, also comprises by described server:
By mapping relations, set up the mirror-image channels of described first internal memory to described second internal memory, described mirror-image channels is used for, and the data of preserving in described first internal memory, is mirrored to described second internal memory through a described CPU, described 2nd CPU.
3. method according to claim 1 and 2, is characterized in that, described server, by the described crash info mirror image in described first internal memory to described second internal memory, comprising:
Crash info in described first internal memory is sent in a described CPU by the first main memory access between described first internal memory and a described CPU by described server;
Crash info in a described CPU is sent in described 2nd CPU by the PCIE channel between a described CPU and described 2nd CPU by described server;
Crash info in described 2nd CPU is sent in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory by described server.
4. method according to claim 3, it is characterized in that, crash info in described first internal memory is sent in a described CPU by the first main memory access between described first internal memory and a described CPU by described server, crash info in a described CPU is sent in described 2nd CPU by the PCIE channel between a described CPU and described 2nd CPU by described server, crash info in described 2nd CPU is sent in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory by described server, comprise:
Described server, by the described crash info in described first internal memory, maps to first port with described first internal memory with mapping relations, and described first port belongs to a described CPU;
Described server is by the described crash info in a described CPU, and map to second port with a described CPU with mapping relations, described second port belongs to described 2nd CPU;
Described server, by the described crash info in described 2nd CPU, maps to and has in the second internal memory of mapping relations with described 2nd CPU.
5. method according to claim 3, is characterized in that, described first internal memory comprises N number of region of memory;
Described crash info is saved to described first internal memory and comprises by described server,
Described crash info is saved in the first region of memory in described N number of region of memory by described server, described N be greater than 1 positive integer;
Crash info in described first internal memory is sent in a described CPU by the first main memory access between described first internal memory and a described CPU by described server, crash info in a described CPU is sent in described 2nd CPU by the PCIE channel between a described CPU and described 2nd CPU by described server, crash info in described 2nd CPU is sent in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory by described server, comprise
Described server is to the described crash info in the first region of memory of described first internal memory of the second region of memory transmission of described first internal memory;
Described crash info in second region of memory of described first internal memory maps in the described CPU belonging to the 3rd port with the second region of memory of described first internal memory with mapping relations by described server;
Described crash info in a described CPU is mapped to the 4th port with described 3rd port with mapping relations by described server, described 2nd CPU that described 4th port belongs to;
Described crash info in described 2nd CPU maps to by described server to be had in first region of memory of described second internal memory of mapping relations with described 4th port.
6. the crash info storage means for server, it is characterized in that, described server comprises the first hardware system and the second hardware system, described first hardware system comprises a CPU and the first internal memory, described second hardware system comprises the 2nd CPU, the second internal memory and nonvolatile memory, and described method comprises:
When described first hardware system meets collapse condition, described server obtains the crash info of described first hardware system, and is saved to by described crash info in described first internal memory;
Described server, by the ethernet channel between a described CPU and described 2nd CPU, sends the described crash info in described first internal memory to described second internal memory;
Crash info in described second internal memory is stored in described nonvolatile memory by described server.
7. a server, is characterized in that, comprising:
Acquiring unit, for when described first hardware system meets collapse condition, obtains the crash info of described first hardware system;
Storage unit, for being saved in described first internal memory by described crash info;
Mirror image unit, for by the described crash info mirror image in described first internal memory in described second internal memory;
Storage unit, for being stored to the crash info in described second internal memory in described nonvolatile memory.
8. server according to claim 7, is characterized in that, also comprises:
Set up unit, for setting up the mirror-image channels of described first internal memory to described second internal memory, described mirror-image channels is used for, and the described crash info preserved in described first internal memory, is mirrored to described second internal memory through a described CPU, described 2nd CPU.
9. the server according to claim 7 or 8, is characterized in that, described mirror image unit comprises:
First sending module, for being sent in a described CPU by the crash info in described first internal memory by the first main memory access between described first internal memory and a described CPU;
Second sending module, for being sent in described 2nd CPU by the crash info in a described CPU by the PCIE channel between a described CPU and described 2nd CPU;
3rd sending module, for being sent to the crash info in described 2nd CPU in described second internal memory by the second main memory access between described 2nd CPU and described second internal memory.
10. server according to claim 9, is characterized in that, described first sending module comprises the first mapping submodule, and described second sending module comprises the second mapping submodule, and described 3rd sending module comprises the 3rd mapping submodule;
Described first mapping submodule, for by the described crash info in described first internal memory, map to first port with described first internal memory with mapping relations, described first port belongs to a described CPU;
Described second mapping submodule, for by the described crash info in a described CPU, map to second port with a described CPU with mapping relations, described second port belongs in described 2nd CPU;
Described 3rd mapping submodule, for by the described crash info in described 2nd CPU, maps to and has in the second internal memory of mapping relations with described 2nd CPU.
11. servers according to claim 9, is characterized in that, described storage unit comprises preservation module;
Described preservation module, for described crash info being saved in the first region of memory in described N number of region of memory, described N be greater than 1 positive integer;
Described first sending module comprises transmission submodule and the 4th mapping submodule, and described second sending module comprises the 5th mapping submodule, and described 3rd sending module comprises the 6th mapping submodule;
Described transmission submodule, for sending the described crash info in the first region of memory of described first internal memory to the second region of memory of described first internal memory;
4th mapping submodule, maps in the described CPU belonging to the 3rd port with the second region of memory of described first internal memory with mapping relations by the described crash info in the second region of memory of described first internal memory;
5th mapping submodule, for mapping in described 2nd CPU belonging to the 4th end with described 3rd port with mapping relations by the described crash info in a described CPU;
6th mapping submodule, has in first region of memory of described second internal memory of mapping relations with described 4th end for being mapped to by the described crash info in described 2nd CPU.
12. 1 kinds of servers, is characterized in that, comprising:
Acquiring unit, for when described first hardware system meets collapse condition, obtains the crash info of described first hardware system;
Storage unit, for being saved in described first internal memory by described crash info;
Transmitting element, for by the ethernet channel between a described CPU and described 2nd CPU, sends the described crash info in described first internal memory to described second internal memory;
Storage unit, for being stored to the crash info in described second internal memory in described nonvolatile memory.
CN201410486022.3A 2014-09-22 2014-09-22 A kind of method and device for obtaining fault message Active CN105512008B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410486022.3A CN105512008B (en) 2014-09-22 2014-09-22 A kind of method and device for obtaining fault message

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410486022.3A CN105512008B (en) 2014-09-22 2014-09-22 A kind of method and device for obtaining fault message

Publications (2)

Publication Number Publication Date
CN105512008A true CN105512008A (en) 2016-04-20
CN105512008B CN105512008B (en) 2018-05-11

Family

ID=55720009

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410486022.3A Active CN105512008B (en) 2014-09-22 2014-09-22 A kind of method and device for obtaining fault message

Country Status (1)

Country Link
CN (1) CN105512008B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107480052A (en) * 2017-07-21 2017-12-15 广东虹勤通讯技术有限公司 A kind of method and device for positioning bios code when delaying machine
CN108628726A (en) * 2017-03-22 2018-10-09 比亚迪股份有限公司 CPU state information recording method and device
CN112860516A (en) * 2021-02-04 2021-05-28 展讯通信(上海)有限公司 Log saving method, communication device, chip and module equipment

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1725187A (en) * 2005-04-30 2006-01-25 珠海金山软件股份有限公司 Method and device for storing user data on computer when software crashing
CN102063344A (en) * 2009-11-18 2011-05-18 中兴通讯股份有限公司 Method and system for system fault information dump
CN102622322A (en) * 2012-02-24 2012-08-01 华为技术有限公司 Method for acquiring crash information through black box, black box and server
CN103324582A (en) * 2013-06-17 2013-09-25 华为技术有限公司 Memory migration method, memory migration device and equipment
CN103927240A (en) * 2014-05-06 2014-07-16 成都西加云杉科技有限公司 Information dumping method and device answering to software breakdown

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1725187A (en) * 2005-04-30 2006-01-25 珠海金山软件股份有限公司 Method and device for storing user data on computer when software crashing
CN102063344A (en) * 2009-11-18 2011-05-18 中兴通讯股份有限公司 Method and system for system fault information dump
CN102622322A (en) * 2012-02-24 2012-08-01 华为技术有限公司 Method for acquiring crash information through black box, black box and server
CN103324582A (en) * 2013-06-17 2013-09-25 华为技术有限公司 Memory migration method, memory migration device and equipment
CN103927240A (en) * 2014-05-06 2014-07-16 成都西加云杉科技有限公司 Information dumping method and device answering to software breakdown

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108628726A (en) * 2017-03-22 2018-10-09 比亚迪股份有限公司 CPU state information recording method and device
CN108628726B (en) * 2017-03-22 2021-02-23 比亚迪股份有限公司 CPU state information recording method and device
CN107480052A (en) * 2017-07-21 2017-12-15 广东虹勤通讯技术有限公司 A kind of method and device for positioning bios code when delaying machine
CN112860516A (en) * 2021-02-04 2021-05-28 展讯通信(上海)有限公司 Log saving method, communication device, chip and module equipment

Also Published As

Publication number Publication date
CN105512008B (en) 2018-05-11

Similar Documents

Publication Publication Date Title
US9916270B2 (en) Virtual intelligent platform management interface (IPMI) satellite controller and method
EP3304309B1 (en) On-die ecc with error counter and internal address generation
CN101894060B (en) Fault detection method and modular device
CN102446146B (en) Server and method for avoiding bus collision
US11119953B2 (en) Data access method and apparatus for accessing shared cache in a memory access manner
CN109324991B (en) Hot plug device, method, medium and system of PCIE (peripheral component interface express) equipment
US9218259B2 (en) Computing device and method for testing SOL function of a motherboard of the computing device
US10055366B2 (en) Method for data transmission and server for implementing the method
CN101477480A (en) Memory control method, apparatus and memory read-write system
CN116521429B (en) Asset information reporting method and device, storage medium and electronic equipment
CN108647131B (en) Output system of running log
US20140164845A1 (en) Host computer and method for testing sas expanders
CN105512008A (en) Method and device obtaining fault information
TWI537715B (en) Backup power and load discovery
US9791509B2 (en) Monitoring microprocessor interface information for a preset service using an address based filter
CN104484260A (en) Simulation monitoring circuit based on GJB289 bus interface SoC (system on a chip)
CN115543881B (en) PCIE (peripheral component interconnect express) equipment adaptation method, PCIE equipment adaptation system, computer equipment and storage medium
CN115629825B (en) Server and asset information acquisition method, asset information providing method and asset information providing device
CN106030544B (en) Method for detecting memory of computer equipment and computer equipment
CN108985402B (en) RAID card information acquisition method and related device
CN106708445A (en) Link selection method and device
CN103620558A (en) A method for achieving correspondence of physical resource and virtual resource and a basic input output system
CN105354107A (en) Data transmission method and system for NOR Flash
US11687253B2 (en) Configuration of a computational drive
CN103580953A (en) Method and devices for detecting faults

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20211223

Address after: 450046 Floor 9, building 1, Zhengshang Boya Plaza, Longzihu wisdom Island, Zhengdong New Area, Zhengzhou City, Henan Province

Patentee after: Super fusion Digital Technology Co.,Ltd.

Address before: 518129 Bantian HUAWEI headquarters office building, Longgang District, Guangdong, Shenzhen

Patentee before: HUAWEI TECHNOLOGIES Co.,Ltd.