CN105469764A - Array substrate, liquid crystal display panel and electronic equipment - Google Patents

Array substrate, liquid crystal display panel and electronic equipment Download PDF

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Publication number
CN105469764A
CN105469764A CN201511031716.9A CN201511031716A CN105469764A CN 105469764 A CN105469764 A CN 105469764A CN 201511031716 A CN201511031716 A CN 201511031716A CN 105469764 A CN105469764 A CN 105469764A
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China
Prior art keywords
shift register
stage shift
vitual stage
base palte
array base
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Granted
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CN201511031716.9A
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Chinese (zh)
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CN105469764B (en
Inventor
曹兆铿
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Tianma Microelectronics Co Ltd
Shanghai Tianma Microelectronics Co Ltd
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Tianma Microelectronics Co Ltd
Shanghai Tianma Microelectronics Co Ltd
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Priority to CN201511031716.9A priority Critical patent/CN105469764B/en
Publication of CN105469764A publication Critical patent/CN105469764A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/043Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0876Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0286Details of a shift registers arranged for use in a driving circuit
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/08Details of timing specific for flat panels, other than clock recovery
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0219Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses an array substrate, a liquid crystal display panel and electronic equipment. According to the technical scheme of the invention, first shift registers and a virtual-level shift register unit of a gate driving circuit are arranged in a frame area corresponding to a different side of a display area. Particularly, all the first shift registers are arranged in a frame area adjacent to a first side and/or a second side of the display area; and the virtual-level shift register unit is arranged in a frame area adjacent to a fourth side of the display area. Thus, the length of the gate driving circuit in the second direction can be reduced, the length of a single first shift register in the second direction can be added properly in the condition in which the level of the first shift register is certain, the length of the first shift register in the first direction is further shortened, and the width of the frame is thus shortened.

Description

A kind of array base palte, display panels and electronic equipment
Technical field
The present invention relates to image display technology field, in particular, relate to a kind of array base palte, display panels and electronic equipment.
Background technology
LCDs, English is commonly referred to as LCD (LiquidCrystalDisplay), is the one belonging to flat-panel screens.Along with the development of science and technology, no matter LCD, also towards the development of light, thin target, is the advantages such as thin or zero radiation of wide viewing angle display, low power consumption, thickness, user can be allowed to enjoy the visual effect of the best.
In order to reach display object, need to drive the grid of the viewing area in display device.But requiring higher application (such as mobile phone) for the narrow frame of display panel, in order to realize narrow frame, a kind of method adopts gate driver circuit to drive grid. fig. 1for the signal using gate driver circuit to drive grid in prior art figure. as Fig. 1shown in, array base palte comprises viewing area 10 and the rim area around described viewing area, described rim area comprises non-display area 11,12,13,14, gate driver circuit is provided with in non-display area 11, described gate driver circuit comprises the shift register cell 111 of plural serial stage, and the gate line 15 that the lead-out terminal of each shift register cell 111 is corresponding in viewing area 10 exports the drive singal being used for control gate switch.
as Fig. 1shown in, all shift register cells 111 are all positioned at non-display area 11 (also can all be positioned at non-display area 12).The components and parts comprised in each shift register cell 111 are fixed, described shift register 111 takes up space also just fixing in periphery circuit region.Because each shift register 111 is corresponding connected with a gate line 15, so the quantity of shift register cell 111 is identical with the line number of pixel cell 16 in viewing area 10, if each shift register cell 111 area occupied is s, each shift register cell 111 edge in figurelength in Y direction is designated as L1, each shift register cell 111 edge in figurelength in X-direction is designated as L2, and pixel cell 16 is designated as l1 along the length in Y direction, so each shift register cell 111 edge in figurelength L1 in Y direction is less than or equals pixel cell 16 along the length l1 in Y direction, then each shift register cell 111 edge in figurelength in X-direction L 2 = s L 1 ≥ s l 1 .
Known by foregoing description, in existing display panel, each shift register cell 111 edge in figurelength in X-direction limits the further narrow frame of display panels.
Summary of the invention
For solving the problem, the invention provides a kind of array base palte, display panels and electronic equipment, reducing viewing area border width.
For achieving the above object, the invention provides following technical scheme:
A kind of array base palte, this array base palte comprises:
Viewing area and surround the rim area of described viewing area, described viewing area comprises the first side and second side that extend along second direction, along the 3rd side and the four side that first direction extends, wherein first side is relative with second side, and the 3rd side is relative with four side;
The pixel cell of multiple array arrangement, described pixel cell is arranged on described viewing area;
Many the gate lines extended along first direction, for providing gated sweep signal for described pixel cell, and are arranged on described viewing area;
Many the data lines extended along second direction, for providing data-signal for described pixel cell, and are arranged on described viewing area;
Gate driver circuit, described gate driver circuit comprises: multiple cascade and the first shift register connected one to one with described gate line; For providing the vitual stage shift register cell of scanning start signal or scanning pick-off signal for the first shift register; Described gate driver circuit is arranged on described rim area;
Wherein, all first shift registers are arranged on and the adjacent rim area in first side, described viewing area and/or second side;
The rim area adjacent with described 3rd side is provided with driving chip; The rim area adjacent with described four side is provided with described vitual stage shift register cell, and described vitual stage shift register cell is greater than the width of described viewing area at first direction at the extension width of described first direction.
Present invention also offers a kind of display panels, this display panels comprises:
The array base palte be oppositely arranged and color membrane substrates;
Be arranged on the liquid crystal layer between described array base palte and described color membrane substrates;
Wherein, described array base palte is the array base palte described in above-mentioned any one.
Present invention also offers a kind of electronic equipment, this electronic equipment comprises: display panels as described above.
Known by foregoing description, the first shift register of gate driver circuit and vitual stage shift register cell are arranged on frame region corresponding to the different side in viewing area by technical scheme.Concrete, all first shift registers are arranged on and the adjacent rim area in first side, described viewing area and/or second side; Described vitual stage shift register cell is arranged on the adjacent rim area of described viewing area four side.Therefore, gate driver circuit length in a second direction can be reduced, single first shift register length in a second direction suitably can be increased when the first number of shift register stages is certain, and then shorten the first shift register length in a first direction, thus shorten border width.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to use to required in embodiment or description of the prior art below accompanying drawingbe briefly described, apparently, in the following describes accompanying drawingonly embodiments of the invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, can also according to providing accompanying drawingobtain other accompanying drawing.
fig. 1for the signal using gate driver circuit to drive grid in prior art figure;
fig. 2 afor the structural representation of a kind of array base palte that the embodiment of the present application provides figure;
fig. 2 bfor the structural representation of the another kind of array base palte that the embodiment of the present application provides figure;
fig. 3 afor the structural representation of a kind of first shift register that the embodiment of the present application provides figure;
fig. 3 bfor a kind of structural representation pulled up transistor that the embodiment of the present application provides figure;
fig. 4for the structural representation of a kind of display panels that the embodiment of the present application provides figure.
Embodiment
Below in conjunction with in the embodiment of the present invention accompanying drawing, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
as Fig. 1shown in, shift registers all in the gate driver circuit of existing display panel is all arranged in non-display area corresponding to the same side in viewing area 10.For at the certain display panel of Y direction length, in order to more shift register can be arranged in Y direction, then need, by the extension of shift register at different levels in X-direction, to be not easy to the design of narrow frame.
In order to solve the problem, the embodiment of the present application provides a kind of arraying bread board, as Fig. 2 ashown in, this array base palte comprises: the rim area 20 of viewing area 21 and encirclement viewing area 21, viewing area 21 comprises the first side 211 and second side 212 that extend along second direction Y, along the 3rd side 213 and the four side 214 that first direction X extends, wherein first side 211 is relative with second side 212, and the 3rd side 213 is relative with four side 214; The pixel cell of multiple array arrangement, pixel cell is arranged on viewing area 21; Many the gate lines G extended along first direction X, for providing gated sweep signal for pixel cell, and are arranged on viewing area 21; Many the data line D extended along second direction Y, for providing data-signal for pixel cell, and are arranged on viewing area 21; Gate driver circuit.
It should be noted that, fig. 2 ain not shown pixel cell.Each row pixel cell correspondence connects same data line D.Every a line pixel cell correspondence connects same gate lines G.Different rows pixel cell connects different gate lines G.The pixel cell of different lines connects different data line D.
fig. 2 ain only show D1-D4 tetra-data lines, G1-G6 six gate lines, gate lines G and data line D can determine according to pel array in array base palte, do not limit the concrete number of gate lines G and data line D.
Gate driver circuit comprises: multiple cascade and the first shift register 222a connected one to one with gate lines G; For providing the vitual stage shift register cell 222b of scanning start signal or scanning pick-off signal for the first shift register 222a; Gate driver circuit is arranged on rim area 20.
? fig. 2 ain illustrated embodiment, all first shift register 222a are arranged on the frame district 20 with first side 211, viewing area 21 adjacent edge.
The rim area 20 adjacent with the 3rd side 213 is provided with driving chip 24; The rim area 20 adjacent with four side 214 is provided with vitual stage shift register cell 222b, and vitual stage shift register cell 222b is greater than the width K2 of viewing area 21 at first direction X at the extension width K1 of first direction X.Wherein, vitual stage shift register cell 222b and viewing area 21 on second direction Y just to setting.
Known by foregoing description, the vitual stage shift register cell 222b of gate driver circuit is arranged on the relative rim area of four side 214 by the embodiment of the present application array base palte, the length of gate driver circuit on second direction Y can be reduced, like this for setting array substrate, the number of the first shift register 222a is determined, the length of first side 211 on second direction Y is determined, therefore, the length of the first shift register 222a on second direction Y can be made to extend, thus shorten the length of the first shift register 222a on first direction X, reduce border width, be convenient to realize narrow frame.
Array base palte is when forming display panels, and need to arrange both alignment layers in array base palte side, both alignment layers is arranged on the side towards pixel cell.The side that both alignment layers deviates from pixel cell needs to arrange liquid crystal layer.Distribution type layer is used for deflecting the liquid crystal molecule in liquid crystal layer.The embodiment of the present application is by arranging K1 > K2, and vitual stage shift register cell 222b and viewing area 21 are set on second direction Y just to setting, make array base palte when being prepared into display panels, the orientation being convenient to both alignment layers is even, and then the liquid crystal alignment of viewing area 21 can be made even, ensure that the effect of image display is better.In array base palte described in the application, by arranging K1 > K2, the just right rim area of the four side 214 of viewing area 21 is made to be equipped with vitual stage shift register cell 222b, and then make this rim area have good flatness, therefore, after arranging distribution type layer, the flatness of the distribution type layer in this region is better, can ensure the homogeneity of orientation.In other embodiments, all first shift registers can also be positioned at the rim area adjacent with second side.This embodiment can reference fig. 2 aillustrated embodiment, is not repeating at this.
Vitual stage shift register cell comprises: multiple vitual stage shift register b1, and the bearing of trend of multiple vitual stage shift register b1 is parallel to first direction X.The driving force of vitual stage shift register cell 222b can be improved by arranging multiple vitual stage shift register b1, and then improve the response speed of display panel.
In other embodiments, all first shift registers are arranged on the rim area adjacent with second side with first side, viewing area, be divided into two parts by all first shift registers, a part is arranged on the adjacent rim area with first side, and another part is arranged on adjacent rim area, second side.
When all first shift registers are arranged on the rim area adjacent with second side with first side, viewing area, preferably: the first shift register arranging gate line connection corresponding to odd-line pixels unit is positioned at rim area corresponding to same side, the first shift register arranging gate line connection corresponding to even rows unit is positioned at rim area corresponding to same side.Now, the structure of described array base palte is passable as Fig. 2 bshown in.
fig. 2 billustrated embodiment with fig. 2 amiddle difference is: the rim area that the first shift register 222a that the gate lines G of odd-line pixels unit connects is arranged on first side 211 correspondence, is arranged on the rim area of second side 212 correspondence by the first shift register 222a of the gate lines G of even rows unit; Vitual stage shift register cell 222c is also divided into two parts.
All first shift registers are divided into two parts, be separately positioned on the rim area that viewing area different sides is corresponding, further by increase by first shift register length in a second direction, length in a first direction can be reduced, and then reduces the width of frame.
When all first shift registers are arranged on the rim area adjacent with second side with first side, viewing area, all first shift registers are divided into two parts, and now vitual stage shift register cell 222b comprises: for providing the first group of vitual stage shift register 222b1 scanning start signal or scan pick-off signal for the first shift register 222a adjacent with first side 211; For providing the second group of vitual stage shift register 222b2 scanning start signal or scan pick-off signal for the first shift register 222a adjacent with second side 212.Now, relative with four side 214 rim area comprises: the firstth district adjacent on first direction X and the secondth district; Firstth district is identical with second district's size.
First group of vitual stage shift register 222b1 is identical with the number of vitual stage shift register b1 in second group of vitual stage shift register 222b2.Equally, better in order to ensure orientation homogeneity, arrange in a first direction: the extension width of first group of vitual stage shift register is greater than the width in the firstth district, and the extension width of second group of vitual stage shift register is greater than the width in the secondth district, is greater than K1 to make K2.
First group of vitual stage shift register and second group of vitual stage shift register include at least one vitual stage shift register b1, fig. 2 bshown in embodiment, the two respectively has two vitual stage shift register b1.
fig. 2 billustrated embodiment, second side 212 can be made relatively to have good flatness in rim area, therefore this rim area is after arranging distribution type layer, and the flatness of the distribution type layer in this region is better, can ensure the homogeneity of orientation.
fig. 2 bin, vitual stage shift register cell 222c is divided into two parts, first module 222c1 and second unit 222c2.Its cascade system is identical with vitual stage shift register cell 222b, does not repeat them here.
It should be noted that, the first shift register described in the embodiment of the present application and vitual stage shift register can be amorphous silicon preparation or polysilicon preparation.
Reference fig. 3 a, fig. 3 afor the structural representation of a kind of first shift register that the embodiment of the present application provides figure, comprising: transistor Mb, transistor Mc, transistor Md and transistor Me.Each transistor can MOS.
Correspond to fig. 2 aillustrated embodiment, the first all shift register 222a cascades successively, for m level first shift register, it exports sweep signal Gm.The control end of transistor Mb inputs the sweep signal Gm-1 of m-1 level first shift register, and the control end of transistor Mc inputs the sweep signal Gm+1 of m+1 level first shift register.Transistor be Mb's and connect voltage signal VGH, and second pole of transistor Mc connects voltage signal VGL.Second pole of transistor Mb and the first pole connected node Pa of transistor Mc.The control end of transistor Md is output terminal Gout, and its first pole connects clock signal C KB, its second pole connected node PA, and its control end is also connected with output terminal Gout by electric capacity Cb.First pole of transistor Me connects output terminal Gout, and its control end connects output terminal Gout, and its second pole connects voltage signal VGL.
Wherein, voltage signal VGL is less than voltage signal VGH, and the two is constant voltage signal.Transistor Md for pulling up transistor, for exporting the high level sweeping signal.Transistor Md can make the high level of sweep signal meet setting threshold value to the effect of drawing high of voltage by it.
Vitual stage shift register cell comprises at least one vitual stage shift register.The circuit structure of vitual stage shift register is identical with the circuit structure of the first shift register, and when multiple vitual stage shift register cascade, its cascade system is identical with the cascade system of the first shift register.Vitual stage shift register is used for providing scanning start signal or scanning pick-off signal, and the first shift register is used for providing sweep signal, the pixel cell connected with raster polar curve.
Vitual stage shift register and shift register are shift register, and equally, vitual stage shift register comprises and pulling up transistor.The structure pulled up transistor as Fig. 3 bshown in, fig. 3 bin, grid g bearing of trend is parallel to first direction X, and the bearing of trend of active area a, source electrode s and drain electrode d is parallel to first direction X.Pull up transistor and to extend on first direction X; The length pulled up transistor on first direction X is greater than the length on second direction Y, like this, the channel width-over-length ratio of trombone slide can be made to increase, and then reduce its resistance, improves vitual stage shift register carrying load ability.
as Fig. 2 ashown in, in the embodiment of the present application array base palte, gate driver circuit also comprises: vitual stage shift register cell 222c.Vitual stage shift register cell 222c is used for providing scanning start signal for afterbody first shift register or scanning the vitual stage shift register cell of pick-off signal.Structure and the function of vitual stage shift register cell 222c and vitual stage shift register cell 222b are identical.
When vitual stage shift register cell 222b is used for forward scan (being scanned to n-th grade of first shift register by the first order first shift register), for the first shift register provides scanning start signal or scanning pick-off signal.When vitual stage shift register cell 222c is used for reverse scan (being scanned to the first order first shift register by afterbody first shift register), for the first shift register provides scanning start signal or scanning pick-off signal.
Vitual stage shift register cell 222c can be arranged on relative rim area, first side 211 20; Or be arranged on the relative rim area 20 of the 3rd side 213; Or a part is arranged on relative rim area, first side 211 20, another part is arranged on the relative rim area 20 of the 3rd side 213.
Known by foregoing description, the embodiment of the present application array base palte can reduce border width by the layout type changing vitual stage shift register, realizes narrow frame.The panel of corresponding setting size, reduces the width of frame, can improve the area of viewing area.
Based on above-described embodiment, the application another embodiment still provides a kind of display panels, the structure of this display panels as Fig. 4shown in, this display panels comprises:
The array base palte 42 be oppositely arranged and color membrane substrates 41;
Be arranged on the liquid crystal layer 43 between array base palte 42 and color membrane substrates 41;
Wherein, array base palte 42 is the array base palte of above-described embodiment.Array base palte 42 is provided with both alignment layers towards a side surface of liquid crystal layer 43.
The embodiment of the present application display panels adopts the array base palte of above-described embodiment, can have narrower frame.Meanwhile, as above-described embodiment, orientation homogeneity can be ensured.
Based on above-described embodiment, the application another embodiment still provides a kind of electronic equipment, this electronic equipment comprises: the display panels of above-described embodiment.
Electronic equipment can be the electronic equipment that mobile phone, notebook computer, panel computer and intelligent wearable electronic etc. have LCDs.It is narrow that electronic equipment has frame, the advantage that viewing area is large.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (10)

1. an array base palte, is characterized in that, comprising:
Viewing area and surround the rim area of described viewing area, described viewing area comprises the first side and second side that extend along second direction, along the 3rd side and the four side that first direction extends, wherein first side is relative with second side, and the 3rd side is relative with four side;
The pixel cell of multiple array arrangement, described pixel cell is arranged on described viewing area;
Many the gate lines extended along first direction, for providing gated sweep signal for described pixel cell, and are arranged on described viewing area;
Many the data lines extended along second direction, for providing data-signal for described pixel cell, and are arranged on described viewing area;
Gate driver circuit, described gate driver circuit comprises: multiple cascade and the first shift register connected one to one with described gate line; For providing the vitual stage shift register cell of scanning start signal or scanning pick-off signal for the first shift register; Described gate driver circuit is arranged on described rim area;
Wherein, all first shift registers are arranged on and the adjacent rim area in first side, described viewing area and/or second side;
The rim area adjacent with described 3rd side is provided with driving chip; The rim area adjacent with described four side is provided with described vitual stage shift register cell, and described vitual stage shift register cell is greater than the width of described viewing area at first direction at the extension width of described first direction.
2. array base palte according to claim 1, is characterized in that, all first shift registers are positioned at and the adjacent rim area in described first side or second side.
3. array base palte according to claim 2, is characterized in that, described vitual stage shift register cell comprises: multiple vitual stage shift register, and the bearing of trend of described multiple vitual stage shift register is parallel to described first direction.
4. array base palte according to claim 1, is characterized in that, described first shift register of a part is arranged on the rim area adjacent with described first side, and the first shift register described in another part is arranged on the rim area adjacent with described second side.
5. array base palte according to claim 4, is characterized in that, described vitual stage shift register cell comprises:
For providing for the first shift register adjacent with described first side the first group of vitual stage shift register scanning start signal or scan pick-off signal;
For providing for the first shift register adjacent with described second side the second group of vitual stage shift register scanning start signal or scan pick-off signal.
6. array base palte according to claim 5, is characterized in that, the rim area relative with described four side comprises: the firstth adjacent in said first direction district and the secondth district; Described firstth district is identical with described second district's size;
In a first direction: the extension width of described first group of vitual stage shift register is greater than the width in described firstth district, the extension width of described second group of vitual stage shift register is greater than the width in described secondth district.
7. array base palte according to claim 5, is characterized in that, described first group of vitual stage shift register and described second group of vitual stage shift register include at least one vitual stage shift register.
8. the array base palte according to any one of claim 1-7, is characterized in that, described vitual stage shift register cell comprises at least one vitual stage shift register; Described vitual stage shift register comprises and pulling up transistor, described in pull up transistor and extend in said first direction; The described length pulled up transistor in said first direction is greater than length in this second direction.
9. a display panels, is characterized in that, comprising:
The array base palte be oppositely arranged and color membrane substrates;
Be arranged on the liquid crystal layer between described array base palte and described color membrane substrates;
Wherein, described array base palte is the array base palte described in any one of claim 1-8.
10. an electronic equipment, is characterized in that, comprising: display panels as claimed in claim 9.
CN201511031716.9A 2015-12-31 2015-12-31 A kind of array substrate, liquid crystal display panel and electronic equipment Active CN105469764B (en)

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