CN105428247B - One kind being based on aqueous ultra-thin ZrO2The film crystal tube preparation method of high k dielectric layer - Google Patents

One kind being based on aqueous ultra-thin ZrO2The film crystal tube preparation method of high k dielectric layer Download PDF

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CN105428247B
CN105428247B CN201610031108.6A CN201610031108A CN105428247B CN 105428247 B CN105428247 B CN 105428247B CN 201610031108 A CN201610031108 A CN 201610031108A CN 105428247 B CN105428247 B CN 105428247B
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CN105428247A (en
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单福凯
刘国侠
朱春丹
刘奥
孟优
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Qingdao University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials

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Abstract

The invention belongs to semiconductor thin-film transistor preparing technical fields, are related to a kind of based on aqueous ultra-thin ZrO2The film crystal tube preparation method of high k dielectric layer, complete aqueous thin film transistor (TFT) is prepared in conjunction with N-shaped indium oxide and p-type nickel oxide semiconductor channel layer, it selects low-resistance silicon as substrate and gate electrode, the mode that aqueous sol method, UV light processings and thermal annealing are combined is respectively adopted and prepares ultra-thin ZrO2Gate dielectric layer and the good In of high transmittance, chemical stability2O3With NiO semiconductor channel layers, to further prepare high-performance, low energy consumption TFT devices;Its preparation process is simple, and low cost, easy to operate, principle is reliable, good product performance, prepares environmental-friendly, has a extensive future, preparing high performance thin film transistor (TFT) for large area provides feasible scheme.

Description

One kind being based on aqueous ultra-thin ZrO2The film crystal tube preparation method of high k dielectric layer
Technical field:
The invention belongs to semiconductor thin-film transistor preparing technical fields, are related to a kind of based on the thin of the environmentally protective hydrosol The preparation method of film transistor, especially one kind is with aqueous ultra-thin zirconium oxide (ZrO2) it is high k dielectric layer, with N-shaped indium oxide (In2O3) and p-type nickel oxide (NiO) be semiconductor channel layer thin film transistor (TFT) preparation method.
Background technology:
In recent years, thin film transistor (TFT) (Thin Film Transistor, TFT) is in driven with active matrix liquid crystal display device Important function is played in (Active Matrix Liquid Crystal Display, AMLCD), from low temperature amorphous silicon TFT To high temperature polysilicon TFT, technology is more and more ripe, and application is also from can only drive LCD (Liquid Crystal Display can not only LCD be driven but also can drive OLED (Organic Light Emitting Display), very by) developing to To Electronic Paper.TFT has become the core component of FPD industry in past more than ten years, and every display is all integrated with Millions of or even more than one hundred million a TFT devices.With the development of large scale integrated circuit, as si-substrate integrated circuit core devices The characteristic size of TFT constantly reduces always, reduces rule and follows Moore's Law.The result of this reduction can not only increase device Part density reduces unit cost, it is often more important that its each switch operates consumed power and also reduces (IBM therewith Journal of Research and Development, 43 245,1999).When the feature ruler of super large-scale integration It is very little when being less than 0.1 μm, silica (SiO2) thickness of dielectric layer is necessarily less than 1.5nm, therefore is difficult control SiO2Film Pinhold density, so as to cause larger leakage current.Research shows that SiO2When thickness reduces to 1.5nm by 3.5nm grid leakage current by 10-12A/cm2Increase to 10A/cm2(IEEE Electron Device Letters,18209,1997).Larger leakage current meeting Cause high power consumption and corresponding heat dissipation problem, this all adversely affects device integration, reliability and service life.Mesh Before, in integrated circuit technology widely used high-k (high k) grid dielectric come increase capacitance density and reduce electric leakage of the grid Stream, high-g value because of its big dielectric constant, with SiO2In the case of with same equivalent gate oxide thickness (EOT), in fact Border thickness ratio SiO2Big is more, to solve SiO2The quantum tunneling effect generated due to close to physics thickness limit (Journal of Applied Physics,89 5243,2001).Therefore it prepares novel, high-performance high-g value and substitutes SiO2 As the top priority of realization large scale integrated circuit.
Since TFT devices are membrane type structures, the electricity of dielectric constant, compactness and the thickness of gate dielectric layer to transistor Learning performance has important influence.At present as research hotspot high k dielectric materials include ATO (Advanced Materials, 24 2945,2012)、Al2O3(Nature, 489 128,2012)、ZrO2(Advanced Materials,23 971, 2011)、HfO217415,2012) and Y (Journal of Materials Chemistry, 222O3(Applied Physics 123503,2011) etc. Letters, 98.In numerous high-k dielectric materials, ZrO2By its larger dielectric constant (~28), Wider band gap (5.6eV), the compensation of larger conduction band become the features such as higher channel barrier height of electronics (being more than 2eV) The primary selection (NPG Asia Materials, 7 e190,2015) of dynamic RAM.So far, ZrO2Film Preparation mostly uses vacuum technology of preparing, such as molecular beam epitaxy, chemical vapor deposition, electron beam evaporation, magnetron sputtering etc. greatly.This Class high-vacuum technology needs to rely on expensive equipment and is difficult to realize large area film forming, constrains the life of inexpensive electronic device Production.In view of new direction-printed electronic device of development of electronic devices in future, preparing film using chemical solution technology will be One better choice, chemical solution technology superfines, film coating, fiber and other material preparation process in by extensive Using it has the advantages that its uniqueness:Each component is blended in intermolecular progress during it is reacted, thus the grain size of product is small, equal Even property is high;Reaction process is easily controllable, some products for being difficult to other methods can be obtained, in addition react at low temperature into Row, avoids the appearance of high temperature dephasign so that the purity of product, and to prepare the item that device is provided with power on plastics later Part can make flexible material become a kind of possibility.
Organic system solution is mostly used when currently, preparing film using chemical solution technology as presoma, this method is not only Increase experimental cost, waste liquid destroys natural environment, is unfavorable for sustainable, Green Development objective.Advanced Functional Materials,25 2564,2015&DOI:10.1002/adfm.201502612 it is proposed that a kind of utilization " hydrosol " method prepares the new approaches of ultra-thin high k dielectric film, and successfully prepares high performance yttrium oxide and the high k of scandium oxide Dielectric film.In addition, by consulting related patents, document, also finds no at present and zirconium oxide is prepared based on water-soluble gluing method (ZrO2) high k dielectric film and its electronic device relevant report.In hydrosol precursor solution, only metal nitrate and Deionized water substitutes traditional organic solution (ethylene glycol monomethyl ether etc.) as reaction source, using deionized water and is used as solvent, therefore Hydrosol technology has many advantages, such as nontoxic, environmentally friendly, cheap compared to conventional organosol method;Additionally due to golden in aqueous solution It is electrostatical binding to belong between cation and hydrone, has weaker combination energy compared to Covalent bonding together mode in organic solution, Therefore there is lower decomposition temperature using the film of aqueous solution method spin coating, reliability is prepared using aqueous solution technology The technical field that high, reproducible, low-temperature decomposition semiconductive thin film is just becoming industrial quarters and scientific research circle is being furtherd investigate.
Currently, using N-shaped indium oxide (In2O3), oxide indium zinc oxygen (IZO) and indium gallium zinc oxygen (IGZO) material be as thin The preparation of film transistor channel layer and application technology are disclosed document, and numerous studies have been done by the states such as U.S., Japan and Korea S..In2O3Rely on Its high mobility, amorphous state, high transmittance (visible light>80%) become the strong candidate of semiconductor channel layer material.We By the access of related patents, document, " hydrosol " method of utilization prepares TFT channel layer and is rarely reported, and is based on aqueous ZrO2High k The complete aqueous low temperature TFT devices of dielectric layer are even more that nobody sets foot in.In addition, utilizing the report of solwution method TFT most in the prior art N type semiconductor devices is concentrated on, the research for P-type semiconductor device is almost blank.P-type semiconductor material, such as aoxidize Nickel (NiO), cuprous oxide and stannous oxide are always microelectronics device as a kind of hole mobile material (N-shaped is electron-transport) The key breakthrough field of part research urgently broken through, while being also that complementary mos integrated circuit is essential Component part.After tested, the N-shaped In prepared using above-mentioned material technique2O3/ZrO2With p-type NiO/ZrO2TFT devices not only have There is higher carrier mobility, and will be greatly improved as the pixel switch of AMLCD with extremely low operation voltage The aperture opening ratio of active matrix improves brightness, while reducing power consumption;In addition its whole soln preparation process does not depend on expensive Vacuum Deposition Film device so that cost of manufacture further decreases, and it is very wide that these advantages make it have in following low power consumption electronic display field Potential market.
Invention content:
It is an object of the invention to overcome disadvantage of the existing technology, seek to design and provide a kind of based on aqueous ultra-thin ZrO2The film crystal tube preparation method of high k dielectric layer, in combination with n type indium oxides (In2O3) and p-type nickel oxide (NiO) half Conductor channel layer prepares complete aqueous thin film transistor (TFT) (TFT), selects low-resistance silicon as substrate and gate electrode, is respectively adopted " aqueous The mode that colloidal sol " method, UV light processings and thermal annealing are combined prepares ultra-thin ZrO2(~10nm) gate dielectric layer and high transmission The good In of rate, chemical stability2O3With NiO semiconductor channel layers, to further prepare high-performance, low energy consumption TFT devices Part.
To achieve the goals above, the present invention specifically includes following processing step:
(1)、ZrO2The preparation of precursor solution:By zirconium nitrate Zr (NO3)4·5H2O is dissolved in deionized water, at normal temperatures The ZrO of the 1-24 hours a concentration of 0.01-0.5mol/L for forming clear of magnetic agitation2Precursor solution;
(2), the preparation of NiO precursor solutions:By nickel acetate C4H6NiO4·4H2O is dissolved in 10mL ethyl alcohol and ethanol amine In the mixed solvent, the NiO forerunner of the magnetic agitation 1-24 hours at normal temperatures a concentration of 0.01-0.5mol/L for forming clear Liquid solution, wherein a concentration of 0.01-0.5mol/L of NiO precursor solutions, in the mixed solvent ethyl alcohol and ethanol amine volume ratio are 1- 10:1;
(3)、ZrO2The preparation of film sample:Using plasma cleaning method cleans low-resistance surface of silicon, is cleaning The ZrO prepared using conventional spin coating technique difference spin-coating step (1) and (2) on two pieces of low-resistance silicon substrates afterwards2Presoma is molten Liquid and NiO precursor solutions, it is first spin coating 4-8 seconds lower at 400-600 revs/min, then in 3000-6000 revs/min of lower spin coating 15-30 Second, spin coating number is 1-3 times, each spin coating thickness 5-10nm;Film after spin coating is put on roasting glue platform in 100-200 DEG C of item Cure test sample after progress low temperature baking under part;The cure test sample after baking is existed again after 40~60min of UV light processings It anneals 1-3 hours at a temperature of 200-600 DEG C, realizes the process of dehydroxylation and metal oxide densification, obtain ZrO2It is thin Membrane sample;
(4)、In2O3The preparation of channel layer:By indium nitrate In (NO3)3It is dissolved in deionization, it is small that 1-24 is stirred at room temperature When formed clear a concentration of 0.01-0.5mol/L In2O3Aqueous solution;Then the ZrO obtained in step (3)2Film Sample surfaces utilize spin coating technique spin coating In2O3Aqueous solution, it is first spin coating 4-8 seconds lower at 400-600 revs/min, then in 2000- 5000 revs/min spin coating 15-30 seconds lower, and spin coating number is 1-3 times, each spin coating thickness 5-10nm;Film after spin coating is put into 120-150 DEG C of roasting glue platform is put into 200-300 DEG C of progress process annealing processing 1-5 hours in Muffle furnace after carrying out curing process, i.e., In is prepared2O3Channel layer;
(5), the preparation of NiO raceway grooves:Spin coating technique spin coating NiO forerunner is utilized in the film sample surface that step (3) obtains Liquid solution, first spin coating 4-8 seconds lower at 400-600 revs/min then spin coating 15-30 seconds lower at 2000-5000 revs/min, spin coating number is 1-3 times, each spin coating thickness 5-10nm;Film after spin coating is put into 120-150 DEG C of roasting glue platform and carries out curing process 30 minutes After be put into Muffle furnace and carry out 200-300 DEG C of process annealing and handle 1-5 hours, that is, NiO channel layers are prepared;
(6), the preparation in source, drain electrode:Using conventional Vacuum sublimation using stainless steel mask plate respectively in In2O3 With NiO channel layers source metal prepared above, drain electrode to get to based on aqueous ultra-thin ZrO2The N-shaped In of high k dielectric layer2O3And p Type NiO thin film transistor (TFT)s.
The step (1) of the present invention and the deionized water resistivity involved in (2) are more than 18 M Ω cm.
Plasma clean method involved in the step (3) of the present invention is using oxygen or argon gas as purge gas, work( Rate is 20-60Watt, and the intake of scavenging period 20-200s, working gas are 20-50SCCM.
N-shaped In prepared by step (5) of the present invention2O3Electrode raceway groove length-width ratio with p-type NiO thin film transistor (TFT)s is 1:4-20, Thermal evaporation electric current is 30-50A;Source obtained, electric leakage extremely metal Al, Ti or Ni electrodes, thickness of electrode 50-200nm.
Compared with prior art, the present invention haing the following advantages:First, ZrO obtained2The physics of high k gate dielectric layers is thick Degree is less than 20nm, simultaneously the low-leakage current that has, bulky capacitor density meet microelectronics it is integrated for device size the needs of; ZrO2The high transmittance that film itself has, it is seen that optical band>90%, meet requirement of the transparent electronics to material itself; ZrO obtained2Film is amorphous state, it can be achieved that film large area, uniform preparation;Second is that ZrO2Film uses " aqueous sol " work Skill is prepared, and using nitric acid zirconates and deionized water as reaction source, process is cheap, environmentally protective, and it is sustainable to meet China Development strategy;Third, the N-shaped In in thin film transistor (TFT)2O3With p-type NiO semiconductor channel layers and ZrO2Dielectric layer utilizes low temperature Prepared by sol gel process, preparation process does not need high vacuum environment, can carry out in air, reduces production cost, meets " printing The requirement of electronic device ";Fourth, ZrO2What film was prepared at low temperature, process costs are reduced, to the integrated tool of flexible device It is of great importance.Fifth, the successful preparation of solwution method p-type NiO TFT, device basis is established for the preparation of next step CMOS;It is made Standby simple for process, low cost, easy to operate, principle is reliable, good product performance, prepares environmental-friendly, has a extensive future, is big Area prepares high performance thin film transistor (TFT) and provides feasible scheme.
Description of the drawings:
Fig. 1 be the present invention prepare based on ZrO2The complete aqueous In of high k dielectric layer2O3The structural principle of thin film transistor (TFT) shows It is intended to.
Fig. 2 be the present invention prepare based on ZrO2The structural principle of the complete aqueous NiO thin film transistor (TFT)s of high k dielectric layer is illustrated Figure.
Fig. 3 is aqueous ZrO prepared by the present invention2The leakage current test curve figure of high k dielectric layer.
Fig. 4 is aqueous ZrO prepared by the present invention2The capacity measurement curve graph of high k dielectric layer.
Fig. 5 is complete aqueous In prepared by the present invention2O3/ZrO2The output characteristic curve figure of thin film transistor (TFT), wherein grid are inclined Press VGS=0-2V.
Fig. 6 is complete aqueous In prepared by the present invention2O3/ZrO2The transfer characteristic curve figure of thin film transistor (TFT), wherein source and drain electricity Press VDS=1V.
Fig. 7 is p-type NiO/ZrO prepared by the present invention2The transfer characteristic curve figure of thin film transistor (TFT), wherein source-drain voltage VDS =1V.
Specific implementation mode:
It is further illustrated the present invention below by specific embodiment and in conjunction with attached drawing.
Embodiment:
Zirconium nitrate in the present embodiment, nickel nitrate and indium nitrate powder are purchased from Aldrich, and purity is more than 98%; Its bottom grating structure is with ultra-thin zirconium oxide (ZrO2) for high k dielectric layer and respectively with indium oxide (In2O3) and nickel oxide (NiO) film Preparation process for the thin film transistor (TFT) of channel layer is:
(1) ultra-thin ZrO is prepared using " aqueous sol " method spin coating2High k dielectric film:
Step 1:Select commercially available single-sided polishing low-resistance silicon as substrate (~0.0015 Ω cm) and gate electrode, low-resistance silicon Substrate uses hydrofluoric acid, acetone and each 10 minutes of alcohol ultrasonic cleaning substrate successively, high-purity after being rinsed repeatedly with deionized water Nitrogen dries up;
Step 2:Deionized water 10mL is weighed, zirconium nitrate is dissolved according to 0.1M in aqueous solution, in magnetic agitation after mixing Under the action of be stirred at room temperature 4 hours formed clarification, water white transparency ZrO2Precursor liquid;
Step 3:Clean low-resistance silicon substrate is put into plasma clean intracavitary, is passed through after chamber is extracted to 0.5Pa High-purity (99.99%) oxygen, it is 30Watt, scavenging period 120s to control its power, and the intake of oxygen is when work 30SCCM;
Step 4:Prepare ZrO2Sample:The precursor solution prepared in step 2 is spin-coated on to the low-resistance silicon substrate cleaned On, spin coating number is 2 times, and the parameter of sol evenning machine is set as when spin coating precursor solution:First in 500 revs/min of spin coatings 5 seconds, then In 5000 revs/min of spin coatings 20 seconds;After spin coating, sample is put into 150 DEG C of baking 10min on roasting glue platform, after curing process ZrO2Sample UV light processing 40min, after be put into Muffle furnace process annealing and handle, annealing temperature is 250 DEG C, annealing time 1 Hour, obtain ZrO2Sample;
(2) it prepares, spin coating In2O3With NiO precursor solutions, channel layer:
Step 1:After indium nitrate 0.30g and deionized water 10mL are mixed 5.5 are stirred at room temperature under the action of magnetic agitation Hour formed clarification, water white transparency In2O3Aqueous solution, metal cation total concentration are 0.1M;Again by the nickel acetate of 0.1mol It is dissolved in 9mL ethyl alcohol and 1 mL ethanol amines, 3h is stirred at room temperature under the action of magnetic agitation after mixing, and to form clarification, light green color saturating Bright NiO solution;
Step 2:1. preparing In2O3Channel layer:The In that will be prepared in step 12O3Aqueous solution is spin-coated on corona treatment The ZrO crossed2On sample, the parameter of sol evenning machine is set as when spin coating:5000 revs/min of spin coatings 20 seconds, after spin coating, by sample 150 DEG C of baking 10min on roasting glue platform are put into, the sample after curing process, which is put into process annealing in Muffle furnace, to be handled, annealing temperature Degree is 250 DEG C, annealing time 1 hour;
2. preparing NiO channel layers:The NiO precursor solutions configured in step 1 are spin-coated on the ZrO that plasma treatment is crossed2 On sample, the parameter of sol evenning machine is set as when spin coating:5000 revs/min of spin coatings 20 seconds, after spin coating, 150 DEG C are put by sample 10min is baked in roasting glue platform, then the low-temperature treatment in Muffle furnace, annealing temperature is 250 DEG C, annealing time 1 hour;
(3) Vacuum sublimation is used to prepare source, leakage metal electrode:
By way of thermal evaporation, in In2O3The stainless steel mask plate system for being 1000/250 μm with breadth length ratio on channel layer The metal Al of standby 100nm thickness is 40A as source, drain electrode, thermal evaporation electric current, and Al/In is prepared2O3/ZrO2/ Si structures Thin film transistor (TFT);It is that 1000/250 μm of stainless steel mask plate prepares 100nm thickness that breadth length ratio is equally used on NiO channel layers W metal is 60A as source, drain electrode, thermal evaporation electric current, and Ni/NiO/ZrO is prepared2The thin film transistor (TFT) of/Si structures;
(4) to manufactured Al/In2O3/ZrO2/ Si structures (Fig. 1) and Ni/NiO/ZrO2The film of/Si structures (Fig. 2) is brilliant Body pipe is tested;Aqueous ZrO obtained2Electric leakage current test and capacity measurement the curve difference of dielectric layer are as shown in Figure 3, Figure 4; Al/In obtained2O3/ZrO2/ Si configuration thin film transistor output characteristic curves are as shown in Figure 5;The Al/In of preparation2O3/ZrO2/ The corresponding transfer characteristic curve of Si configuration thin film transistors is as shown in Figure 6;The Ni/NiO/ZrO of preparation2/ Si structural membrane crystal Pipe transfer characteristic curve is as shown in fig. 7, wherein Fig. 3, Fig. 5, Fig. 6, Fig. 7 curve are tested by Keithley 2634B semiconductor source tables It arrives;Fig. 4 curves are tested to obtain by Agilent 4294A.

Claims (1)

1. one kind being based on aqueous ultra-thin ZrO2The film crystal tube preparation method of high k dielectric layer, it is characterised in that with ultra-thin zirconium oxide It is as the preparation process of the thin film transistor (TFT) of channel layer using indium oxide and nickel oxide film for high k dielectric layer and respectively:
(1) ultra-thin ZrO is prepared using " aqueous sol " method spin coating2High k dielectric film:
Step 1:Select the low-resistance silicon of commercially available single-sided polishing, 0.0015 Ω cm as substrate and gate electrode, low-resistance silicon substrate Hydrofluoric acid, acetone and each 10 minutes of alcohol ultrasonic cleaning substrate, after being rinsed repeatedly with deionized water, High Purity Nitrogen air-blowing are used successively It is dry;
Step 2:Deionized water 10mL is weighed, zirconium nitrate is dissolved according to 0.1M in aqueous solution, in the work of magnetic agitation after mixing Be stirred at room temperature under 4 hours formed clarification, water white transparency ZrO2Precursor liquid;
Step 3:Clean low-resistance silicon substrate is put into plasma clean intracavitary, waits for that plasma clean chamber is extracted to 0.5Pa It is passed through the oxygen that purity is 99.99% afterwards, it is 30Watt, scavenging period 120s to control its power, and oxygen is passed through when work Amount is 30SCCM;
Step 4:Prepare ZrO2Sample:The precursor solution prepared in step 2 is spin-coated on the low-resistance silicon substrate cleaned, is revolved It is 2 times to apply number, and the parameter of sol evenning machine is set as when spin coating precursor solution:First in 500 revs/min of spin coatings 5 seconds, then 5000 Rev/min spin coating 20 seconds;After spin coating, sample is put into 150 DEG C of baking 10min on roasting glue platform, by the ZrO after curing process2 Sample UV light processing 40min, after be put into Muffle furnace process annealing and handle, annealing temperature is 250 DEG C, and annealing time 1 hour obtains To ZrO2Sample;
(2) it prepares, spin coating In2O3With NiO precursor solutions, channel layer:
Step 1:It is stirred at room temperature under the action of magnetic agitation 5.5 hours after indium nitrate 0.30g and deionized water 10mL are mixed Formed clarification, water white transparency In2O3Aqueous solution, metal cation total concentration are 0.1M;The nickel acetate of 0.1mol is dissolved in again 3h is stirred at room temperature under the action of magnetic agitation in 9mL ethyl alcohol and 1mL ethanol amines, after mixing and forms clarification, greenish transparent NiO solution;
Step 2:1. preparing In2O3Channel layer:The In that will be prepared in step 12O3Aqueous solution is spin-coated on plasma treated ZrO2On sample, the parameter of sol evenning machine is set as when spin coating:5000 revs/min of spin coatings 20 seconds, after spin coating, sample are put into roasting Sample after curing process is put into process annealing in Muffle furnace and handled by the upper 150 DEG C of bakings 10min of Jiao Tai, annealing temperature 250 DEG C, annealing time 1 hour;
2. preparing NiO channel layers:The NiO precursor solutions configured in step 1 are spin-coated on the ZrO that plasma treatment is crossed2Sample On, the parameter of sol evenning machine is set as when spin coating:5000 revs/min of spin coatings 20 seconds, after spin coating, 150 DEG C of roasting glues are put by sample 10min is baked in platform, then the low-temperature treatment in Muffle furnace, annealing temperature is 250 DEG C, annealing time 1 hour;
(3) Vacuum sublimation is used to prepare source, leakage metal electrode:
By way of thermal evaporation, in In2O3It is prepared by the stainless steel mask plate for being 1000/250 μm with breadth length ratio on channel layer The metal Al of 100nm thickness is 40A as source, drain electrode, thermal evaporation electric current, and Al/In is prepared2O3/ZrO2/ Si structures it is thin Film transistor;It is the metal that 1000/250 μm of stainless steel mask plate prepares 100nm thickness that breadth length ratio is equally used on NiO channel layers Ni is 60A as source, drain electrode, thermal evaporation electric current, and Ni/NiO/ZrO is prepared2The thin film transistor (TFT) of/Si structures.
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