CN105404495A - High-speed pseudorandom sequence generator and generation method for modulated wideband converter - Google Patents
High-speed pseudorandom sequence generator and generation method for modulated wideband converter Download PDFInfo
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Abstract
The invention discloses a high-speed pseudorandom sequence generator and generation method for a modulated wideband converter, belongs to the field of pseudorandom sequence generation, and solves the problems that an existing modulated wideband converter is simple in system structure and incompatible with the jump frequency of a required periodic pseudorandom sequence. The generator comprises an FPGA, N parallel-serial conversion modules, N differential-single-ended balanced transformers and a high-speed clock module, wherein the FPGA is used for receiving an eight-frequency-divider signal of CLK, generating N different parallel random sequences under the triggering action of the eight-frequency-divider signal, and sending a clock control signal, the N different parallel random sequences and N same synchronous differential control signals; each differential-single-ended balanced transformer is used for receiving a serial differential signal and converting the serial differential signal into a single-ended serial signal; and each single-ended serial signal is a periodic pseudorandom sequence with a characteristic that the jump frequency of a clock signal is alternatively changed within a range of {-1,+1}. The high-speed pseudorandom sequence generator and generation method are mainly used for generating the pseudorandom sequence.
Description
Technical field
The invention belongs to pseudo-random sequence and produce field.
Background technology
In the last few years, compressive sensing theory development, this theoretical proof, under signal has openness prerequisite, can realize synchronous compression and the sampling of signal, then recover original signal by suitable restructing algorithm.Lack sampling method based on compressive sensing theory can greatly reduce sampling rate and required storage, transmit data, breaches the restriction of nyquist sampling theorem to sampling rate, can be widely used in the field such as image procossing and signals collecting.
Modulation wide-band transducer ModulatedWidebandConverter, MWC is a kind of based on the novel lack sampling system of compressive sensing theory for multi-band signal.A kind of typical modulation wide-band transducer system as shown in Figure 2.In Fig. 2, x (t) represents multi-band signal, p
it () is mixing function, h (t) represents ideal low-pass filter, T
sfor sampling time interval, y
i[n] is the sampled signal of i-th passage.Visible, modulation wide-band transducer system forms by organizing same channels more, the main element of every passage comprises following a few part: multiplier, low-pass filter, uniform sampling module, the sampled data acting in conjunction of many group passages is in signal reconstruction module, the treatment scheme of signal is followed successively by: mixing, low-pass filtering, uniform sampling, signal reconstruction.
Multi-band signal enters modulation wide-band transducer system, is received by m channel parallel, and each passage but periodic sequence that numerical value different identical with the cycle is modulated, the object of modulation is frequency spectrum shift, signal after modulation, through low-pass filtering, filters HFS, leaves low frequency part.Because the cutoff frequency of low-pass filter is lower, so the bandwidth of filtered signal narrows, so just by lower speed, signal can be sampled, obtain the overall observation data of a series of signal.And then carry out low speed sampling, speed during sampling only needs the width being greater than low-pass filter maximum band, so sampling rate can lower than the nyquist frequency of signal.Finally recycling calculates the system senses matrix and relevant signal reconstruction algorithm asked for, by the mathematical relation between perception matrix and sample information, can recover original signal and frequency spectrum thereof from the data collected.
In modulation wide-band transducer system, cycle mixing function realizes the frequency spectrum shift to original signal, is carried out in the frequency range of low speed sampling by the frequency spectrum shift of signal to adopting the existing ADC in market.In order to move in process all information retaining original signal, require that the jump frequency of mixing function is at least the nyquist frequency of original signal, typical mixing function is in { the cycle pseudo-random sequence of alternately change between-1 ,+1} with nyquist frequency.Random series refers to that each element of sequence is the stochastic variable of independent same distribution (IndependentIdenticalDistribution, iid).Real random series cannot be reappeared, even if there is same input, also same output cannot be generated by sequencer, therefore real random series cannot be used in general application, the mainly pseudo-random sequence of practical application, pseudo-random sequence is the sequence of the determination with certain random character, and it is can be predetermined on the one hand, and can repeatedly generate and copy; It has again the statistical property of certain random series on the one hand.When the maximum frequency of original signal is 1GHz, require that the jump frequency of cycle pseudo-random sequence is at least 2GHz.
In traditional pseudo-random sequence circuit for generating design, the general high-speed linear feedback shift register that adopts produces pseudo-random sequence.But the figure place due to common high-speed linear feedback shift register is general all about 8-10 position, if the pseudo-random sequence that therefore will produce 100 just needs 10-12 sheet chip to combine, which not only adds the cost of sampling system, also make hard-wired complexity greatly increase simultaneously.
In addition, the length of the pseudo-random sequence using the linear feedback shift register designed to produce is fixing, so for given different original signals, the degree of accuracy that different pseudo-random sequences is recovered to improve unlike signal is utilized if want, just hardware circuit must be redesigned, very inconvenient, like this and the system designed can only sample to specific multi-band signal, limitation is stronger.Therefore, need a kind of hardware easily to realize and there is adaptive high speed PRBS production method.
Summary of the invention
The present invention be in order to solve existing modulation wide-band transducer system architecture simple cannot be compatible with the jump frequency of required cycle pseudo-random sequence problem.The invention provides a kind of high speed PRBS generator for modulating wide-band transducer and method for generation.
For modulating the high speed PRBS generator of wide-band transducer, it comprises FPGA, N number of parallel serial conversion module, N number of differential to single-ended balancing transformer and high-frequency clock module; N is positive integer;
FPGA, for receiving 8 fractional frequency signals of CLK, under the triggering of 8 fractional frequency signals of CLK, generates the different parallel random series in N road, the synchronous difference control signal that the parallel random series that tranmitting data register control signal, N road are different is simultaneously identical with N road;
High-frequency clock module, for receive clock control signal, according to the clock control signal received, produces CLK signal;
Each parallel serial conversion module, for receiving CLK signal, a road walks abreast random series and a road synchronous difference control signal, convert parallel random series to serial differential signals that jump frequency is CLK signal frequency and send, sending 8 fractional frequency signals of CLK simultaneously;
Each differential to single-ended balancing transformer, for receiving serial differential signals, is transformed to single ended serial signal by serial differential signals, each single ended serial signal is in { the cycle pseudo-random sequence of alternately change between-1 ,+1} with the jump frequency of clock signal.
For modulating the high speed PRBS generator of wide-band transducer, it also comprises host computer,
Host computer, for controlling length and the value of the parallel random series generated, also for the frequency of control CLK signal.
For modulating the high speed PRBS method for generation of wide-band transducer, this method for generation comprises the steps:
For receiving 8 fractional frequency signals of CLK, under the triggering of 8 fractional frequency signals of CLK, generate the different parallel random series in N road, the step of the synchronous difference control signal that the parallel random series that tranmitting data register control signal, N road are different is simultaneously identical with N road;
For receive clock control signal, according to the clock control signal received, produce the step of CLK signal;
For receiving CLK signal, a road walks abreast random series and a road synchronous difference control signal, converts parallel random series to serial differential signals that jump frequency is CLK signal frequency and sends, sending the step of 8 fractional frequency signals of CLK simultaneously;
For receiving serial differential signals, serial differential signals is transformed to single ended serial signal, each single ended serial signal is in { the step of the cycle pseudo-random sequence alternately changed between-1 ,+1} with the jump frequency of clock signal.
Difference for the high speed PRBS method for generation modulating wide-band transducer is, this method for generation also comprises the steps: length and the value of the parallel random series for controlling generation, also for the step of the frequency of control CLK signal.
Build the complex structure of the modulation wide-band transducer system of pseudo-random sequence on the one hand based on multiple linear shift register in prior art, and the random series length exported is non-adjustable, but the pseudo-random sequence speed exported is fast, the modulation wide-band transducer system architecture being used alone FPGA structure is on the other hand simple, the random series adjustable length exported, but the speed of the pseudo-random sequence generated is slow.Simple for the high speed PRBS generator hardware implementing modulating wide-band transducer described in invention, cost is low, and can be changed cycle and the length of pseudo-random sequence by amendment software logic.If provide cycle pseudorandom mixing function to modulation broadband converting system with it, not only reduce the hardware implementing complexity of modulation broadband converting system and realize cost, and can adapt to diversified multi-band signal, dirigibility is good.
The beneficial effect that the present invention brings is, the system architecture that present invention utilizes a FPGA structure is simple, and by mode that FPGA is combined with parallel serial conversion module, generate multi-path pseudorandom sequence simultaneously, the speed of the pseudo-random sequence that FPGA is generated improves, produce pseudo-random sequence be meet Bernoulli Jacob distribution sequence, also by host computer On-line Control FPGA generate pseudo random sequence length and value to adapt to the sampling needs of different original signal.By host computer flexible configuration, can change jump frequency, the maximum jump frequency of cycle pseudo-random sequence that can realize is 2GHz.
Accompanying drawing explanation
Fig. 1 is the principle schematic of the high speed PRBS generator for modulating wide-band transducer of the present invention;
Fig. 2 is the structural representation modulating wide-band transducer in background technology;
Embodiment
Embodiment one: present embodiment is described see Fig. 1, the high speed PRBS generator for modulating wide-band transducer described in present embodiment, it comprises FPGA1, N number of parallel serial conversion module 2, N number of differential to single-ended balancing transformer 3 and high-frequency clock module 4; N is positive integer;
FPGA1, for receiving 8 fractional frequency signals of CLK, under the triggering of 8 fractional frequency signals of CLK, generates the different parallel random series in N road, the synchronous difference control signal that the parallel random series that tranmitting data register control signal, N road are different is simultaneously identical with N road;
High-frequency clock module 4, for receive clock control signal, according to the clock control signal received, produces CLK signal;
Each parallel serial conversion module 2, for receiving CLK signal, a road walks abreast random series and a road synchronous difference control signal, convert parallel random series to serial differential signals that jump frequency is CLK signal frequency and send, sending 8 fractional frequency signals of CLK simultaneously;
Each differential to single-ended balancing transformer 3, for receiving serial differential signals, is transformed to single ended serial signal by serial differential signals, each single ended serial signal is in { the cycle pseudo-random sequence of alternately change between-1 ,+1} with the jump frequency of clock signal.
In present embodiment, CLK signal is clock signal, and when the speed of CLK is 2GHz, the internal logic working clock frequency of FPGA is only 256MHz, greatly reduces the performance requirement to FPGA, thus decreases hardware implementation cost.
FPGA1, for generating random series, stored in FPGA after random series can be produced by MATLAB, also can realize by FPGA internal logic unit.FPGA output multi-channel under the triggering of CLK walks abreast random series, and under internal logic control signal being given high-frequency clock module 4 and parallel serial conversion module 2, FPGA is all operated in the clock frequency of CLK/8.
It is the high-speed clock signal of CLK that high-frequency clock module 4 produces channelized frequencies simultaneously, and the frequency of this clock can pass through host computer flexible configuration.The inside of high-frequency clock module 4 comprises crystal oscillator, clock chip, single-ended-differential balance transformer, clock distributor etc.
Parallel serial conversion module 2 receives the CLK clock signal from high-frequency clock module respectively, and under it triggers, complete parallel-to-serial conversion, output multi-channel jump frequency is the serial differential signals of CLK.8 fractional frequency signals of CLK clock signal are flowed to FPGA as trigger pip by parallel-serial conversion chip simultaneously.
Embodiment two: present embodiment is described see Fig. 1, present embodiment and the difference for the high speed PRBS generator modulating wide-band transducer described in embodiment one are, it also comprises host computer 5,
Host computer 5, for controlling length and the value of the parallel random series generated, also for the frequency of control CLK signal.
Embodiment three: present embodiment is described see Fig. 1, present embodiment and the difference for the high speed PRBS generator modulating wide-band transducer described in embodiment one are, it also comprises power module, and power module is used for providing electric energy to FPGA1, N number of parallel serial conversion module 2, N number of differential to single-ended balancing transformer 3 and high-frequency clock module 4.
Present embodiment, power module comprises the chip that two panels model is LT3021-1.2, a model is the chip of LT1529IQ-3.3, model is the chip of LT3021-1.5 and a model is the chip of LT1963-2.5, wherein (1) two panels LT3021-1.2, powers to the kernel of FPGA11; (2) LT3021-1.5, provides reference power source to parallel serial conversion module; (3) LT1529IQ-3.3, powers to some I/O interface of FPGA, high-frequency clock module, parallel serial conversion module; (4) LT1963-2.5, powers to some I/O interface of FPGA and GCLK clock signal.
Embodiment four: present embodiment is described see Fig. 1, present embodiment and the difference for the high speed PRBS generator modulating wide-band transducer described in embodiment one are, described differential to single-ended balancing transformer 3 adopt model be BD1722J50100AHF chip realize.
Embodiment five: present embodiment is described see Fig. 1, present embodiment and the difference for the high speed PRBS generator modulating wide-band transducer described in embodiment one are, described parallel serial conversion module 2 adopt model be MC100EP446FAG chip realize.
Present embodiment, high-frequency clock module 4 comprises crystal oscillator CVHD-950-100, clock chip LMX2541SQ2060E, single-ended-differential balance transformer B0430J50100A00, clock distributor ADCLK944, this clock distributor is that four tunnels are divided on a road, is a kind of special shape realizing N road pseudo-random sequence.Crystal oscillator exports the clock signal of 100MHz, through clock chip LMX2541SQ2060E frequency division, output frequency is the single-ended clock signal of CLK, this single-ended clock signal is after B0430J50100A00 differential conversion, obtain the differential clocks that impedance is 100 ohm, this differential clocks is LVDS level signal, ADCLK944 clock distribution chip can be directly inputted to, the four road differential clock signals exported from clock chip are LVPECL level, just in time meet the level demand of parallel serial conversion module 2 pairs of input clock signals, without the need to level shifting circuit.
Embodiment six: present embodiment is described see Fig. 1, present embodiment and the difference for the high speed PRBS generator modulating wide-band transducer described in embodiment one are, described FPGA1 employing model is that the chip of EP3C25F324C6N realizes.
Present embodiment, the present invention utilizes this FPGA of the CycloneIII of altera corp series EP3C25F324C6N to produce.The special clock speed that 6 series are supported can up to 403MHz (LVPECL); The output speed of row I/O pin can reach 256MHz.
Embodiment seven: present embodiment is described see Fig. 1, present embodiment and the difference for the high speed PRBS generator modulating wide-band transducer described in embodiment one are, it is 8 bit parallel data that described FPGA1 generates parallel random series.
Embodiment eight: for modulating the high speed PRBS method for generation of wide-band transducer described in present embodiment, this method for generation comprises the steps:
For receiving 8 fractional frequency signals of CLK, under the triggering of 8 fractional frequency signals of CLK, generate the different parallel random series in N road, the step of the synchronous difference control signal that the parallel random series that tranmitting data register control signal, N road are different is simultaneously identical with N road;
For receive clock control signal, according to the clock control signal received, produce the step of CLK signal;
For receiving CLK signal, a road walks abreast random series and a road synchronous difference control signal, converts parallel random series to serial differential signals that jump frequency is CLK signal frequency and sends, sending the step of 8 fractional frequency signals of CLK simultaneously;
For receiving serial differential signals, serial differential signals is transformed to single ended serial signal, each single ended serial signal is in { the step of the cycle pseudo-random sequence alternately changed between-1 ,+1} with the jump frequency of clock signal.
Embodiment nine: present embodiment and the difference for the high speed PRBS method for generation modulating wide-band transducer described in embodiment eight are, this method for generation also comprises the steps:
For controlling length and the value of the parallel random series generated, also for the step of the frequency of control CLK signal.
Claims (9)
1. for modulating the high speed PRBS generator of wide-band transducer, it is characterized in that, it comprises FPGA (1), N number of parallel serial conversion module (2), N number of differential to single-ended balancing transformer (3) and high-frequency clock module (4); N is positive integer;
FPGA (1), for receiving 8 fractional frequency signals of CLK, under the triggering of 8 fractional frequency signals of CLK, generate the different parallel random series in N road, the synchronous difference control signal that the parallel random series that tranmitting data register control signal, N road are different is simultaneously identical with N road;
High-frequency clock module (4), for receive clock control signal, according to the clock control signal received, produces CLK signal;
Each parallel serial conversion module (2), for receiving CLK signal, a road walks abreast random series and a road synchronous difference control signal, convert parallel random series to serial differential signals that jump frequency is CLK signal frequency and send, sending 8 fractional frequency signals of CLK simultaneously;
Each differential to single-ended balancing transformer (3), for receiving serial differential signals, serial differential signals is transformed to single ended serial signal, each single ended serial signal is in { the cycle pseudo-random sequence of alternately change between-1 ,+1} with the jump frequency of clock signal.
2. the high speed PRBS generator for modulating wide-band transducer according to claim 1, is characterized in that, it also comprises host computer (5),
Host computer (5), for controlling length and the value of the parallel random series generated, also for the frequency of control CLK signal.
3. the high speed PRBS generator for modulating wide-band transducer according to claim 1, it is characterized in that, it also comprises power module, and power module is used for providing electric energy to FPGA (1), N number of parallel serial conversion module (2), N number of differential to single-ended balancing transformer (3) and high-frequency clock module (4).
4. the high speed PRBS generator for modulating wide-band transducer according to claim 1, is characterized in that, described differential to single-ended balancing transformer (3) employing model is that the chip of BD1722J50100AHF realizes.
5. the high speed PRBS generator for modulating wide-band transducer according to claim 1, is characterized in that, described parallel serial conversion module (2) employing model is that the chip of MC100EP446FAG realizes.
6. the high speed PRBS generator for modulating wide-band transducer according to claim 1, is characterized in that, described FPGA (1) employing model is that the chip of EP3C25F324C6N realizes.
7. the high speed PRBS generator for modulating wide-band transducer according to claim 1, is characterized in that, it is 8 bit parallel data that described FPGA (1) generates parallel random series.
8. for modulating the high speed PRBS method for generation of wide-band transducer, it is characterized in that, this method for generation comprises the steps:
For receiving 8 fractional frequency signals of CLK, under the triggering of 8 fractional frequency signals of CLK, generate the different parallel random series in N road, the step of the synchronous difference control signal that the parallel random series that tranmitting data register control signal, N road are different is simultaneously identical with N road;
For receive clock control signal, according to the clock control signal received, produce the step of CLK signal;
For receiving CLK signal, a road walks abreast random series and a road synchronous difference control signal, converts parallel random series to serial differential signals that jump frequency is CLK signal frequency and sends, sending the step of 8 fractional frequency signals of CLK simultaneously;
For receiving serial differential signals, serial differential signals is transformed to single ended serial signal, each single ended serial signal is in { the step of the cycle pseudo-random sequence alternately changed between-1 ,+1} with the jump frequency of clock signal.
9. the high speed PRBS method for generation for modulating wide-band transducer according to claim 8, it is characterized in that, this method for generation also comprises the steps:
For controlling length and the value of the parallel random series generated, also for the step of the frequency of control CLK signal.
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| CN108121676A (en) * | 2016-11-28 | 2018-06-05 | 上海贝岭股份有限公司 | Digital signals in parallel input turns serial output circuit |
| CN108121676B (en) * | 2016-11-28 | 2020-09-11 | 上海贝岭股份有限公司 | Circuit for converting digital signal parallel input into serial output |
| CN107979379A (en) * | 2017-11-20 | 2018-05-01 | 北京工业大学 | Modulation wide-band transducer AFE(analog front end) development board based on compressive sensing theory |
| WO2020014993A1 (en) * | 2018-07-16 | 2020-01-23 | 成都吉纬科技有限公司 | Fpga-based method for designing parallel pseudo-random sequence generator |
| CN110208738A (en) * | 2019-06-13 | 2019-09-06 | 哈尔滨工业大学 | Signal frequency and two dimension DOA combined estimation method based on array modulation wide-band transducer |
| CN110208738B (en) * | 2019-06-13 | 2022-12-06 | 哈尔滨工业大学 | Signal frequency and two-dimensional DOA joint estimation method based on array modulation broadband converter |
| CN112162946A (en) * | 2020-09-17 | 2021-01-01 | 中电科仪器仪表有限公司 | 100Gbps pseudo-random pattern generating device |
| CN112450941A (en) * | 2020-11-11 | 2021-03-09 | 南昌大学 | Electrocardiosignal compression sampling device and method based on random demodulation structure |
| CN112558926A (en) * | 2020-12-16 | 2021-03-26 | 扬州海科电子科技有限公司 | Multi-parameter adjustable high-speed pseudo-random code driving source device |
| CN112558926B (en) * | 2020-12-16 | 2024-05-17 | 扬州海科电子科技有限公司 | Multi-parameter adjustable high-speed pseudo-random code driving source device |
| WO2023245727A1 (en) * | 2022-06-22 | 2023-12-28 | 长鑫存储技术有限公司 | Random data generation circuit and read-write training circuit |
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