CN1054012C - Signal transmitting device suitable for fast signal transmission - Google Patents

Signal transmitting device suitable for fast signal transmission Download PDF

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Publication number
CN1054012C
CN1054012C CN95101588A CN95101588A CN1054012C CN 1054012 C CN1054012 C CN 1054012C CN 95101588 A CN95101588 A CN 95101588A CN 95101588 A CN95101588 A CN 95101588A CN 1054012 C CN1054012 C CN 1054012C
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China
Prior art keywords
transmission line
signal
resistance
receiving circuit
circuit
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CN95101588A
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CN1114802A (en
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武隈俊次
山际明
栗原良一
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Maxell Holdings Ltd
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Hitachi Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0278—Arrangements for impedance matching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0292—Arrangements specific to the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0298—Arrangement for terminating transmission lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Logic Circuits (AREA)

Abstract

A signal transmitting device includes a transmitting circuit block having a driving circuit and an intra-block transmission line, a receiving circuit block having a transmitting/receiving circuit and an intra-block transmission line, a receiving circuit for receiving an output signal from the transmitting/receiving circuit, and a next state intra-block transmission line for sending signal between the receiving circuit and the transmitting/receiving circuit. To enable high-speed signal transmission, the main transmission line includes a termination resistor having resistance equal to an impedance of the main transmission line and the intra-block transmission line includes an element having a resistance substantially equal to a value derived by subtracting a half of the impedance value of the main transmission line from an impedance value of the intra-block transmission line.

Description

Be applicable to the signal transmission apparatus of fast signal transmission
The present invention relates to such as CPU and memory devices or and memory integrated circuit between (for example, between each is by cmos element or the digital circuit be made up of the cmos element functional block) signal transmission technology, relate more specifically to the technology by a quick transmission signals of bus, a main transmission line is connecting a plurality of unit on this bus.
Technology as quick transmission signals between the digital circuit of being made up of each semiconductor integrated circuit has proposed a kind of short arc interfacing, is used to propagate have the signal that is low to moderate 1 volt of amplitude of transmission signal.
As the representative example of this short arc interface, a kind of GTL (injection transceiver logic) interface or a kind of CTT (centre cap terminal) interface have been proposed.The Nikkei Electronics magazine on November 27th, 1993 (269 pages to 290 pages) has at length been discussed these short arc interfaces.
Fig. 1 represents that wherein a main transmission line has the structure of prior art of this short arc interface of many branch lines.
Numeral 100 is represented a transmission lines, and it is by terminal power supply 60 and 61 and terminal resistance 50 and 51 terminating.Transmission line 100 is connected with a drive circuit piece 1 and receiving circuit piece 2,3,4.
Transmission line 100 has the resistance in 50 Europe.Each branch line of 11 to 14 has the resistance in 50 Europe.Each terminating resistance 50 and 51 has the resistance in 50 Europe.Each terminating power supply 60 and 61 voltage are 0.5 volt.Transmission or drive circuit 21 have the connection resistance in 10 Europe.
When drive circuit 21 was in logic " height " output state, circuit 21 was operated, and transmission line 11 was received (not shown) on 1 volt the power supply.When drive circuit 21 was in logic " low " output state, circuit 21 was operated, transmission line 11 ground connection, that is, and (not shown) on 0 volt the power supply.Numeral 32 to 34 is represented the receiving circuit that is included in the receiving circuit piece respectively.These receiving circuits are received signal and reference voltage V RefCompare, to determine that received signal is low level or high level.In this structure, V RefIt is 0.5 volt.
Next step will describe when drive circuit 21 from low when being outputted to high output signal be how to send to the point of each on this bus Fig. 1.At first, derive the electromotive force of transmission line 100 when drive circuit 21 is in low output.At this moment this transmission line A voltage of ordering corresponding to 0.5 volt terminating voltage by the given voltage of connection resistance (10 Europe) dividing potential drop of combined resistance of terminal resistance 50 and 51 (50/2=25 Europe) and transtation mission circuit 21.That is, this voltage is exported as:
0.5 volt * 10 Europe/(10 Europe+50 Europe/2)=0.14 (volt)
Then, the electromotive force of this transmission line that is occurred, the following some A that will send to Fig. 1 of such signal will be derived when transtation mission circuit 21 is outputted to high output from hanging down.And then after the output of transtation mission circuit 21 was switched, 1 volt of supply voltage of transtation mission circuit 21 was sent out 50 Europe resistance institute dividing potential drops of the connection resistance (10 Europe) and the transmission line 11 of circuit.Therefore, putting the electromotive force that increases at the A place is exported as:
Initial voltage and boost voltage sum that 1 volt * 50 Europe/(50 Europe+10 Europe)=0.83 (volt) are 0.14 volt, promptly 0.97 volt corresponding to an electromotive force at A place.
When amplitude arrives breakout B by 0.83 volt waveform electromotive force is appearred by following derivation.If see transmission line 100 from transmission line 11, because transmission line 100 is separated into two parts, left part and right part become half of 50 Europe resistance of transmission line 100, i.e. 25 Europe when the practical impedance of seeing the transmission line 100 of past tense from transmission line 11.On the other hand, because the impedance of transmission line 11 is 50 Europe, the result that do not match of this impedance can cause the reflection at the signal of a B.
The following derivation of this reflection coefficient:
(Europe, 50 Europe-25)/(50 Europe+25 Europe)=0.33
This means 1/3rd of 0.83 volt signal amplitude sending to an A, promptly amplitude is that 0.28 volt signal is reflected and turns back to the transtation mission circuit side.Residual amplitude is that 0.55 volt signal is sent on the transmission line 100 as the first transmission ripple.Like this, send the electromotive force of signal corresponding to 0.55 volt and initial potential (0.14 volt) sum.
When the signal that returns transtation mission circuit with amplitude of 0.28 volt arrived transtation mission circuit, this signal was by mirroring and point of arrival B again.2/3rds parts of this signal are by transmission line 100, and the residue three/part of this signal turns back to transmission line 11.According to such effect, this signal is constantly travelled to and fro between transmission line 11.Each this signal waveform point of arrival B, 2/3rds parts of each waveform are output to transmission line 100.By this operation, the 0.83 volt of amplitude that is initially at an A place sends on the transmission line 100 bit by bit discretely.
By some B's and send to 0.69 volt signal point of arrival C of transmission line 100.At this some place, before signal passed through, two transmission lines caused the resistance in 50 Europe separately.Therefore, the result that do not match between the transmission line resistance that the signal in the forward direction combined resistance in 25 Europe and 50 Europe passes through can cause the reflection of signal.
This reflection coefficient is as follows:
(Europe, 50 Europe-25)/(50 Europe+25 Europe)=0.33
The electromotive force of the waveform by a C corresponding to 0.55 volt the signal amplitude at some B place be multiply by transmittance 2/3 (=1-1/3) add the electromotive force that initial potential is derived, promptly
0.55 volt * 2/3+0.14 lies prostrate=0.50 (volt)
Similarly reflection takes place at an E or some G.At an electromotive force at E place is 0.38 volt, and is 0.30 volt at an electromotive force at G place.
These results are illustrated among Fig. 2 A to 2C.Fig. 2 A represents to arrive and leave the signal of a C, that is to say the signal that leaves a C of the signal of the point of arrival C of some B and some D and some E.In order to be illustrated more clearly in them, also expressed the signal at some A place.Similarly, Fig. 2 B represents to arrive and leave the signal of an E.Fig. 2 C represents to arrive and leave the signal of a G.At Fig. 2 A in Fig. 2 C, a signal waveform at digital 201 representative graphs 1 mid point A place.A waveform at numeral 202 representative point B places.A waveform at numeral 203 representative point C places.A waveform at numeral 204 representative point D places.A waveform at numeral 205 representative point E places.A waveform at numeral 206 representative point F places.A waveform at numeral 207 representative point G places.A waveform at numeral 208 representative point H places.When signal descended, similar thing took place.Signal waveform during the signal landing is indicated on Fig. 3 A in Fig. 3 C.In Fig. 3, the numeral 201 to 208 respectively the some A shown in the representative graph 1 to the signal waveform of putting the H place.
According to situation described above, be appreciated that the expression of adopting conventional signal sending circuit can not make invocation point A place exceeds reference voltage V from first signal of drive circuit 21 high level in all receiving circuit pieces Ref(being 0.5V under these conditions), thus can be used to determine that this signal is in high level.In other words, because the reflection of the big degree at difference B, C, E and G place, be attenuated to low-down voltage level at the initial high level voltage of first signal at an A place, down to not surpassing reference voltage V at each receiver place RefTherefore, even transtation mission circuit 21 is designated as a high level, receiver 32,33 and 34 can not identify high level for this first signal.Finally, through signal repeatedly, the voltage level at some B, C and D place will be increased to the very height of points of proximity A place level, and still, before this situation occurred, these receivers can not identify this high voltage.
In transmission line 11, enter the signal of each bar branch line at breakout C, E and G place, reflect again and again in the inside of branch line.When the waveform that is reflected turned back to breakout, 2/3rds parts of this signal entered transmission line 100.This causes the wave distortion on the transmission line 100.
As described above, in above-mentioned prior art, reflection occurs in each breakout place, and the electromotive force decline that is caused by reflection superposes mutually.Like this, the rising in the distant place of drive circuit signal potential is delayed.This causes the increase of disadvantageous time of delay, and has hindered this signal of quick transmission.
And then the signal that enters into the receiving circuit piece is reflected in the receiving circuit part and then enters 100 li of transmission lines.This causes the disadvantageous distortion of signal waveform equally, thereby reduces the reliability of signal transmission.
In order to accelerate signal transmission and to make the signal amplitude on the line 100 diminish, above-mentioned prior art is set and makes that supply voltage is 1 volt.In the circuit of being discussed in the document of mentioning in the above, for 3.3 volts the power supply that adopts in routine is issued to 1 volt amplitude, this drive circuit is set up so that it connects resistance and is about 100 Europe to realize a little amplitude.
Because at present extensively the connection resistance of the transtation mission circuit that adopts is about 10 Europe, in order to adopt the transtation mission circuit of a kind of novelty of Technology Need described in the above mentioned document, and conventional transtation mission circuit can not be used.
And then give 21 1 so bigger connection resistance of transtation mission circuit and cause increasing the power consumption of drive circuit, thereby improved total power consumption unfriendly.
As the structure of another known prior art relevant, can mention people's such as Donaldson No. 4,922,449, United States Patent (USP) with the present invention.This U.S. Patent Publication a kind of in a circuit-line structure circuit block and the circuitry lines structure in the technology of a resistor of equipment between the interblock signal transmssion line, the sort circuit line construction has a plurality of circuit blocks that comprise a drive circuit and a receiving circuit and has the interblock signal transmssion line that is used for transmitting signal between these circuit blocks.The purpose of this resistor of equipment is to reduce the electric current that passes through that is occurred when causing signal conflict because of the power supply handover operation between circuit block,, reduces the amplitude of the signal on the interblock signal transmission bus that is.This resistance is changed to Europe, 20 Europe to 40.This resistance may be to bringing signal reflex at the transmission line of circuit block inside and a breakout between the interblock transmission line.The sort signal reflection may stop the transmission of realization fast signal unfriendly.That is to say that this technology is not determined resistance according to the impedance relationship between the signal transmssion line in interblock signal transmssion line and the piece.
In addition, in JP-B-54-5929, disclose the structure of another kind of prior art, between the signal transmssion line of an interblock signal transmssion line and a circuit block inside, installed a resistor.In the structure of this prior art, resistor of equipment between the circuit block of receiving circuit end and interblock signal transmssion line only, and between circuit block that receiving circuit is housed and interblock signal transmission bus, do not install resistor.Be similar to United States Patent (USP) 4,922, No. 449, signal reflex just take place when the voltage from drive circuit output sends on the interblock signal transmission bus.As structure described above, sort signal reflection overslaugh unfriendly realizes the fast signal transmission.
The applicant is open according to u.s. patent application serial number 08/269,352 (German patent application P4426841.6.Chinese patent application numbers 94114924.2) the technology that is used to address the above problem.
More specifically, present technique discloses a kind of signal transmission apparatus, it comprises first circuit block (transtation mission circuit unit) and second circuit piece (receiving circuit unit), first circuit block has the drive circuit that is used for drive signal and is used for the signal from drive circuit output is sent to transmission line in the piece of outside of this circuit block, the second circuit piece has a receiving circuit that is used for received signal and one and is used for input signal is sent to transmission line in the piece of this receiving circuit, it also comprises an interblock transmission line (main transmission line) that is used for transmission signals between circuit block, an element in this interblock transmission line terminating in this signal transmission apparatus, this element has a resistance that equals or approach this interblock transmission line characteristic impedance value, in piece, also be provided with an element (matched resistor) between transmission line and the interblock transmission line, it has a resistance and equals or approach a value, and this value is that half of impedance that deducts the interblock transmission line the impedance by transmission line in piece draws.
According to above-mentioned technology, this resistor, its resistance approaches to deduct from the impedance of piece interior lines (branch line) half resulting value of the impedance of interblock line (bus), be inserted between branch line and the bus, can prevent the repeated reflection of signal in the branch line like this, and the dividing potential drop effect by this insertion resistance and terminal resistance can make the signal amplitude on the transmission line reduce, thereby can allow to realize high speed transmission of signals.
But receiving circuit unit comprises by the receiving circuit that output be connected of next stage transmission line with the receiving circuit that is connected to main transmission line sometimes.
For example, the address signal circuit of memory module just comprises this receiving circuit, be imported into a drive circuit in case offer the address signal of this memory module, this address signal then is provided in the input circuit of a memory LSI in this memory module from this drive circuit.
In sort circuit, the terminating of main transmission line and signal amplitude that transmission line in the piece is increased in the interface that matched resistor can make main transmission line are diminished, yet be difficult in the interface of next stage transmission and send signal at a high speed, because signal amplitude is still very big in the interface of this transmission line.Therefore, the high-speed transfer of signal is difficult in entire equipment, because signaling rate is restricted on the next stage transmission line.
An object of the present invention is to provide a kind of signal transmission apparatus, even signal amplitude is diminished and with the high-speed transfer signal having under the structure of multistage receiving circuit (receiving circuit also is connected with the output of another receiving circuit by the next stage transmission line in this multilevel hierarchy) sort signal transmission equipment.
In order to achieve the above object, a kind of signal transmission apparatus comprises a circuitry block and a receiving circuit piece, circuitry block has a drive circuit that is used for drive signal that is connected with main transmission line and one and is used for signal is sent to transmission line in the piece of main transmission line from drive circuit, the receiving circuit piece has a transmission/receiving circuit that is connected with main transmission line, and it is used to receive from the signal of main transmission line input and is used for the signal that is received is outputed to next stage; This signal transmission apparatus also comprises transmission line in the stick, a receiving circuit and the interior transmission line of next stage piece, transmission line is used for the signal from the main transmission line input is sent to this transmission/receiving circuit in the piece, receiving circuit is used to receive the signal from the output of transmission/receiving circuit, and transmission line is used for transmission signals between this receiving circuit and this transmission/receiving circuit in the next stage piece, this main transmission line comprises terminating resistor therein, each terminating resistor has the resistance of the impedance that equals this main transmission line, and transmission line comprises an element in the piece, the resistance of this element equals or approaches the value that half resistance value obtained that in the piece resistance value of transmission line deducts main transmission line, this next stage interblock transmission line is comprising terminating resistor, and is provided with an element between the transmission line to produce a voltage drop thereon in this transmission/receiving circuit and next stage piece.
The main transmission line that constitutes the interblock transmission line is by some element institute terminating, each all has the resistance that equals or approach this main transmission line resistance value these elements, and in piece in the transmission line be provided with an element, the resistance of this element equals or approaches half resulting value that in the piece resistance value of transmission line deducts the resistance value of interblock transmission line, like this, sending on the main transmission line through the terminating resistor of main transmission line and the little amplitude signal that is arranged on the element dividing potential drop on the transmission line in the piece (branch line), and the element by being arranged on transmission line in the piece can the repeated reflection of anti-stop signal on the transmission line in piece, thereby allows to realize high speed transmission of signals having on the transmission line of branch line.
And then the output and the element between the interior transmission of next stage piece that are arranged on transmission/receiving circuit can be so that the signal amplitude on the interior transmission line of piece diminish and obtain high speed transmission of signals with the terminal resistance that is connected on the interior transmission line of next stage piece.
In addition, can also adjust and be arranged in transmission/receiving circuit and the next stage piece resistance of the terminating resistor of transmission line in the element between the transmission line and next stage piece, make to adjust to the signal amplitude on the transmission line between the unit to equal or approach the signal amplitude on the transmission line in the next stage piece, therefore can on two kinds of transmission lines, adopt same interface system.
Fig. 1 is a schematic diagram, illustrates that conventional folk prescription is to transmission line;
Fig. 2 A to 2C is a chart, and the signal waveform (guiding waveform) that is occurred under the conventional transmission line situation adopting is described;
Fig. 3 A to 3C is a chart, and the signal waveform (end waveform) that is occurred under the conventional transmission line situation adopting is described;
Fig. 4 is a calcspar, and embodiments of the invention 1 are described;
Fig. 5 is a circuit diagram, and an example of drive circuit is described;
Fig. 6 is a circuit diagram, and an example of differential receiving circuit is described;
Fig. 7 A to 7C is a chart, and the signal waveform (guiding waveform) in the embodiments of the invention 1 is described;
Fig. 8 A to 8C is a chart, and the signal waveform (end waveform) in the embodiments of the invention 1 is described;
Fig. 9 C to 9C is a chart, and the signal waveform (guiding waveform) that is occurred under situation about changing according to the transmission line impedance in the circuit of embodiments of the invention 1 is described;
Figure 10 A to 10C is a chart, and the signal waveform (end waveform) that is occurred under situation about changing according to the transmission line impedance in the circuit of the embodiment of the invention 1 is described;
Figure 11 is a schematic diagram, illustrates that a folk prescription that contains multistage receiving circuit is to transmission line;
Figure 12 is a schematic diagram, and an embodiment is described, wherein the present invention is applied on the transmission line shown in Figure 11;
Figure 13 represents to be installed in the module on the mainboard;
Figure 14 is representation module at length;
Figure 15 is the equivalent circuit diagram of module shown in Figure 14;
Figure 16,18,20,22,24,26,28,29,30,31 and 32 represents the module revised respectively;
Figure 17,19,21,23,25 and 27 is respectively the equivalent circuit diagram of the module revised;
Figure 33 represents the signal waveform in the circuit structure shown in Figure 4;
Figure 34 is illustrated in the signal waveform in the circuit structure shown in Figure 4 under the situation that the resistance of resistor 80 to 83 reduces; And
Figure 35 is illustrated in the signal waveform in the circuit structure shown in Figure 4 under the situation that the resistance of resistor 80 to 83 increases.
To describe embodiments of the invention in detail with reference to accompanying drawing.
First embodiment of folk prescription of the present invention to transmission line used in Fig. 4 explanation in basic calcspar.
In Fig. 4, numeral 1 is represented a drive circuit piece (unit) that has a drive circuit 21.The receiving circuit piece of receiving circuit 32 to 34 is equipped with in numeral 2 to 4 representatives respectively.These circuit blocks comprise resistor 80 to 83 and transmission line 11 to 14 respectively.One transmission lines 100 is connected with circuit block 1 to 4, and the two ends of transfer bus 100 are by resistor 50 and 51 terminating, and each resistor all has the resistance of the characteristic impedance value that equals or approach transmission line 100.
In Fig. 4, transmission line 100 has the resistance in 50 Europe.Branch line 11 to 14 respectively has the resistance in 100 Europe.Each terminating resistor 50 to 51 respectively has the resistance in 50 Europe.Terminating power supply 60 and 61 voltages that move to provide 1.5 volts.Drive circuit 21 has the connection resistance in 10 Europe.
When drive circuit 21 keeps logic " height " output state, drive circuit 21 operations are to link to each other transmission line with the power supply (such as 62 among Fig. 5) of 3V, or when drive circuit 21 kept low output, drive circuit 21 was connected transmission line with ground potential (such as 63 among Fig. 5).In Fig. 4, numeral 32 to 34 is represented receiving circuit.
Resistor 80 to 83 respectively is defined as the resistance with 50 Europe.The method of determining this resistance is discussed below.
Should be noted that in the present embodiment, the two ends of transmission line 100 are all by terminating (resistance).But, if be ready, can resistor of an end terminating to it.In addition, present embodiment provides three receiving circuit pieces that respectively have a receiving circuit.But the present invention can be applicable to comprise that at least one has the signal transmitting apparatus of the piece of receiving circuit.
Fig. 5 represents to be used for the transmission of Fig. 4 structure or an example of drive circuit 21.This drive circuit 21 is push-pull driver circuits, by on push away transistor 70 and pull-down transistor 71 is formed.
Pushing away transistor 70 on shown in Fig. 5 is made of N-channel MOS field-effect transistor (NMOS).The material of transistor 70 is not limited to NMOS.For example, P channel MOS field-effect transistor (PMOS) can be used to make transistor 70.
Mention in front in the Nikkei Electronics document as the prior art structure short arc drive circuit that has this push-pull driver circuit at length has been discussed.But drive circuit has adopted and has had a transistor connecting resistance up to about 100 Europe in this piece article.Just the opposite, the present invention adopts the transistor that resistance is connected in about 10 Europe that has that can extensively obtain.The present invention can adopt conventional drive circuit, because the connection resistance of resistor 80 to 83 and connect the resistance in 100 Europe of the equipment that the resistance addition approaches prior art with transistorized 10 Europe in the present embodiment, the amplitude of amplitude on the transmission line 100 and prior art is about identical size like this.
For example, suppose that the impedance of transmission line 100 and terminating resistor are 50 Europe, the impedance of branch line is 100 Europe, the voltage that the terminating power feed is 1.5 volts, and the voltage of 3 volts of the power feed of drive circuit.Under these hypothesis, have 100 Europe and connect in the transistorized above-mentioned document of resistance on the employed transmission line indicating to adopt, signal amplitude becomes 0.6 volt, and this amplitude is substantially equal to 0.68 volt amplitude on the transmission line 100 shown in Fig. 4.
Be reduced to 10 Europe by connection resistance from 100 Europe, might reduce the power that drive circuit consumes drive circuit 21.For example, under these conditions, adopt 100 Europe to connect the power of devices consume 14.4 milliwatts of resistance in the prior art, and the present invention can reduce power consumption greatly, reduces to 1.9 milliwatts.In addition, present embodiment can adopt and have that to connect resistance be 10 Europe or bigger (being about 50 Europe particularly) drive circuit.Such drive circuit can provide and identical effect recited above.
Then, in Fig. 6, represented an example of receiving circuit among Fig. 4.This receiving circuit is a differential receiving circuit, is used for being higher than or being lower than reference voltage V according to input voltage RefJudge that an input signal is logic high or logic low.Here employed reference voltage can produce in the inside of integrated circuit.But if if the fluctuation that noise or the outside noise that enters cause power supply occurs in the inside of integrated circuit, this reference voltage may correspondingly fluctuate.Like this, preferably from outside feed-in reference voltage.In addition, preferably this receiving circuit is a kind of differential receiving circuit of NMOS type, is used for the effect receiving inputted signal by NMOS.If such receiving circuit is used as reference voltage, the terminating power source voltage is used.In this case, reference voltage equals half of supply voltage.Like this, might receive 1 volt or littler small amplitude wave shape by reference voltage.
As an example, under the following conditions, the amplitude in the receiving circuit is 0.68 volt.Particularly, if the resistance of each terminating resistor 50 and 51 is 50 Europe, each matched resistor 80,81,82 and 83 resistance is that the connection resistance of 75 Europe and drive circuit is 10 Europe, the supply voltage of drive circuit is 3 volts, and the terminating supply voltage is 1.5 volts, when drive circuit is in low output the voltage at each receiving circuit place be 1.16 volts (=1.5 volts-(1.5 volts-0) * (50 Europe/2)/(50 Europe/2+75 Europe+10 Europe)=1.5-0.34), and when drive circuit is in height and exports the voltage at each receiving circuit place be 1.84 volts (=1.5 volts+(3-1.5) * (50/2)/(50/2+75+10)=1.5+0.34).Like this, the amplitude at each receiving circuit place be 0.68 volt (=1.84-1.16).
In Fig. 4, a receiving circuit 32 to 34 has only been described in each circuit block as an example.But the present invention is not subjected to the restriction of the quantity of receiving circuit.
In the signal circuit of described formation, the resistance of each resistor 80 to 83 is changed to half resulting value of the impedance that deducts line 100 impedance that equals transmission line 11 in piece in the above.When the practical impedance from the transmission line 11 direction lines of seeing over 100 need be halved, because branch into two-way at intersection points B place with bus 100 from the signal of drive circuit.That is, can set up following expression formula:
R m＝Z s-Z0/2 (1)
Z wherein sRepresent the impedance of transmission line 11, the impedance of Z0 table line 100, and R mRepresent the resistance of resistor 80.
As from understanding this expression formula, when seeing that from transmission line 11 in the past the resistor 80 and the total impedance of line 100 are made into the impedance that equals transmission line 11 itself.This makes it possible to prevent the repeated reflection of branch line inside.
Can determine resistor 81 to 83 by similar method.After this manner, another piece can have and above-mentioned 1 identical effect.
Next step in order to describe from the effect of the resistor of expression formula (1) derivation, sends to the type of waveform of each point of Fig. 4 below when drive circuit 21 is outputted to high output from hanging down with reference to the circuit diagram discussion of Fig. 4.
At first, need derive the electromotive force of the transmission line 100 that when drive circuit 21 is presented low output, occurs.The voltage of transfer bus equals voltage that 1.5 volts terminating supply voltage is derived by connection resistance (10 Europe) dividing potential drop of the combined resistance of terminating resistor 50 and 51 (25 Europe), resistor 80 (75 Europe) and drive circuit.Particularly, when drive circuit 21 provides low output on the transmission line voltage at B point place as follows:
1.5 volt * (75 Europe+10 Europe)/(10 Europe+75 Europe+25 Europe)=1.16 (volts)
In the circuit of Fig. 4, the signal that drives from drive circuit 21 is not at the B point reflection.Like this, whole signal is sent on the transmission line 100.When this drive circuit switches to when high from low, send to signal potential that B orders and equal supply voltage with the drive circuit of 1.5 volts terminating power supply and 3 volts by the given voltage of the connection electric resistance partial pressure of terminating resistor 50 and 51, resistor 80 and drive circuit.Like this, when drive circuit 21 provides high output, press following derivation in the signal potential that B is ordered: 1.5 volts+(3 volts-1.5 volts) * 25 Europe/(10 Europe+75 Europe+25 Europe)=1.84 (volts)
That is to say that the amplitude that is transferred to the signal of a B is:
1.84 lie prostrate-1.16 volts=0.68 volt
When the amplitude that sends to transmission line 100 is 0.68 volt signal point of arrival C, though see that by the resistor in 75 Europe in the past transmission line is 100 Europe and the transmission line seen from the place ahead is 50 Europe, not matching of this impedance causes reflection, because the all-in resistance in 38.9 Europe of these two lines is different from the resistance in 50 Europe of the transmission line by signal.Carry-over factor is: 1-reflection coefficient=1-(50-38.9)/(50+38.9)=0.875.The electromotive force of the signal by a C equals 0.68 volt the signal amplitude at some B place and carry-over factor 0.875 multiplied each other and adds the value that initial potential draws.That is, the electromotive force of signal is:
0.68=1.76 volts of volt * 0.875+1.16 volts
Similarly reflection takes place at an E or some G place.Electromotive force at an E and some G place is respectively 1.68 volts and 1.61 volts.
These results are presented among Fig. 7 A to 7C.Fig. 7 A represents to lead to and leave the signal waveform of a C, promptly puts the signal waveform at B place, and it leads to the signal waveform at a C and some D and E place, and they leave a C.Similarly, Fig. 7 B represents to lead to and leave the signal waveform of an E.Fig. 7 C represents to lead to and leave the signal waveform of a G.In Fig. 7 A-7C, the signal waveform at digital 702 representative graphs 4 mid point B places.The signal waveform at numeral 703 representative point C places.The signal waveform at numeral 704 representative point D places.The signal waveform at numeral 705 representative point E places.The signal waveform at numeral 706 representative point F places.The signal waveform at numeral 707 representative point G places.The signal waveform at numeral 708 representative point H places.When signal descended, similar thing appearred.This signal waveform constantly is presented among Fig. 8 A to 8C.In Fig. 8 A to 8C, the signal waveform from a B to a H in numeral 702 to 708 representative graphs 4.
In adopting present embodiment under the situation of signal sending circuit of clear description, be appreciated that for any indication might all exceed reference voltage (is 1.5 volts in above-mentioned condition) at each breakout from first signal of the high level of drive circuit 21.Like this, each receiving circuit will be for will discern the high level that is sent out.
This effect of the present invention is fully to cause owing to any value of the resistance of resistor 80 to 83 being taked the resistance that is derived by expression formula (1) and being taked to approach to be derived by expression formula (1).
This point will contrast Figure 33 to 35 and be described.Figure 33 shows the waveform at Fig. 4 mid point A, C, D and H place when the continuous output pulse waveform of transtation mission circuit in circuit structure shown in Fig. 4 21 by the relation between time and the voltage, interblock transmission line (main transmission line) 100 has the resistance in 50 Europe in this circuit structure, transmission line 11 to 14 has the resistance in 100 Europe in each piece, each terminating resistor 50 and 51 has the resistance in 50 Europe, the terminating supply voltage is 1.65 volts, and each resistor 80 to 83 has the resistance in 75 Europe that obtain according to expression formula (1).
In Figure 33, the signal waveform at digital 701 representative point A places.The signal waveform at numeral 703 representative point C places.The signal waveform at numeral 704 representative point D places.The signal waveform at numeral 707 representative point G places.The signal waveform at numeral 708 representative point H places.Visually be difficult to separating, because these two curves are overlapped by the curve of 707 expressions with by 708 curves of representing.
As a comparison, Figure 34 shows when in order to obtain bigger amplitude the waveform of each resistance of resistance value 80 to 83 when 75 Europe change to 50 Europe.In Figure 34, numeral 701,703,704,707 and 708 represents to resemble the waveform at A among Fig. 4, C, D, G and H point place respectively.The resistance in employed here 50 Europe only is by 66% of 75 Europe resistances of expression formula (1) acquisition.As can be as can be seen from Figure 34, can adopt such resistance, without any trouble.
The impedance of if block interior lines is 75 Europe, and for the value of inhibit signal amplitude and Figure 33 is the same, the resistance of each resistor 80 to 83 can be fixed on 75 Europe.The waveform of this situation is presented among Figure 35.In this case, the resistance of each resistor 80 to 83 is by 50% the factor resistance greater than 50 Europe that obtain by expression formula (1).With regard to this point, should be noted that if each resistance of resistor 80 to 83 with respect to before and after the value that obtains by expression formula (1) during about deviation 50%, effect of the present invention still can reach.
Further, in order to strengthen effect of the present invention, preferably the resistance value of resistor 80 to 83 be set to impedance than main transmission line 100 big a value.
Enter into mirroring on the receiving circuit of each signal in correspondence of transmission line 12 to 14 at a C, E, G, turn back to breakout then.Because this circuit keeps impedance well to mate, whole signal engraves in the time of one and sends on the transmission line 100, can be this signal reflex to breakout.
As this figure is represented significantly, be arranged on resistor in the present invention and make to have and to reduce the potential drop that causes because of reflection greatly.And it is insignificant that these resistors make away from the potential drop on the receiving circuit of drive circuit.
By the resistor that has predetermined resistance to be arranged on a transmission line in the circuit block and an intersection point between the interblock transmission line near, can keep the signal amplitude on the transfer bus littler and to send signal at a high speed.
If the resistance of each matched resistor 80 to 84 is R m, each terminating resistor 50 and 51 resistance are R t, and when being V0 by the signal amplitude that drive circuit 21 produces, the signal amplitude on the transmission line 100 is provided by following formula:
V＝0.5×R t×(R m+0.5×R t)×V0 (2)
According to expression formula (1), the impedance Z of transmission line 11 to 14 in impedance Z 0 by using transmission line 100 and the piece s, matched impedance R mCan and then press following expression:
R m＝Z s-Z0/2
In addition, terminating resistor R tResistance make the impedance that equals transmission line 100, that is,
R t＝Z0
When to these expression formulas of respective resistors substitution in the equation 2, be appreciated that on the transmission line 100 signal by
V=0.5 * (Z0/Z s) * V0 provides.
This expression formula can be converted into
V/V0＝0.5×(Z0/Z s) (3)
The ratio of the amplitude of the signal of propagating on transmission line 100 and the amplitude of the signal that is produced by drive circuit 21 equals half of ratio of the impedance of transmission line 11 to 14 in the impedance of transmission line 100 and the piece.That is to say that if the impedance of transmission line 100 is 50 Europe, the impedance of transmission line 11 to 14 is 100 Europe in the piece, and the supply voltage of drive circuit 21 is 3 volts, signal amplitude is given on the transmission line 100
0.5 0.68 volt amplitude of this amplitude of * (50 Europe/100 Europe) * 3 volts=0.75 (volt) and reality is inequality, because do not consider the connection resistance of drive circuit in expression formula (2).
As mentioned above, two impedance Z 0 and the Z by changing transmission line in transmission line 100 and the piece sThe degree that can allow modelled signal amplitude freely to be reduced.
For example, if drive circuit 21 has the connection resistance in 10 Europe, suppose that transmission line has the impedance in 100 Europe and the impedance that transmission line 100 has 25 Europe in the piece, the signal amplitude of transfer bus is calculated as follows:
1.5 volt * 12.5 Europe/(12.5 Europe+87.5 Europe+10 Europe) * 2=0.34 (volt) wherein resistor 80 to 83 respectively has the resistance in 87.5 Europe.Waveform in this case is presented among Fig. 9 A to 9C and Figure 10 A to 10C.In these charts, numeral 702 to 708 is represented as Fig. 4 mid point B to the signal waveform of putting the H place.From chart, can recognize the waveform that has obtained to have less amplitude and little landing.
In this example, because Z0=50 Europe and Z s=75 Europe, according to the signal amplitude of expression formula (3) transmission line 100 be drive circuit 3 volts of supply voltages 1/8th, as following calculating:
0.5×(25/100)＝0.125
And then resistor 80 to 83 has a kind of effect, and it can suppress the reducing of impedance of the transmission line 100 that causes because of the load capacitance in the circuit block.That is, by a resistor is set between transmission line 100 and each circuit block 1 to 5, the interblock transmission line can not directly be seen the electric capacity (that is the summation of the electric capacity of transmission line load electric capacity and driving and receiving circuit) in the circuit block.Like this, just can suppress reducing of transmission line impedance.
In addition, have only the value that reduces terminal resistance just can reduce amplitude, like this, under the situation that needn't change the impedance of transmission line and interblock signal transmssion line in the piece, can obtain having the signal waveform of low decay.
In addition, a receiving circuit unit comprises the receiving circuit that the output with the receiving circuit that is connected to transmission line as shown in Figure 11 is connected sometimes.For example, the address signal circuit of memory module just comprises such receiving circuit.Be imported into a drive circuit in case offer the address signal of memory module, then this signal is provided to the input circuit of memory LSI in the memory module from this drive circuit.
Except that the address signal circuit, exist and a kind ofly be used for sending and receive clock control signal, RAS (row address strobe) signal, CAS (column address strobe) signal the circuit of CS (chip selections) signal and permission signal.
Memory module is a Representative Volume Element in these unit, and the CPU module is listed as the unit that another kind comprises a receiving circuit and a drive circuit.
In such circuit, utilize the terminating resistor 50 and the 51 pairs of transmission lines 100 to carry out terminating and resistor 80 and 81 is connected in the piece on the transmission line 11 to 14, amplitude in the interface on the transmission line 100 is diminished, on the other hand, because the supply voltage of output buffer is 5 volts or 3.3 volts in the interface before the output buffer, this interface has the same big amplitude with TTL or LVTTL, realizes that high speed transmission of signals is difficult.Thereby, because the transmission speed of signal is restricted on transmission line 111 and 112, so can not realize the high speed transmission of signals shown in the previous example.
So, require further improvement the signal transmitting apparatus that is comprising receiving circuit unit shown in Figure 11.
Figure 12 represents can be at an example of multilevel signal transmitting device high speed transmission signals, receiving circuit in this multilevel signal transmitting device further also be connected to transmission line 100 on the output of receiving circuit be connected.
In the circuit of Figure 12, how the characteristics of drive circuit 21 are promptly determined the resistance of resistor 80 to 83 and how signal are sent on circuit 151 and 152 from drive circuit 21, are the same with the explanation of doing with reference to the circuit of Fig. 4.
Below explanation be to being different from the part of Fig. 4, be connected to promptly that the part of the output of circuit 151 and 152 carries out.
Circuit 151 and 152 has the function of differential input circuit and drive circuit.Differential input circuit for example, be to constitute with the circuit shown in Fig. 6, and drive circuit for example, is to constitute with the circuit shown in Fig. 5.
By resistor 84 and transmission line 111, the output of circuit 151 is connected in the input of receiving circuit 35 and 36.By resistor 84 and transmission line 112, the output of circuit 152 is connected in the input of receiving circuit 37 and 38.Further, transmission line 111 is by terminating resistor 131 and 132 terminating, and transmission line 112 is equally by terminating resistor 133 and 134 terminating.
Figure 12 represents to have the structure of many receiving circuit units and the many receiving circuits that have the output that is connected to the receiving circuit that links to each other with transmission line 100, and the invention is not restricted to the quantity of these unit and circuit.
By connecting resistor 84 and 84 and connect terminating resistor between receiving circuit, employed power supply can and make the signal amplitude on the transmission line 111 to 112 diminish by dividing potential drop in circuit 151 and 152 the drive circuit.
Further, by suitably select inserting resistor 84 and 85 and the resistance of terminating resistor 131 to 134, signal amplitude on the transmission line 111 to 112 can be set equal to or approach the signal amplitude on the transmission line 100, and identical like this interface can be used on two kinds of transmission lines of transmission line 100 and transmission line 111 to 112.
Signal amplitude is put basically and is decided to be the signal amplitude that equals on the transmission line 100 and is set and outputs on the transmission line 111 to 112.That is to say, when the resistance of resistor 80 to 83 is R m, resistor 50 and 51 resistance are R t, the resistance of resistor 84 is R m' and the resistance of resistor 131 to 134 be R t' time, the signal amplitude on the transmission line 100 by
0.5 * R t* (R m+ 0.5 * R t) * V0 provides, and wherein V0 is the signal amplitude that drive circuit 21 is produced.
Further, the signal amplitude on the transmission line 111 to 112 by
0.5 * R t' * (R m'+0.5 * R t) * V0 ' provides, and wherein V0 ' is by output circuit 151 and 152 signal amplitudes that produce.
When setting resistor R m, R t, R m' and R t' resistance make two signal amplitudes recited above be equal to each other basically or near the time, on transmission line 100 each in, can adopt identical interface with 111 to 112.
For example, when the connection resistance of the drive circuit of 151,152 li in circuit is set to the 10 Europe resistances identical with the connection resistance of drive circuit 21, when resistor 84 to 85 and resistor 80 to 83 are changed to 75 identical Europe resistances and terminal resistance 131 and 134 resistance are changed to identical with terminal resistance 50 to 51 50 Europe resistances, signal amplitude on the transmission line 111 and 112 becomes 0.68 volt, and it is identical with signal amplitude on the transmission line 100.
As described above, according to the present invention, can be so that the signal amplitude on all buses in the signal circuit reduce, and can constitute the same-interface that adopts same circuits by resistor is set.The present invention can be applied on processor bus, memory bus, system bus, I/O bus or the analog in the computer, and computer can be work station, personal computer and analog, can constitute the high-speed computer system like this.
Now referring to Figure 13 to 29, with the remodeling of some examples of determining of the receiving circuit unit of describing Fig. 4 or Figure 12 and transtation mission circuit unit.
At first, before describing remodeling, by Figure 13 who comprises the circuit example of Fig. 4 or Figure 12 of reference explanation, describing circuit unit is how to be installed on the definite device.
Device shown in Figure 13 comprises a mainboard 170 and is installed in module 171 to 174 on this mainboard.By mainboard 170, module 171 to 174 is connected to each other.
In Figure 13, four modules have been installed as an example, but the quantity of module is not limited to four in the present invention.In addition, in Figure 13, by means of connector 175 to 178 installed modules, but yes is not restricted to and adopts connector in the present invention, and the present invention is not subjected to the restricted number of mainboard upper-part 180 to 192 and the restricted number of module upper-part 183 to 206 yet.
In the equipment shown in Figure 13, module 171 to 174 is corresponding to receiving circuit unit or the transtation mission circuit unit of Fig. 4 or Figure 12, connects that signal transmssion line is not shown between the unit of these circuit units, but they are mounted on the mainboard.
These modules usual practice is really described now.
The module of representing in Figure 14 is a definite example of the receiving circuit unit shown in Figure 15.This module comprises a contact portion 210, is used for to other plate driving with from other plate received signals.The signal that receives through contact portion 210 sends to circuit element 211 to 218 by 81, one circuit 151 of a resistor and a resistor 84.Be used for signal is propagated into wiring terminating on two end on the circuit element from 84 of resistors.
Figure 16 represents a clear and definite example, and the termination two ends of Figure 14 is replaced by the terminating in the transmission end in this example, so that two terminal resistances are reduced to a terminal resistance.In this case, because the quantity of terminal resistance is kept to half, promptly be kept to 1 from 2, in order to make signal amplitude and the signal amplitude on the transmission line 100 on the transmission line 111 equate, the resistance of this terminal resistance compare with the resistance of the terminal resistance of Figure 14 can be kept to the latter half.
Can suppress the reflection of signal by the structure shown in far-end terminating Figure 14, this structure is a structure the most desirable in the high speed transmission of signals.Compare with the structure shown in Figure 16, the structure of Figure 14 is characterised in that and is easier to dispose resistor.
Structure shown in Figure 16 locates to carry out terminating at transmitting terminal (near-end), therefore, it be a kind of remote signaling be reflected and this reflected signal in the repressed structure of near-end.。In this structure, be in a ratio of inhibitory reflex signal demand more time (about twice) with structure shown in Figure 14, but institute's configured parts (terminal resistance) number can be reduced.
In Figure 14 and Figure 16, circuit element 211 is arranged on the line on the module, and has the module arrangement of circuit element in two lines at Figure 18 and 20 li expressions.The expression in Figure 19 and 21 respectively of the equivalent electric circuit of module shown in Figure 18 and 20 li.
Figure 18 represents an example application of the two terminal terminating pattern piece of Figure 14, and these module row are listed in the two-wire.In the sort circuit layout because the quantity of terminal two in Figure 14 are increased to four, for make the signal amplitude on the transmission line 111 and the signal amplitude on the transmission line 100 equates and Figure 14 in impedance phase need double than the resistance of terminal resistance.
In addition, Figure 20 represents an example application of the transmission ends terminating pattern piece of Figure 16, and these module row are listed in the two-wire.In the sort circuit layout, the quantity of terminal is two, and with the same among Figure 14, the terminating resistor value is set to identical with the resistance of terminal resistance in Figure 14 like this.
In the structure of Figure 18, because far-end terminating is identical with form among Figure 14, signal can be suppressed in far-end, and resistor is easy to arrange.Compare with other structure, the structure of Figure 18 can shorten the inhibition required time of signal reflex significantly.
Structure at other is compared, the structure of Figure 20 also can realize quick transmission, and because the relation between the structure of the structure of the relation between the structure of the structure of Figure 20 and Figure 18 and Figure 16 and Figure 14 is identical, the inhibition required time of signal reflex is the twice of required time in the structure among Figure 18 in the structure of Figure 20.
Figure 22,24 and 26 expressions have the two-wire of the transmission line 111 that is arranged to annular and arrange the example of module.Figure 23,25 and 27 represents the equivalent electric circuit of Figure 22,24 and 26 li modules respectively.The mutual difference of module is the terminating position shown in Figure 22,24 and 26 li.Module terminating shown in Figure 22 is on two positions between far-end and the transmitting terminal.Module terminating shown in Figure 24 is on only position of far-end.Module terminating shown in Figure 26 is on the far-end and on the near-end.
In these modules, the resistance of terminal resistance is set to identical with the resistance of the terminal resistance of Figure 14 structure in the structure of the Figure 22 with two terminating positions and Figure 26, be set to half of terminal resistance resistance in Figure 14 structure in the resistance of terminal resistance in the structure of the Figure 24 with a terminating position, like this signal amplitude on the transmission line 111 become with transmission line 100 on signal amplitude equate.
With the assembling of the parts in the one sample loading mode Figure 22 structure of the mode in Figure 20 structure quantity is few, but the time of comparing the signal reflex of Figure 22 STRUCTURE DEPRESSION with the structure of Figure 20 has increased.
Compare with the structure of Figure 22, the inhibition required time of signal reflex has increased by one times in the structure of Figure 24, but the assembling quantity of parts (terminating resistor) has tailed off greatly.
Because the structure terminating of Figure 26 at near-end and far-end, is compared with the structure of Figure 24, reflection obtains more favourable inhibition in the structure of Figure 26.
In addition, Figure 28 represents another kind of module, in this module circular transmission line 111 far-end be disconnected and the transmission line that disconnects in the end that disconnects by terminating.Figure 29 represents that another kind has the module of both sides, and parts are installed in two sections of this module and go up and connect by means of through hole 231 parts.
Compare with ring connection shown in 26 li or ring-type transmission line with Figure 22,24, the structure of Figure 28 has big terminating effect.In the structure of Figure 29, LSI can be assembled on the two sides of plank.
The represented module, can consider different composite modules in top embodiment, such as a module that includes Figure 16 and in the module of two sides assembling, and module described above only is a part wherein.In addition, in Figure 19, provide through hole, but this through hole can be set at far-end, thereby needn't illustrate that the present invention does not limit the position of through hole at transmitting terminal.
In the above embodiments, a signal is sent on all circuit elements 211 to 226, yet the present invention is still effectively for as shown in Figure 30 and 31 signal being sent to part of module.
According to the structure shown in Figure 30 and 31, even the two-wire module also can have the load capacitance identical with the single line module, it helps high-speed cruising like this.
At last, the signal that separates being sent in a kind of circuit of circuit element separately, in data/address bus, can be from being directly connected to circuit element 211 to 218 by resistor 80-83 and 86-89 on the input/output terminal 210, as shown in Figure 32.

Claims (22)

1. signal transmission apparatus, it consists of
Article one, by the main transmission line (100) of first element (50/51) terminating, first element has the resistance of the resistance value that approaches described transmission line;
First circuit block that is connected with described main transmission line, described first circuit block comprises:
The drive circuit (21) that is used for drive signal; And
, first interior transmission line (11) is used to send from the signal of described drive circuit output and comprises second element (80), and the resistance of second element is set up in order to be suppressed at the reflection on the breakout;
The second circuit piece that is connected with described main transmission line, described second circuit piece comprises:
Transmission/receiving circuit (151) is used for received signal and sends the described signal that receives;
Second interior transmission line (12) is used for the signal from described main transmission line input is sent to described transmission/receiving circuit and comprises three element (81), and three-element resistance is set up in order to be suppressed at the reflection on the breakout;
Receiving circuit (35/36) is used to receive the signal from described transmission/receiving circuit output;
The 3rd interior transmission line (111) is used for sending signal between described transmission/receiving circuit and described receiving circuit; And
Be connected the quaternary part that is used for producing voltage drop thereon between described transmission/receiving circuit and described the 3rd interior transmission line.
2. according to the signal transmission apparatus of claim 1, employed reference voltage is that outside from described receiving circuit and described transmission/receiving circuit provides in wherein said receiving circuit and the described transmission/receiving circuit.
3. according to the signal transmission apparatus of claim 1, the ratio of the resistance value of the resistance value of wherein said main transmission line and described first and second interior transmission lines is to be determined by the ratio of the signal amplitude on the described main transmission line with the supply voltage that drives described drive circuit.
4. according to the signal transmission apparatus of claim 1, the ratio of the resistance value of transmission line approximately is two times of ratio of signal amplitude and the supply voltage that drives described drive circuit on the described main transmission line in the resistance value of wherein said main transmission line and described first and second piece.
5. according to the signal transmission apparatus of claim 1, wherein said first and the resistance of quaternary part equates and the resistance of described second, third and the 5th element equates.
6. according to the signal transmission apparatus of claim 1, wherein said drive circuit comprises the output circuit of memory control LSI, and described transmission/receiving circuit comprises buffer LSI and described receiving circuit comprises the accumulator system that is made of memory LSI.
7. according to the signal transmission apparatus of claim 1, wherein respectively the holding of two ends at described the 3rd interior transmission line is provided with the 5th element.
8. according to the signal transmission apparatus of claim 1, wherein the 5th element is arranged on the transmitting terminal of described the 3rd interior transmission line, and the output of described the 3rd interior transmission line and described transmission/receiving circuit links to each other with described the 5th element.
9. according to the signal transmitting apparatus of claim 1, wherein said the second, the third and fourth element resistance equates mutually.
10. according to the signal transmitting apparatus of claim 1, the resistance of wherein said second element equals or approaches to deduct half resulting value in back of the resistance value of described main transmission line from the resistance value of described first interior transmission line.
11. according to the signal transmitting apparatus of claim 7, the resistance of wherein said second element equals or approaches to deduct half resulting value in back of the resistance value of described main transmission line from the resistance value of described first interior transmission line.
12. according to the signal transmitting apparatus of claim 1, wherein said three-element resistance equals or approach to deduct the value that obtains after half of resistance value of described main transmission line from the resistance value of described second interior transmission line.
13. according to the signal transmitting apparatus of claim 7, wherein said three-element resistance equals or approach to deduct the value that obtains after half of resistance value of described main transmission line from the resistance value of described second interior transmission line.
14. according to the signal transmitting apparatus of claim 10, wherein said three-element resistance equals or approach to deduct the value that obtains after half of resistance value of described main transmission line from the resistance value of described second interior transmission line.
15. according to the signal transmitting apparatus of claim 11, wherein said three-element resistance equals or approach to deduct the value that obtains after half of resistance value of described main transmission line from the resistance value of described second interior transmission line.
16. a signal receiving module, it links to each other with main transmission line (100), and main transmission line is by first element institute terminating of the resistance with the resistance value that equals or approach described main transmission line, and this module comprises:
Transmission/receiving circuit (151) is used for received signal and sends described signal;
First interior transmission line (12) is used for the signal from described main transmission line input is sent to described transmission/receiving circuit, and comprises second element (Figure 12,81), and the resistance of second element is set up in order to be suppressed at the reflection on the breakout;
Receiving circuit (35/36) is used to receive the signal from described transmission/receiving circuit output;
Second interior transmission line (111) is used for transmission signals between described transmission/receiving circuit and described receiving circuit; With
Be connected between described transmission/receiving circuit and the described second interior transmission line and in order to produce the three element (84) of voltage drop thereon.
17. according to the signal receiving module of claim 16, employed reference voltage is that outside from described receiving circuit and described transmission/receiving circuit provides in the wherein said receiving circuit and in described transmission/receiving circuit.
18., wherein all provide quaternary part in order to terminating at the two ends of described second interior transmission line according to the signal receiving module of claim 16.
19. signal receiving module according to claim 16, wherein the quaternary part in order to terminating is arranged on the transmitting terminal of described second interior transmission line, and the output of described second interior transmission line and described transmission/receiving circuit links to each other with the transmitting terminal of described second interior transmission line.
20. according to the signal receiving module of claim 16, wherein said transmission/receiving circuit comprises buffering LSI (large scale integrated circuit), and wherein said receiving circuit comprises the storage system of being made up of a plurality of memory LSI.
21. according to the signal receiving module of claim 16, the resistance of wherein said second element equals or approaches to deduct half resulting value in back of the resistance value of described main transmission line from the resistance value of described first interior transmission line.
22. according to the signal receiving module of claim 18, the resistance of wherein said second element equals or approaches to deduct half resulting value in back of the resistance value of described main transmission line from the resistance value of described first interior transmission line.
CN95101588A 1994-02-15 1995-02-15 Signal transmitting device suitable for fast signal transmission Expired - Lifetime CN1054012C (en)

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US8115560B2 (en) * 2010-01-13 2012-02-14 Taiwan Semiconductor Manufacturing Co., Ltd. Ring-shaped voltage control oscillator
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