CN105337635A - Spread spectrum sequence dispreading method and system - Google Patents

Spread spectrum sequence dispreading method and system Download PDF

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CN105337635A
CN105337635A CN201510809698.6A CN201510809698A CN105337635A CN 105337635 A CN105337635 A CN 105337635A CN 201510809698 A CN201510809698 A CN 201510809698A CN 105337635 A CN105337635 A CN 105337635A
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chip
probability
sequence
factor
node
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CN105337635B (en
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赵哲
郑浩
丁旭辉
尹雪
高原
安建平
卜祥元
曾博文
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Beijing Institute of Technology BIT
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Abstract

The invention relates to the technical field of communication, and particularly relates to a spread spectrum sequence dispreading method and system. According to the method, a factor graph of a local pseudorandom sequence is established according to the primitive polynomial and the constraint equation set of the local pseudorandom sequence, and code acquisition and code tracking of the spread spectrum sequence can be completed on the basis of a factor graph model. The spread spectrum sequence dispreading method can realize code acquisition and code tracking on the basis of the factor graph model, has a capacity of correcting the error of a received chip, and can directly output probabilistic information of a corresponding code element of each group of spreading code; and compared with a conventional dispreading calculation method, the dispreading method has the capacity of correcting the error of the received chip to improve the dispreading success rate, can directly output code element probabilistic information required by a subsequent decoding step, and can reduce the subsequent step of converting a dispreading result to the probabilistic information of the code element.

Description

A kind of frequency expansion sequence despreading method and system
Technical field
The present invention relates to communication technical field, be specifically related to a kind of frequency expansion sequence despreading method and system.
Background technology
The spread spectrum communication signal bandwidth referred to for transmission information is far longer than a kind of communication pattern of the bandwidth of information itself.Due to spread spectrum technic there is good in anti-interference performance, multiple access communication can be carried out, the advantage such as good confidentiality, anti-fading, anti-multipath, interference are little, in the recent decade, the rapid every field in commercial communication is widely used.Direct sequence spread spectrum (abbreviation direct sequence spread spectrum) is a kind of major way of spread spectrum, it is by utilizing the frequency expansion sequence of two-forty at the frequency spectrum of transmitting terminal spread signal, and carry out despreading at receiving terminal with identical spread spectrum code sequence, the spread-spectrum signal launched is reduced into original signal.In direct sequence spread spectrum, frequent adopted spread spectrum code sequence is M sequence (obtaining by mending 0 after m sequence).Despreading method in tradition Direct sequence spread spectrum can be divided into two parts: Code acquisition and code tracking; First by Code acquisition determination code phase, then the error of code phase is reduced further by code tracking.It is long that tradition despreading method has capture time, catch rear needs and carry out code tracking further to reduce the shortcoming of phase error, and conventional method do not utilize the restriction relation between each chip of spreading code to reduce the error that each chip provides information.
The problem of the restriction relation between each chip of spreading code is not utilized for conventional spread spectrum method, 2003, KeithM.Chugg and MingruiZhu proposes a kind of Effect-based operation pass-algorithm (IterativeMessagePassingAlgorithm on the basis of the restriction relation between the chip utilizing factor graph model representation M sequence in disclosed ANewApproachtoRapidPNCodeAcquisitionUsingIterativeMessag ePassingTechniques (a kind of pseudo-random code catching method of Effect-based operation pass-algorithm), IMPA) spread spectrum code acquisition method, compared to conventional spread spectrum code capture method, this algorithm can utilize the restriction relation between each chip of M sequence to improve the probability of spread spectrum code acquisition, but there is the slow problem of convergence rate in this algorithm, cause the detection speed of spreading code cannot be satisfactory.
2009, Xu Dingjie and State of Zhao are clearly etc. at the performance evaluation of the disclosed Interference excision algorithm based on IMPA and the innovatory algorithm that proposes in improving based on redundant constaint, i.e. R-IMPA (RedundancyIMPA, the redundant arithmetic that Effect-based operation transmits), this algorithm accelerates the convergence rate of Message Passing Algorithm by the constraint length increasing detection node, thus improves detection speed.
But above-mentioned spread spectrum code acquisition algorithm based on factor graph model only completes the Code acquisition process of frequency expansion sequence, the code tracking process based on factor graph model can not being realized, also needing when connecting to the follow-up decoding portion of system or bit decision part complete spreading steps by traditional despreading method and export corresponding code element information.
Summary of the invention
Technical problem to be solved by this invention is, how to realize the code tracking based on factor graph model.
For the problems referred to above, the present invention proposes a kind of frequency expansion sequence despreading method, comprising:
Step S1, according to the primitive polynomial of local pseudo random sequence and Constrained equations S, set up the factor Ⅱ figure that factor I figure that code element is the local pseudo random sequence of 0 correspondence and code element are the local pseudo random sequence of 1 correspondence;
Chip sequence Y={y in the frequency expansion sequence code element that step S2, basis receive 1, y 2..., y i..., y nnumerical value and factor I figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 0 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 0(x i=1|Y, S) and occur 0 probability P 0(x i=0|Y, S), wherein 1≤i≤n, n > 1;
According to the chip sequence Y={y in the frequency expansion sequence code element received 1, y 2..., y i..., y nnumerical value and factor Ⅱ figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 1 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 1(x i=1|Y, S) and occur 0 probability P 1(x i=0|Y, S);
Step S3, the P exported according to factor I figure 0(x i=1|Y, S) and P 0(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 0(z i1) and P 0(z i2);
According to the P that factor Ⅱ figure exports 1(x i=1|Y, S) and P 1(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 1(z i1) and P 1(z i2),
Wherein P x(z i1) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 0 probability, P x(z i2) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 1 probability, x=0 or 1;
Step S4, to set up the second graph structure that the first graph structure that code element is 0 correspondence and code element are 1 correspondence according to local pseudo random sequence chip lengths;
Step S5, the P will determined according to factor I figure 0(z i1) and P 0(z i2) as the input of the first graph structure ground floor computing node, according to described first graph structure, to P 0(D) carry out computing, calculate code element before spread spectrum be the probability P (D=0) of 0 wherein p 0(z i) be P 0(z i1) or P 0(z i2);
By the P determined according to factor Ⅱ figure 1(z i1) and P 1(z i2) as the input of the second graph structure ground floor computing node, according to described second graph structure, to P 1(D) carry out computing, before calculating spread spectrum, code element is the probability P (D=1) of 1, wherein p 1(z i) be P 1(z i1) or P 1(z i2);
Step S6, as p (D=0) >=p (D=1), judge code element before spread spectrum as 0 probability as p (D=0), code element be 1 probability be 1-p (D=0); As p (D=0) <p (D=1), judge code element before spread spectrum as 1 probability as p (D=1), code element be 0 probability be 1-p (D=1).
Preferably, described step S2 specifically comprises:
Chip sequence Y={y in the frequency expansion sequence code element that step S21, basis receive 1, y 2..., y i..., y nnumerical value, calculate transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 0 0(x i=0|y i) and transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 1 0(x i=1|y i);
Step S22, by P 0(x i=1|y i) as in factor I figure with variable y ithe probability 1 of corresponding variable node inputs, by P 0(x i=0|y i) as in factor I figure with variable y ithe probability 0 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 0(x i=1|Y, S) and P 0(x i=0|Y, S);
By P 1(x i=1|y i) as in factor Ⅱ figure with variable y ithe probability 0 of corresponding variable node inputs, by P 1(x i=0|y i) as in factor Ⅱ figure with variable y ithe probability 1 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 1(x i=1|Y, S) and P 1(x i=0|Y, S).
Preferably, described step S3 specifically comprises:
When local pseudo random sequence i-th chip is 0, choose the P that described factor I figure i-th variable node exports 0(x i=0|Y, S) as P 0(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor I figure i-th variable node exports 0(x i=1|Y, S) as P 0(z i2);
When local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=0|Y, S) as P 1(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=1|Y, S) as P 1(z i2).
Preferably, according to the length of local pseudo random sequence, determine that described first graph structure and described second graph structure are all identical tree structure:
As the length n=2 of local pseudo random sequence ktime, the ground floor of tree structure has 2 k-1individual 2 input or nodes, jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤i≤2 k-j, 1 < j≤k, k > 1;
As the length n=2 of local pseudo random sequence kduring+b, the ground floor of tree structure has 2 k-1individual or node, wherein, b node is 3 inputs or node, and all the other are 2 inputs or node; Jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤b≤2 k-1;
As the length n=2 of local pseudo random sequence k+ 2 k-1during+a, the ground floor of tree structure has 2 k-1+ 2 k-2individual or node, wherein, b is 3 inputs or node, and all the other are 2 inputs or node; The second layer has 2 k-2individual 3 input or nodes; M layer has 2 k-mindividual 2 input or nodes; In the second layer of tree structure, three couples input of the n-th node is connected with the output of 3n-2,3n-1 and 3n node of ground floor respectively; Q node of m layer two couples input respectively with m-1 layer with the output of two nodes connects, wherein 1≤a < 2 k-1, 2<m≤k, 1≤n≤2 k-2, 1≤q≤2 k-m.
A kind of frequency expansion sequence despreading system, comprising:
Factor graph sets up module, for according to the primitive polynomial of local pseudo random sequence and Constrained equations S, sets up the factor Ⅱ figure that factor I figure that code element is the local pseudo random sequence of 0 correspondence and code element are the local pseudo random sequence of 1 correspondence;
First computing module, for the chip sequence Y={y in the frequency expansion sequence code element that basis receives 1, y 2..., y i..., y nnumerical value and factor I figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 0 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 0(x i=1|Y, S) and occur 0 probability P 0(x i=0|Y, S), wherein 1≤i≤n, n > 1; According to the chip sequence Y={y in the frequency expansion sequence code element received 1, y 2..., y i..., y nnumerical value and factor Ⅱ figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 1 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 1(x i=1|Y, S) and occur 0 probability P 1(x i=0|Y, S);
Determination module, for the P exported according to factor I figure 0(x i=1|Y, S) and P 0(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 0(z i1) and P 0(z i2); According to the P that factor Ⅱ figure exports 1(x i=1|Y, S) and P 1(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 1(z i1) and P 1(z i2),
Wherein P x(z i1) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 0 probability, P x(z i2) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 1 probability, x=0 or 1;
Graph structure sets up module, for setting up the second graph structure that the first graph structure that code element is 0 correspondence and code element are 1 correspondence according to local pseudo random sequence chip lengths;
Second computing module, for the P will determined according to factor I figure 0(z i1) and P 0(z i2) as the input of the first graph structure ground floor computing node, according to described first graph structure, to P 0(D) carry out computing, calculate code element before spread spectrum be the probability P (D=0) of 0 wherein p 0(z i) be P 0(z i1) or P 0(z i2); By the P determined according to factor Ⅱ figure 1(z i1) and P 1(z i2) as the input of the second graph structure ground floor computing node, according to described second graph structure, to P 1(D) carry out computing, before calculating spread spectrum, code element is the probability P (D=1) of 1, wherein p 1(z i) be P 1(z i1) or P 1(z i2);
Symbol probability determination module, for as p (D=0) >=p (D=1), judge code element before spread spectrum as 0 probability as p (D=0), code element be 1 probability be 1-p (D=0); As p (D=0) <p (D=1), judge code element before spread spectrum as 1 probability as p (D=1), code element be 0 probability be 1-p (D=1).
Preferably, described first computing module specifically comprises:
First sub-computing module, for the chip sequence Y={y in the frequency expansion sequence code element that basis receives 1, y 2..., y i..., y nnumerical value, calculate transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 0 0(x i=0|y i) and transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 1 0(x i=1|y i);
Second sub-computing module, for by P 0(x i=1|y i) as in factor I figure with variable y ithe probability 1 of corresponding variable node inputs, by P 0(x i=0|y i) as in factor I figure with variable y ithe probability 0 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 0(x i=1|Y, S) and P 0(x i=0|Y, S);
3rd sub-computing module, for by P 1(x i=1|y i) as in factor Ⅱ figure with variable y ithe probability 0 of corresponding variable node inputs, by P 1(x i=0|y i) as in factor Ⅱ figure with variable y ithe probability 1 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 1(x i=1|Y, S) and P 1(x i=0|Y, S).
Preferably, described determination module specifically comprises:
First sub-determination module, for when local pseudo random sequence i-th chip is 0, chooses the P that described factor I figure i-th variable node exports 0(x i=0|Y, S) as P 0(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor I figure i-th variable node exports 0(x i=1|Y, S) as P 0(z i2);
Second sub-determination module, for when local pseudo random sequence i-th chip is 1, chooses the P that described factor Ⅱ figure i-th variable node exports 1(x i=0|Y, S) as P 1(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=1|Y, S) as P 1(z i2).
Preferably, described first graph structure and described second graph structure are all identical tree structure:
As the length n=2 of local pseudo random sequence ktime, the ground floor of tree structure has 2 k-1individual 2 input or nodes, jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤i≤2 k-j, 1 < j≤k, k > 1;
As the length n=2 of local pseudo random sequence kduring+b, the ground floor of tree structure has 2 k-1individual or node, wherein, b node is 3 inputs or node, and all the other are 2 inputs or node; Jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤b≤2 k-1;
As the length n=2 of local pseudo random sequence k+ 2 k-1during+a, the ground floor of tree structure has 2 k-1+ 2 k-2individual or node, wherein, b is 3 inputs or node, and all the other are 2 inputs or node; The second layer has 2 k-2individual 3 input or nodes; M layer has 2 k-mindividual 2 input or nodes; In the second layer of tree structure, three couples input of the n-th node is connected with the output of 3n-2,3n-1 and 3n node of ground floor respectively; Q node of m layer two couples input respectively with m-1 layer with the output of two nodes connects, wherein 1≤a < 2 k-1, 2<m≤k, 1≤n≤2 k-2, 1≤q≤2 k-m.
A kind of frequency expansion sequence despreading method that the present invention proposes, can realize the Code acquisition based on factor graph model and code tracking, have the ability correcting receive chip mistake, and directly can export the probabilistic information often organizing the corresponding code element of spreading code.More traditional despreading computational methods, the ability of the correction receive chip mistake that the despreading computational methods that the present invention proposes have can improve the success rate of despreading, and directly can export the symbol probability information that follow-up decoding procedure needs, follow-up step despread result being converted into symbol probability information can be reduced.
Accompanying drawing explanation
A kind of frequency expansion sequence despreading method schematic flow sheet that Fig. 1 provides for one embodiment of the invention;
Fig. 2 for code element that one embodiment of the invention provides be the structural representation of the factor graph of 0 correspondence;
The length n=2 when local pseudo random sequence that Fig. 3 provides for one embodiment of the invention ktime code element be the tree structure schematic diagram of 0 correspondence;
The length n=2 when local pseudo random sequence that Fig. 4 provides for one embodiment of the invention kduring+b, code element is the tree structure schematic diagram of 0 correspondence;
The length n=2 when local pseudo random sequence that Fig. 5 provides for one embodiment of the invention k+ 2 k-1during+a, code element is the tree structure schematic diagram of 0 correspondence;
A kind of frequency expansion sequence despreading system schematic block diagram that Fig. 6 provides for another embodiment of the present invention.
Embodiment
In order to more clearly understand above-mentioned purpose of the present invention, feature and advantage, below in conjunction with the drawings and specific embodiments, the present invention is further described in detail.It should be noted that, when not conflicting, the feature in the embodiment of the application and embodiment can combine mutually.
Set forth a lot of detail in the following description so that fully understand the present invention; but; the present invention can also adopt other to be different from other modes described here and implement, and therefore, protection scope of the present invention is not by the restriction of following public specific embodiment.
A kind of frequency expansion sequence despreading method schematic flow sheet that Fig. 1 provides for one embodiment of the invention.See Fig. 1, the method comprises:
Step S1, according to the primitive polynomial of local pseudo random sequence and Constrained equations S, set up the factor Ⅱ figure that factor I figure that code element is the local pseudo random sequence of 0 correspondence and code element are the local pseudo random sequence of 1 correspondence;
Chip sequence Y={y in the frequency expansion sequence code element that step S2, basis receive 1, y 2..., y i..., y nnumerical value and factor I figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 0 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 0(x i=1|Y, S) and occur 0 probability P 0(x i=0|Y, S), wherein 1≤i≤n, n > 1;
According to the chip sequence Y={y in the frequency expansion sequence code element received 1, y 2..., y i..., y nnumerical value and factor Ⅱ figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 1 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 1(x i=1|Y, S) and occur 0 probability P 1(x i=0|Y, S);
Step S3, the P exported according to factor I figure 0(x i=1|Y, S) and P 0(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 0(z i1) and P 0(z i2);
According to the P that factor Ⅱ figure exports 1(x i=1|Y, S) and P 1(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 1(z i1) and P 1(z i2),
Wherein P x(z i1) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 0 probability, P x(z i2) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 1 probability, x=0 or 1;
Step S4, to set up the second graph structure that the first graph structure that code element is 0 correspondence and code element are 1 correspondence according to local pseudo random sequence chip lengths;
Step S5, the P will determined according to factor I figure 0(z i1) and P 0(z i2) as the input of the first graph structure ground floor computing node, according to described first graph structure, to P 0(D) carry out computing, calculate code element before spread spectrum be the probability P (D=0) of 0 wherein p 0(z i) be P 0(z i1) or P 0(z i2);
By the P determined according to factor Ⅱ figure 1(z i1) and P 1(z i2) as the input of the second graph structure ground floor computing node, according to described second graph structure, to P 1(D) carry out computing, before calculating spread spectrum, code element is the probability P (D=1) of 1, wherein p 1(z i) be P 1(z i1) or P 1(z i2);
Step S6, as p (D=0) >=p (D=1), judge code element before spread spectrum as 0 probability as p (D=0), code element be 1 probability be 1-p (D=0); As p (D=0) <p (D=1), judge code element before spread spectrum as 1 probability as p (D=1), code element be 0 probability be 1-p (D=1).
Understandable, the P in step S5 0(D) be the probability that chip phase in code element 0 is correct, equal the probability that in code element 0, all chips are identical with local pseudo-random code sequence correspondence position chip long-pending; P 1(D) be the probability that chip phase in code element 1 is correct, equal the probability that in code element 1, all chips are identical with local pseudo-random code sequence correspondence position chip long-pending.
Wherein, described local pseudo random sequence can be M sequence.
For M sequence, described step S1 specifically comprises the following steps:
Step S11, using the left side of primitive polynomial corresponding for M sequence as constraint equation, make it equal 0, build Constrained equations; Suppose that M sequence length is n, the most high math power of primitive polynomial is m, and in Constrained equations, the number of constraint equation is n-m-1.
Be illustrated with 15 M sequence: suppose that 15 M sequence are: [111101011001000], the primitive polynomial of 15 M sequence is x 4+ x+1, its Constrained equations formed is as follows:
x 4 + x 1 + x 0 = 0 x 5 + x 2 + x 1 = 0 x 6 + x 3 + x 2 = 0 . . . x 15 + x 12 + x 11 = 0
Step S12, set up the factor graph corresponding with Constrained equations, each equation in the Constrained equations that step S11 obtains is as the check-node of factor graph, n variable corresponding to M sequence is as variable node, the check-node that variable node is corresponding to the equation of dependent variable with comprising it connects, the factor graph that M sequence is corresponding is obtained after completing all connections, wherein code element be the factor graph of 0 correspondence as shown in Figure 2, to be factor graph structure and the code element of 1 correspondence be code element that 0 corresponding factor graph structure is identical, just input variable is different, does not repeat them here.
As shown from the above technical solution, a kind of frequency expansion sequence despreading method that the present invention proposes, the Code acquisition based on factor graph model and code tracking can be realized, there is the ability correcting receive chip mistake, and directly can export the probabilistic information often organizing the corresponding code element of spreading code.More traditional despreading computational methods, the ability of the correction receive chip mistake that the despreading computational methods that the present invention proposes have can improve the success rate of despreading, and directly can export the symbol probability information that follow-up decoding procedure needs, follow-up step despread result being converted into symbol probability information can be reduced.
Preferably, described step S2 specifically comprises:
Chip sequence Y={y in the frequency expansion sequence code element that step S21, basis receive 1, y 2..., y i..., y nnumerical value, calculate transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 0 0(x i=0|y i) and transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 1 0(x i=1|y i);
Step S22, by P 0(x i=1|y i) as in factor I figure with variable y ithe probability 1 of corresponding variable node inputs, by P 0(x i=0|y i) as in factor I figure with variable y ithe probability 0 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 0(x i=1|Y, S) and P 0(x i=0|Y, S);
By P 1(x i=1|y i) as in factor Ⅱ figure with variable y ithe probability 0 of corresponding variable node inputs, by P 1(x i=0|y i) as in factor Ⅱ figure with variable y ithe probability 1 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 1(x i=1|Y, S) and P 1(x i=0|Y, S).
Alternatively, iterative computation is carried out to factor graph and adopt sum-product algorithm.
Preferably, described step S3 specifically comprises:
When local pseudo random sequence i-th chip is 0, choose the P that described factor I figure i-th variable node exports 0(x i=0|Y, S) as P 0(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor I figure i-th variable node exports 0(x i=1|Y, S) as P 0(z i2);
When local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=0|Y, S) as P 1(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=1|Y, S) as P 1(z i2).
Preferably, according to the length of local pseudo random sequence, determine that described first graph structure and described second graph structure are all identical tree structure:
As the length n=2 of local pseudo random sequence ktime, the most ground floor of tree structure has 2 k-1individual 2 input or nodes, jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤i≤2 k-j, 1 < j≤k, k > 1; Code element be the tree structure of 0 correspondence as shown in Figure 3,1≤x < k in Fig. 3, to be tree structure and the code element of 1 correspondence be code element that 0 corresponding tree structure is identical, and just input variable is different, does not repeat them here.
As the length n=2 of local pseudo random sequence kduring+b, the ground floor of tree structure has 2 k-1individual or node, wherein, b node is 3 inputs or node, and all the other are 2 inputs or node; Jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤b≤2 k-1; Code element be the tree structure of 0 correspondence as shown in Figure 4, to be tree structure and the code element of 1 correspondence be code element that 0 corresponding tree structure is identical, and just input variable is different, does not repeat them here.
As the length n=2 of local pseudo random sequence k+ 2 k-1during+a, the ground floor of tree structure has 2 k-1+ 2 k-2individual or node, wherein, b is 3 inputs or node, and all the other are 2 inputs or node; The second layer has 2 k-2individual 3 input or nodes; M layer has 2 k-mindividual 2 input or nodes; In the second layer of tree structure, three couples input of the n-th node is connected with the output of 3n-2,3n-1 and 3n node of ground floor respectively; Q node of m layer two couples input respectively with m-1 layer with the output of two nodes connects, wherein 1≤a < 2 k-1, 2<m≤k, 1≤n≤2 k-2, 1≤q≤2 k-m; Code element be the tree structure of 0 correspondence as shown in Figure 5, to be tree structure and the code element of 1 correspondence be code element that 0 corresponding tree structure is identical, and just input variable is different, does not repeat them here.
Such as, the length 15=2 of M sequence 3+ 2 3-1+ 3, the tree structure so adopted is: ground floor has 2 3-1+ 2 3-2=6 or node, wherein first 3 is 3 inputs or node, and all the other 3 is 2 inputs or node, from left to right can called after the second layer has 23 and inputs or node, from left to right can called after third layer has 12 and inputs or node, for in the second layer of tree structure, the 1st node three couples input 0 probability input respectively with the 1st, 2 and 3 node of ground floor with 0 probability output connect, second node with the 4th, 5 and 6 node of ground floor with 0 probability output connect; In third layer node with with 0 probability output end of two nodes connects, node 0 probability exported is the probability that sequence of symhols phase place is correct.Have 9 or node in this tree structure, wherein 5 nodes are 3 inputs or node, and all the other 4 is 2 inputs or node.
Suppose that two of the basic calculating node in graph structure are respectively p to input in1(0), p in1and p (1) in2(0), p in2(1), a pair output is p out(0), p out(1), then calculated relationship can be expressed as follows:
p o u t ( 0 ) = p i n 1 ( 0 ) p i n 2 ( 0 ) p o u t ( 1 ) = p i n 1 ( 1 ) p i n 2 ( 0 ) + p i n 1 ( 0 ) p i n 2 ( 1 ) + p i n 1 ( 1 ) p i n 2 ( 1 ) .
If the basic calculating node in graph structure has three to input: p in1(0), p in1(1); p in2(0), p in2(1); p in3(0), p in3(1) and a pair exports p out(0), p out(1), then its calculated relationship can be expressed as follows::
p o u t ( 0 ) = p i n 1 ( 0 ) p i n 2 ( 0 ) p i n 3 ( 0 ) p o u t ( 1 ) = p i n 1 ( 1 ) p i n 2 ( 0 ) p i n 3 ( 0 ) + p i n 1 ( 0 ) p i n 2 ( 1 ) p i n 3 ( 0 ) + p i n 1 ( 0 ) p i n 2 ( 0 ) p i n 3 ( 1 ) p i n 1 ( 1 ) p i n 2 ( 1 ) p i n 3 ( 0 ) + p i n 1 ( 1 ) p i n 2 ( 0 ) p i n 3 ( 1 ) + p i n 1 ( 0 ) p i n 2 ( 0 ) p i n 3 ( 1 ) + p i n 1 ( 1 ) p i n 2 ( 1 ) p i n 3 ( 0 ) .
As shown in Figure 6, a kind of frequency expansion sequence despreading system 100 that another embodiment of the present invention provides, comprising:
Factor graph sets up module 101, for according to the primitive polynomial of local pseudo random sequence and Constrained equations S, sets up the factor Ⅱ figure that factor I figure that code element is the local pseudo random sequence of 0 correspondence and code element are the local pseudo random sequence of 1 correspondence;
First computing module 102, for the chip sequence Y={y in the frequency expansion sequence code element that basis receives 1, y 2..., y i..., y nnumerical value and factor I figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 0 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 0(x i=1|Y, S) and occur 0 probability P 0(x i=0|Y, S), wherein 1≤i≤n, n > 1; According to the chip sequence Y={y in the frequency expansion sequence code element received 1, y 2..., y i..., y nnumerical value and factor Ⅱ figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 1 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 1(x i=1|Y, S) and occur 0 probability P 1(x i=0|Y, S);
Determination module 103, for the P exported according to factor I figure 0(x i=1|Y, S) and P 0(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 0(z i1) and P 0(z i2); According to the P that factor Ⅱ figure exports 1(x i=1|Y, S) and P 1(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 1(z i1) and P 1(z i2),
Wherein P x(z i1) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 0 probability, P x(z i2) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 1 probability, x=0 or 1;
Graph structure sets up module 104, for setting up the second graph structure that the first graph structure that code element is 0 correspondence and code element are 1 correspondence according to local pseudo random sequence chip lengths;
Second computing module 105, for the P will determined according to factor I figure 0(z i1) and P 0(z i2) as the input of the first graph structure ground floor computing node, according to described first graph structure, to P 0(D) carry out computing, calculate code element before spread spectrum be the probability P (D=0) of 0 wherein p 0(z i) be P 0(z i1) or P 0(z i2); By the P determined according to factor Ⅱ figure 1(z i1) and P 1(z i2) as the input of the second graph structure ground floor computing node, according to described second graph structure, to P 1(D) carry out computing, before calculating spread spectrum, code element is the probability P (D=1) of 1, wherein p 1(z i) be P 1(z i1) or P 1(z i2);
Symbol probability determination module 106, for as p (D=0) >=p (D=1), judge code element before spread spectrum as 0 probability as p (D=0), code element be 1 probability be 1-p (D=0); As p (D=0) <p (D=1), judge code element before spread spectrum as 1 probability as p (D=1), code element be 0 probability be 1-p (D=1).
Preferably, described first computing module specifically comprises:
First sub-computing module, for the chip sequence Y={y in the frequency expansion sequence code element that basis receives 1, y 2..., y i..., y nnumerical value, calculate transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 0 0(x i=0|y i) and transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 1 0(x i=1|y i);
Second sub-computing module, for by P 0(x i=1|y i) as in factor I figure with variable y ithe probability 1 of corresponding variable node inputs, by P 0(x i=0|y i) as in factor I figure with variable y ithe probability 0 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 0(x i=1|Y, S) and P 0(x i=0|Y, S);
3rd sub-computing module, for by P 1(x i=1|y i) as in factor Ⅱ figure with variable y ithe probability 0 of corresponding variable node inputs, by P 1(x i=0|y i) as in factor Ⅱ figure with variable y ithe probability 1 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 1(x i=1|Y, S) and P 1(x i=0|Y, S).
Preferably, described determination module specifically comprises:
First sub-determination module, for when local pseudo random sequence i-th chip is 0, chooses the P that described factor I figure i-th variable node exports 0(x i=0|Y, S) as P 0(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor I figure i-th variable node exports 0(x i=1|Y, S) as P 0(z i2);
Second sub-determination module, for when local pseudo random sequence i-th chip is 1, chooses the P that described factor Ⅱ figure i-th variable node exports 1(x i=0|Y, S) as P 1(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=1|Y, S) as P 1(z i2).
Preferably, described first graph structure and described second graph structure are all identical tree structure:
As the length n=2 of local pseudo random sequence ktime, the ground floor of tree structure has 2 k-1individual 2 input or nodes, jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤i≤2 k-j, 1 < j≤k, k > 1;
As the length n=2 of local pseudo random sequence kduring+b, the ground floor of tree structure has 2 k-1individual or node, wherein, b node is 3 inputs or node, and all the other are 2 inputs or node; Jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤b≤2 k-1;
As the length n=2 of local pseudo random sequence k+ 2 k-1during+a, the ground floor of tree structure has 2 k-1+ 2 k-2individual or node, wherein, b is 3 inputs or node, and all the other are 2 inputs or node; The second layer has 2 k-2individual 3 input or nodes; M layer has 2 k-mindividual 2 input or nodes; In the second layer of tree structure, three couples input of the n-th node is connected with the output of 3n-2,3n-1 and 3n node of ground floor respectively; Q node of m layer two couples input respectively with m-1 layer with the output of two nodes connects, wherein 1≤a < 2 k-1, 2<m≤k, 1≤n≤2 k-2, 1≤q≤2 k-m.
As shown from the above technical solution, a kind of frequency expansion sequence despreading method that the present invention proposes, the Code acquisition based on factor graph model and code tracking can be realized, there is the ability correcting receive chip mistake, and directly can export the probabilistic information often organizing the corresponding code element of spreading code.More traditional despreading computational methods, the ability of the correction receive chip mistake that the despreading computational methods that the present invention proposes have can improve the success rate of despreading, and directly can export the symbol probability information that follow-up decoding procedure needs, follow-up step despread result being converted into symbol probability information can be reduced.
In the present invention, term " first ", " second " " 3rd " only for describing object, and can not be interpreted as instruction or hint relative importance.Term " multiple " refers to two or more, unless otherwise clear and definite restriction.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (8)

1. a frequency expansion sequence despreading method, is characterized in that, comprising:
Step S1, according to the primitive polynomial of local pseudo random sequence and Constrained equations S, set up the factor Ⅱ figure that factor I figure that code element is the local pseudo random sequence of 0 correspondence and code element are the local pseudo random sequence of 1 correspondence;
Chip sequence Y={y in the frequency expansion sequence code element that step S2, basis receive 1, y 2..., y i..., y nnumerical value and factor I figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 0 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 0(x i=1|Y, S) and occur 0 probability P 0(x i=0|Y, S), wherein 1≤i≤n, n > 1;
According to the chip sequence Y={y in the frequency expansion sequence code element received 1, y 2..., y i..., y nnumerical value and factor Ⅱ figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 1 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 1(x i=1|Y, S) and occur 0 probability P 1(x i=0|Y, S);
Step S3, the P exported according to factor I figure 0(x i=1|Y, S) and P 0(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 0(z i1) and P 0(z i2);
According to the P that factor Ⅱ figure exports 1(x i=1|Y, S) and P 1(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 1(z i1) and P 1(z i2),
Wherein P x(z i1) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 0 probability, P x(z i2) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 1 probability, x=0 or 1;
Step S4, to set up the second graph structure that the first graph structure that code element is 0 correspondence and code element are 1 correspondence according to local pseudo random sequence chip lengths;
Step S5, the P will determined according to factor I figure 0(z i1) and P 0(z i2) as the input of the first graph structure ground floor computing node, according to described first graph structure, to P 0(D) carry out computing, calculate code element before spread spectrum be the probability P (D=0) of 0 wherein p 0(z i) be P 0(z i1) or P 0(z i2);
By the P determined according to factor Ⅱ figure 1(z i1) and P 1(z i2) as the input of the second graph structure ground floor computing node, according to described second graph structure, to P 1(D) carry out computing, before calculating spread spectrum, code element is the probability P (D=1) of 1, wherein p 1(z i) be P 1(z i1) or P 1(z i2);
Step S6, as p (D=0) >=p (D=1), judge code element before spread spectrum as 0 probability as p (D=0), code element be 1 probability be 1-p (D=0); As p (D=0) <p (D=1), judge code element before spread spectrum as 1 probability as p (D=1), code element be 0 probability be 1-p (D=1).
2. frequency expansion sequence despreading method according to claim 1, is characterized in that, described step S2 specifically comprises:
Chip sequence Y={y in the frequency expansion sequence code element that step S21, basis receive 1, y 2..., y i..., y nnumerical value, calculate transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 0 0(x i=0|y i) and transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 1 0(x i=1|y i);
Step S22, by P 0(x i=1|y i) as in factor I figure with variable y ithe probability 1 of corresponding variable node inputs, by P 0(x i=0|y i) as in factor I figure with variable y ithe probability 0 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 0(x i=1|Y, S) and P 0(x i=0|Y, S);
By P 1(x i=1|y i) as in factor Ⅱ figure with variable y ithe probability 0 of corresponding variable node inputs, by P 1(x i=0|y i) as in factor Ⅱ figure with variable y ithe probability 1 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 1(x i=1|Y, S) and P 1(x i=0|Y, S).
3. frequency expansion sequence despreading method according to claim 1, is characterized in that, described step S3 specifically comprises:
When local pseudo random sequence i-th chip is 0, choose the P that described factor I figure i-th variable node exports 0(x i=0|Y, S) as P 0(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor I figure i-th variable node exports 0(x i=1|Y, S) as P 0(z i2);
When local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=0|Y, S) as P 1(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=1|Y, S) as P 1(z i2).
4. frequency expansion sequence despreading method according to claim 1, is characterized in that, described first graph structure and described second graph structure are all identical tree structure:
As the length n=2 of local pseudo random sequence ktime, the ground floor of tree structure has 2 k-1individual 2 input or nodes, jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤i≤2 k-j, 1 < j≤k, k > 1;
As the length n=2 of local pseudo random sequence kduring+b, the ground floor of tree structure has 2 k-1individual or node, wherein, b node is 3 inputs or node, and all the other are 2 inputs or node; Jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤b≤2 k-1;
As the length n=2 of local pseudo random sequence k+ 2 k-1during+a, the ground floor of tree structure has 2 k-1+ 2 k-2individual or node, wherein, b is 3 inputs or node, and all the other are 2 inputs or node; The second layer has 2 k-2individual 3 input or nodes; M layer has 2 k-mindividual 2 input or nodes; In the second layer of tree structure, three couples input of the n-th node is connected with the output of 3n-2,3n-1 and 3n node of ground floor respectively; Q node of m layer two couples input respectively with m-1 layer with the output of two nodes connects, wherein 1≤a < 2 k-1, 2<m≤k, 1≤n≤2 k-2, 1≤q≤2 k-m.
5. a frequency expansion sequence despreading system, is characterized in that, comprising:
Factor graph sets up module, for according to the primitive polynomial of local pseudo random sequence and Constrained equations S, sets up the factor Ⅱ figure that factor I figure that code element is the local pseudo random sequence of 0 correspondence and code element are the local pseudo random sequence of 1 correspondence;
First computing module, for the chip sequence Y={y in the frequency expansion sequence code element that basis receives 1, y 2..., y i..., y nnumerical value and factor I figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 0 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 0(x i=1|Y, S) and occur 0 probability P 0(x i=0|Y, S), wherein 1≤i≤n, n > 1; According to the chip sequence Y={y in the frequency expansion sequence code element received 1, y 2..., y i..., y nnumerical value and factor Ⅱ figure, calculate the code element chip sequence X={x that transmitting terminal sends when being 1 1, x 2..., x i..., x nthere is the probability P of 1 in each chip under the condition of satisfied local pseudo random sequence Constrained equations S 1(x i=1|Y, S) and occur 0 probability P 1(x i=0|Y, S);
Determination module, for the P exported according to factor I figure 0(x i=1|Y, S) and P 0(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 0(z i1) and P 0(z i2); According to the P that factor Ⅱ figure exports 1(x i=1|Y, S) and P 1(x i=0|Y, S), determine the probability P that i-th chip in the chip sequence that transmitting terminal sends is equal with i-th chip value of local pseudo random sequence 1(z i1) and P 1(z i2),
Wherein P x(z i1) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 0 probability, P x(z i2) for when code element is x transmitting terminal send i-th chip and a local pseudo random sequence i chip be all 1 probability, x=0 or 1;
Graph structure sets up module, for setting up the second graph structure that the first graph structure that code element is 0 correspondence and code element are 1 correspondence according to local pseudo random sequence chip lengths;
Second computing module, for the P will determined according to factor I figure 0(z i1) and P 0(z i2) as the input of the first graph structure ground floor computing node, according to described first graph structure, to P 0(D) carry out computing, calculate code element before spread spectrum be the probability P (D=0) of 0 wherein p 0(z i) be P 0(z i1) or P 0(z i2); By the P determined according to factor Ⅱ figure 1(z i1) and P 1(z i2) as the input of the second graph structure ground floor computing node, according to described second graph structure, to P 1(D) carry out computing, before calculating spread spectrum, code element is the probability P (D=1) of 1, wherein p 1(z i) be P 1(z i1) or P 1(z i2);
Symbol probability determination module, for as p (D=0) >=p (D=1), judge code element before spread spectrum as 0 probability as p (D=0), code element be 1 probability be 1-p (D=0); As p (D=0) <p (D=1), judge code element before spread spectrum as 1 probability as p (D=1), code element be 0 probability be 1-p (D=1).
6. frequency expansion sequence despreading system according to claim 5, is characterized in that, described first computing module specifically comprises:
First sub-computing module, for the chip sequence Y={y in the frequency expansion sequence code element that basis receives 1, y 2..., y i..., y nnumerical value, calculate transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 0 0(x i=0|y i) and transmitting terminal send chip sequence X={x 1, x 2..., x i..., x nin each chip be the probability P of 1 0(x i=1|y i);
Second sub-computing module, for by P 0(x i=1|y i) as in factor I figure with variable y ithe probability 1 of corresponding variable node inputs, by P 0(x i=0|y i) as in factor I figure with variable y ithe probability 0 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 0(x i=1|Y, S) and P 0(x i=0|Y, S);
3rd sub-computing module, for by P 1(x i=1|y i) as in factor Ⅱ figure with variable y ithe probability 0 of corresponding variable node inputs, by P 1(x i=0|y i) as in factor Ⅱ figure with variable y ithe probability 1 of corresponding variable node inputs, and carries out iterative computation, obtain P to factor Ⅱ figure 1(x i=1|Y, S) and P 1(x i=0|Y, S).
7. frequency expansion sequence despreading system according to claim 5, is characterized in that, described determination module specifically comprises:
First sub-determination module, for when local pseudo random sequence i-th chip is 0, chooses the P that described factor I figure i-th variable node exports 0(x i=0|Y, S) as P 0(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor I figure i-th variable node exports 0(x i=1|Y, S) as P 0(z i2);
Second sub-determination module, for when local pseudo random sequence i-th chip is 1, chooses the P that described factor Ⅱ figure i-th variable node exports 1(x i=0|Y, S) as P 1(z i1), when local pseudo random sequence i-th chip is 1, choose the P that described factor Ⅱ figure i-th variable node exports 1(x i=1|Y, S) as P 1(z i2).
8. frequency expansion sequence despreading system according to claim 5, is characterized in that, described first graph structure and described second graph structure are all identical tree structure:
As the length n=2 of local pseudo random sequence ktime, the ground floor of tree structure has 2 k-1individual 2 input or nodes, jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤i≤2 k-j, 1 < j≤k, k > 1;
As the length n=2 of local pseudo random sequence kduring+b, the ground floor of tree structure has 2 k-1individual or node, wherein, b node is 3 inputs or node, and all the other are 2 inputs or node; Jth layer has 2 k-jindividual 2 input or nodes, i-th node of jth layer two couples input respectively with jth-1 layer with the output of two nodes connects, wherein, and 1≤b≤2 k-1;
As the length n=2 of local pseudo random sequence k+ 2 k-1during+a, the ground floor of tree structure has 2 k-1+ 2 k-2individual or node, wherein, b is 3 inputs or node, and all the other are 2 inputs or node; The second layer has 2 k-2individual 3 input or nodes; M layer has 2 k-mindividual 2 input or nodes; In the second layer of tree structure, three couples input of the n-th node is connected with the output of 3n-2,3n-1 and 3n node of ground floor respectively; Q node of m layer two couples input respectively with m-1 layer with the output of two nodes connects, wherein 1≤a < 2 k-1, 2<m≤k, 1≤n≤2 k-2, 1≤q≤2 k-m.
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