CN105335309A - Data transmission method and computer - Google Patents
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- CN105335309A CN105335309A CN201410240221.6A CN201410240221A CN105335309A CN 105335309 A CN105335309 A CN 105335309A CN 201410240221 A CN201410240221 A CN 201410240221A CN 105335309 A CN105335309 A CN 105335309A
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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Abstract
Embodiments of the present invention disclose a data transmission method and a computer, and relates to the field of computer technology, so as to reduce occupancy of a CPU, a bus resource and a memory resource, thereby improving data transmission efficiency. The specific scheme comprises: after receiving a DMA data access request that comprises an identifier of to-be-read data, a first component sending the DMA data access request to a CPU; after receiving the DMA data access request, the CPU acquiring memory address information of the to-be-read data according to the identifier of the to-be-read data; the CPU sending the memory address information of the to-be-read data to the first component; and by using a DDA engine and according to the memory address information of the to-be-read data, the first component acquiring the to-be-read data from a second component. The method provided by the present invention is used in direct data transmission between a first device and a second device.
Description
Technical field
The present invention relates to field of computer technology, particularly relate to a kind of data transmission method and computing machine.
Background technology
Web application refer to use the language development of browser support, run on application on various browser and internet, that may be done to a few specific function.In the use procedure of Web application, there is a large amount of application data transmission between disk and network interface card, its data flow direction comprises the application data transmission from disk to network interface card, or the application data transmission from network interface card to disk.Wherein, central processing unit (CentralProcessingUnit, CPU) carries out at disk and network interface card the function serving forwarding and encapsulated data packet in the process of application data transmission.
Concrete, for application data by disk transfers to the process of network interface card, by application data by disk transfers in the process of network interface card, CPU needs from disk, to read data to be read in kernel mode, by data copy to be read to (first time data copy) in kernel address space buffer area 1, then also need to copy data to be read to user address space buffer area (second time data copy) from kernel address space buffer area, again data to be read are copied to (third time data copy) kernel address space buffer area 2 from user address space buffer area, then data to be read can be transferred to network interface card from kernel address space buffer area 2.
In above-mentioned data transmission procedure, the number of times that CPU carries out data copy is more, occupies cpu bus resource and memory source in a large number, and the efficiency of data transmission is lower.
Summary of the invention
Embodiments of the invention provide a kind of data transmission method and computing machine, can reduce cpu bus resource and memory source takies, and then can improve data transmission efficiency.
For achieving the above object, embodiments of the invention adopt following technical scheme:
The first aspect of the embodiment of the present invention, there is provided a kind of data transmission method, described method is applied in computing machine, and described computing machine comprises central processor CPU, internal memory, first component and second component, be configured with DDA engine in described first component, described method comprises:
Described first component receives direct memory access DMA data access request, and described DMA data access request comprises the mark of data to be read;
Described DMA data access request is sent to described CPU by described first component;
Described CPU, after receiving described DMA data access request, obtains the memory address information of described data to be read according to the mark of described data to be read; The memory address information of described data to be read is used to indicate for preserving the address of the transport addresses information of described data to be read in described internal memory, and the transport addresses information of described data to be read is used to indicate in described second component for preserving the address of described data to be read;
The memory address information of described data to be read is sent to described first component by described CPU;
Described first component, by described DDA engine, according to the memory address information of described data to be read, obtains described data to be read from described second component.
In conjunction with first aspect, in a kind of possible implementation, described internal memory comprises the first virtual buffer unit and the second virtual buffer unit, wherein, the read-write mode of described first virtual buffer unit is corresponding with described second component, the read-write mode of described second virtual buffer unit is corresponding with described first component, and described method also comprises:
The address of described first virtual buffer unit, after receiving described DMA data access request, sends and the mark extremely described second component of described data to be read by described CPU;
The address of described second component according to described first virtual buffer unit and the mark of described data to be read, by the described first virtual buffer unit of the transport addresses information of described data to be read write;
Described CPU reads the transport addresses information of described data to be read from described first virtual buffer unit, and by the described second virtual buffer unit of the transport addresses information of described data to be read write;
The memory address information of described data to be read is sent to described first component by described CPU, comprising:
The address of described second virtual buffer unit is sent to described first component by described CPU.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described first component passes through described DDA engine, according to the memory address information of described data to be read, from described second component, obtain described data to be read, comprising:
Described first component, according to the address of described second virtual buffer unit, obtains the transport addresses information of described data to be read from described second virtual buffer unit;
Described first component, by described DDA engine, according to the instruction of the transport addresses information of described data to be read, reads described data to be read from described second component.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described by the transport addresses information of described data to be read write described second virtual buffer unit before, described method also comprises:
Described CPU is that the transport addresses information of the data described to be read be kept in described first virtual buffer unit adds descriptor, and to generate descriptor message, wherein, described descriptor is for identifying the transport addresses information of described data to be read;
Described CPU, by the described second virtual buffer unit of the transport addresses information of described data to be read write, comprising:
Described CPU is by the described second virtual buffer unit of described descriptor message write.
In conjunction with first aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described first component is network interface card, and described second component is disk;
Or described first component is described disk, described second component is described network interface card.
The second aspect of the embodiment of the present invention, also provides a kind of computing machine, comprising: central processor CPU, internal memory, first component and second component, is configured with DDA engine in described first component;
Described first component, for receiving direct memory access DMA data access request, described DMA data access request comprises the mark of data to be read; Described DMA data access request is sent to described CPU;
Described CPU, for after receiving described DMA data access request, obtains the memory address information of described data to be read according to the mark of described data to be read; The memory address information of described data to be read is used to indicate for preserving the address of the transport addresses information of described data to be read in described internal memory, and the transport addresses information of described data to be read is used to indicate in described second component for preserving the address of described data to be read; The memory address information of described data to be read is sent to described first component;
Described first component, also for receiving the memory address information of described data to be read, by described DDA engine, according to the memory address information of data described to be read being received from described CPU, obtains described data to be read from described second component.
In conjunction with second aspect, in a kind of possible implementation, described internal memory comprises the first virtual buffer unit and the second virtual buffer unit, wherein, the read-write mode of described first virtual buffer unit is corresponding with described second component, and the read-write mode of described second virtual buffer unit is corresponding with described first component;
Described CPU, also for after receiving described DMA data access request, is sent to described second component by the address of described first virtual buffer unit and the mark of described data to be read;
Described second component, for according to the address of described first virtual buffer unit and the mark of described data to be read, by the described first virtual buffer unit of the transport addresses information of described data to be read write;
Described CPU, also for reading the transport addresses information of described data to be read from described first virtual buffer unit, and by the described second virtual buffer unit of the transport addresses information of described data to be read write; The address of described second virtual buffer unit is sent to described first component.
In conjunction with second aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described first component, also for the address according to described second virtual buffer unit, obtains the transport addresses information of described data to be read from described second virtual buffer unit; By described DDA engine, according to the instruction of the transport addresses information of described data to be read, from described second component, read described data to be read.
In conjunction with second aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described CPU, also adds descriptor, to generate descriptor message for the transport addresses information for being kept at the data described to be read in described first virtual buffer unit; By the described second virtual buffer unit of described descriptor message write;
Wherein, described descriptor is for identifying the transport addresses information of described data to be read.
In conjunction with second aspect and above-mentioned possible implementation, in the implementation that another kind is possible, described first component is network interface card, and described second component is disk;
Or described first component is described disk, described second component is described network interface card.
The data transmission method that the embodiment of the present invention provides and computing machine, DMA data access request, after receiving the DMA data access request of the mark comprising data to be read, is sent to CPU by first component; CPU, after receiving DMA data access request, obtains the memory address information of data to be read according to the mark of data to be read; The memory address information of data to be read is used to indicate for preserving the address of the transport addresses information of data to be read in internal memory, and the transport addresses information of data to be read is used to indicate in second component for preserving the address of data to be read; The memory address information of data to be read is sent to first component by CPU; First component, by DDA engine, according to the memory address information of data to be read, obtains data to be read from second component.
With prior art, the cpu bus resource that Data Migrations a large amount of in data transmission procedure causes and memory source take to be compared more greatly, pass through this programme, CPU carries out in the process of data transmission at first component and second component, be only the forwarding capability that first component and second component provide the memory address of data to be transmitted, directly do not transmit data to be transmitted, the data volume of transmission can be reduced, and then cpu bus resource can be reduced and memory source takies, and then data transmission efficiency can be improved.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of data transmission method process flow diagram in the embodiment of the present invention 1;
Fig. 2 is a kind of data transmission method process flow diagram in the embodiment of the present invention 2;
Fig. 3 is the composition schematic diagram of a kind of computing machine in the embodiment of the present invention 3;
Fig. 4 is the composition schematic diagram of the another kind of computing machine in the embodiment of the present invention 3.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
In addition, term " system " and " network " are often used interchangeably in this article herein.Term "and/or" herein, being only a kind of incidence relation describing affiliated partner, can there are three kinds of relations in expression, and such as, A and/or B, can represent: individualism A, exists A and B simultaneously, these three kinds of situations of individualism B.In addition, character "/" herein, general expression forward-backward correlation is to the relation liking a kind of "or".
Computing machine in the embodiment of the present invention can be any one robot calculator products such as PC (PersonalComputer, PC), server, panel computer or mobile phone, and the embodiment of the present invention does not limit this computing machine concrete form.
Concrete, the computing machine in the embodiment of the present invention can comprise central processing unit (CentralProcessingUnit, CPU), internal memory, first component and second component, is configured with DDA engine in first component.Wherein, the embodiment of the present invention specifically can be applied to data to be read and transfer in the process of first component by second component, and namely the embodiment of the present invention specifically can be applied in the process of first component direct reading data to be read from second component.
In the first scene of the embodiment of the present invention, first component in the embodiment of the present invention can be the disk in computing machine, second component can be the network interface card in computing machine, and the disk that namely embodiment of the present invention specifically can be applied in computing machine directly reads in the process of data to be read from the network interface card this computing machine.
In the second scene of the embodiment of the present invention, first component in the embodiment of the present invention can be the network interface card in computing machine, second component can be the disk in computing machine, and the network interface card that namely embodiment of the present invention specifically can be applied in computing machine directly reads in the process of data to be read from the disk this computing machine.
Embodiment 1
The embodiment of the present invention provides a kind of data transmission method, can be applied in computing machine, this computing machine comprises CPU, internal memory, first component and second component, is configured with direct device access (DirectDeviceAccess, DDA) engine in first component; The embodiment of the present invention can be applied in first component and directly transmit in the process of data to second component, and as shown in Figure 1, this data transmission method comprises:
S101, first component receive direct memory access (directmemoryaccess, DMA) data access request, and DMA data access request comprises the mark of data to be read.
Exemplary, the first component in the embodiment of the present invention is the disk in computing machine, and second component is the network interface card in computing machine; Or first component is the network interface card in computing machine, second component is the disk in computing machine.
DMA data access request is sent to CPU by S102, first component.
Wherein, first component is after receiving DMA data access request, DMA data access request can be forwarded to CPU, to make CPU obtain the memory address information of data to be read according to the mark of the data to be read comprised in DMA data access request, namely perform S103:
S103, CPU, after receiving DMA data access request, obtain the memory address information of data to be read according to the mark of data to be read.
Wherein, the memory address information of data to be read is used to indicate for preserving the address of the transport addresses information of data to be read in internal memory, and the transport addresses information of data to be read is used to indicate in second component for preserving the address of data to be read.
Exemplary, the internal memory in the embodiment of the present invention can comprise the first virtual buffer unit and the second virtual buffer unit.Wherein, the read-write mode of the first virtual buffer unit is corresponding with second component, and the read-write mode of the second virtual buffer unit is corresponding with first component.
Wherein, the memory address information of data to be read is specifically for indicating for preserving the address of the transport addresses information of data to be read in the second virtual buffer unit in internal memory, and namely the transport addresses information of data to be read is kept in the second virtual buffer unit in internal memory.
It should be noted that, the transport addresses information of the data to be read of preserving in the second virtual buffer unit is that CPU is after receiving described DMA data access request, the transport addresses information of data to be read is write the first virtual buffer unit by instruction second component, and then the transport addresses information of data to be read will to write the second virtual buffer unit from the first virtual buffer unit.
The memory address information of data to be read is sent to first component by S104, CPU.
Wherein, the memory address information being used to indicate in internal memory the address being used for the transport addresses information of preserving data to be read can be sent to first component by CPU, to make first component can by DDA engine, according to the memory address information of data to be read, directly from second component, obtain data to be read.
S105, first component, by DDA engine, according to the memory address information of data to be read, obtain data to be read from second component.
Exemplary, memory address information due to data to be read is used to indicate in internal memory for preserving the address of the transport addresses information of data to be read, therefore, first component according to the instruction of the memory address information of data to be read, can read the transport addresses information of data to be read from the internal memory of computing machine; Transport addresses information due to data to be read is used to indicate in second component for preserving the address of data to be read, and DDA engine possesses the function of the storer of the miscellaneous part of the computing machine that the same CPU of direct control controls, therefore first component can by being configured in the DDA engine in first component, according to the instruction of the transport addresses information of data to be read, from second component, directly read data to be read.
It should be noted that, the first component in the embodiment of the present invention and second component (i.e. disk and network interface card) all can for the external units self possessing functional processor in computing machine.Processor in disk can be similar to the CPU in computing machine, for arithmetic core and the control core of disk, can control disk read from the internal memory of computing machine or write data, and the DDA engine controlling to be configured in disk directly reads data to be read from network interface card; Processor in network interface card can be similar to the CPU in computing machine, for arithmetic core and the control core of network interface card, can control network interface card read from the internal memory of computing machine or write data, and the DDA engine controlling to be configured in network interface card directly reads data to be read from disk.
The data transmission method that the embodiment of the present invention provides, DMA data access request, after receiving the DMA data access request of the mark comprising data to be read, is sent to CPU by first component; CPU, after receiving DMA data access request, obtains the memory address information of data to be read according to the mark of data to be read; The memory address information of data to be read is used to indicate for preserving the address of the transport addresses information of data to be read in internal memory, and the transport addresses information of data to be read is used to indicate in second component for preserving the address of data to be read; The memory address information of data to be read is sent to first component by CPU; First component, by DDA engine, according to the memory address information of data to be read, obtains data to be read from second component.
With prior art, the cpu bus resource that Data Migrations a large amount of in data transmission procedure causes and memory source take to be compared more greatly, pass through this programme, CPU carries out in the process of data transmission at first component and second component, be only the forwarding capability that first component and second component provide the memory address of data to be transmitted, directly do not transmit data to be transmitted, the data volume of transmission can be reduced, and then cpu bus resource can be reduced and memory source takies, and then data transmission efficiency can be improved.
Embodiment 2
The embodiment of the present invention provides a kind of data transmission method, can be applied in computing machine, this computing machine comprises CPU, internal memory, first component and second component, comprises the first virtual buffer unit and the second virtual buffer unit, be configured with DDA engine in first component in internal memory; The embodiment of the present invention can be applied in first component and directly transmit in the process of data to second component, and as shown in Figure 2, this data transmission method comprises:
S201, first component receive DMA data access request, and DMA data access request comprises the mark of data to be read.
Exemplary, in the first application scenarios of the embodiment of the present invention, first component can be the disk in computing machine, and second component can be the network interface card in computing machine.
In the first application scenarios, first component receives DMA data access request and is specifically as follows: disk receives the DMA system call request from application program, and this DMA system call request is used to indicate disk from network interface card, reads the data from network side (i.e. data to be read) of preserving in network interface card.
In the second application scenarios of the embodiment of the present invention, first component can be the network interface card in computing machine, and second component can be the disk in computing machine.
In the second application scenarios, first component receives DMA data access request and is specifically as follows: network interface card receives the DMA system call request from application program, and this DMA system call request is used to indicate the data to network side (i.e. data to be read) that network interface card is preserved in reading disk from disk, to be transmitted.
DMA data access request is sent to CPU by S202, first component.
Wherein, the DMA data access request comprising the mark of data to be read can be sent to CPU by first component, to obtain the positional information of preserving in disk of data to be read from CPU.
It should be noted that, CPU is after receiving DMA data access request, second component can be indicated to be kept in the internal memory of computing machine by being used to indicate in second component the transport addresses information being used for the address of preserving data to be read, so that CPU can be used to indicate for preserving the memory address information of the address of this transport addresses information in internal memory, so that first component can read data to be read according to the memory address information of data to be read from second component to first component notice.Concrete, the method for the embodiment of the present invention can also comprise:
S203, CPU after receiving DMA data access request, the address of the first virtual buffer unit is sent and the mark of data to be read to second component.
Wherein, the first virtual buffer unit in the embodiment of the present invention is the pseudo-buffer cell in main memory, and the read-write mode of the first virtual buffer unit is corresponding with second component, and namely the read-write mode of the first virtual buffer unit is corresponding with the read-write mode of second component.
It should be noted that, the first virtual buffer unit for CPU is after receiving DMA data access request, can be configured in the pseudo-buffer cell corresponding with the read-write mode of second component in computer hosting.
S204, the second component address according to the first virtual buffer unit and the mark of data to be read, write the first virtual buffer unit by the transport addresses information of data to be read.
Wherein, the mark of address transmission and data to be read that CPU sends the first virtual buffer unit is to second component, be used to indicate second component obtains data to be read transport addresses information (transport addresses information of data to be read is used to indicate in second component for preserving the address of data to be read) according to the mark of data to be read, then according to the address of the first virtual buffer unit, the transport addresses information of data to be read is write the first virtual buffer unit.
It should be noted that, because the read-write mode of the first virtual buffer unit is corresponding with the read-write mode of second component, therefore, the transport addresses information of data to be read directly can be write the first virtual buffer unit by second component.
Exemplary, in the first application scenarios of the embodiment of the present invention, second component can be the network interface card in computing machine, and the read-write mode of the first virtual buffer unit is corresponding with the read-write mode of network interface card in computing machine.
In the second application scenarios of the embodiment of the present invention, second component can be the disk in computing machine, and the read-write mode of the first virtual buffer unit is corresponding with the read-write mode of disk in computing machine.
S205, CPU are that the transport addresses information of the data to be read be kept in the first virtual buffer unit adds descriptor, to generate descriptor message.
Wherein, descriptor is for identifying the transport addresses information of data to be read.
In the first application scenarios of the embodiment of the present invention, first component can be the disk in computing machine, and second component can be the network interface card in computing machine.
In the first application scenarios, CPU is the transport addresses information interpolation descriptor of the data to be read be kept in the first virtual buffer unit is block descriptor.Wherein, block descriptor, for identifying the transport addresses information of data to be read, can supply first component (disk) to identify the transport addresses information of data to be read.
In the second application scenarios of the embodiment of the present invention, first component can be the network interface card in computing machine, and second component can be the disk in computing machine.
In the second application scenarios, CPU is the transport addresses information interpolation descriptor of the data to be read be kept in the first virtual buffer unit is Socket socket descriptor.Wherein, Socket socket descriptor, for identifying the transport addresses information of data to be read, can supply first component (network interface card) to identify the transport addresses information of data to be read.
S206, CPU read descriptor message from the first virtual buffer unit, and descriptor message is write the second virtual buffer unit.
Wherein, the second virtual buffer unit in the embodiment of the present invention is the pseudo-buffer cell in main memory, and the read-write mode of the second virtual buffer unit is corresponding with first component, and namely the read-write mode of the second virtual buffer unit is corresponding with the read-write mode of first component.
It should be noted that, the second virtual buffer unit for CPU is after receiving DMA data access request, can be configured in the pseudo-buffer cell corresponding with the read-write mode of first component in computer hosting; Or the second virtual buffer unit for CPU is after detecting that the transport addresses information of second component by data to be read writes the first virtual buffer unit, can be configured in the pseudo-buffer cell corresponding with the read-write mode of first component in computer hosting.
The address of the second virtual buffer unit is sent to first component by S207, CPU.
Wherein, the address of the second virtual buffer unit can be sent to first component by CPU, so that first component can according to the address of the second virtual buffer unit, from the second virtual buffer unit, obtain the transport addresses information of data to be read, and then directly read data to be read from second component according to the transport addresses information of data to be read.
S208, first component, according to the address of the second virtual buffer unit, obtain the transport addresses information of data to be read from the second virtual buffer unit.
Concrete, first component according to the address of the second virtual buffer unit, can search the descriptor message that with the addition of descriptor in the second virtual buffer unit, then accords with message to obtain the transport addresses information of data to be read according to this descriptor mathematics expression.
Wherein, first component can be determined according to descriptor: in the data of preserving in the second virtual buffer unit, and which data is descriptor message.
S209, first component, by DDA engine, according to the instruction of the transport addresses information of data to be read, read data to be read from second component.
Wherein, first component is after the transport addresses information getting data to be read, then can initiate DDA request, control DDA engine is moved according to the DDA internal memory of other equipment (second component) that the transport addresses information of data to be read is carried out in same bus territory, namely from second component, reads data to be read.
It should be noted that, in computer systems, which, the CPU of computing machine is connected by bus (the main flow bus of current computer-internal is PCIe) with between external unit (as the first component in the embodiment of the present invention and second component), namely by each external unit in a bus system computer for controlling.First component in the embodiment of the present invention and second component are controlled by same bus system by the CPU of computing machine, namely the first component in the embodiment of the present invention and second component belong to same bus territory, have identical bus domain addresses space, therefore, by this bus territory, the DDA engine of first component can identify that same startup has the second component of DDA data-transformation facility, then the address in second component is kept at according to the sensing of data to be read, directly and second component communication, data to be read are read from second component.
Exemplary, first component reads the address of second component, and this address can, as the mapping in bus domain addresses space (as PCIe domain addresses space), also can be equipment private room.
It should be noted that, the DDA data-transformation facility of first component or second component is specifically as follows in first component or second component the register being provided with in advance and being specifically designed to the DDA data transmission carried out in the embodiment of the present invention, and this register support has the mutual access between the equipment (first component and second component) in identical bus domain addresses space.
The data transmission method that the embodiment of the present invention provides, DMA data access request, after receiving the DMA data access request of the mark comprising data to be read, is sent to CPU by first component; CPU, after receiving DMA data access request, obtains the memory address information of data to be read according to the mark of data to be read; The memory address information of data to be read is used to indicate for preserving the address of the transport addresses information of data to be read in internal memory, and the transport addresses information of data to be read is used to indicate in second component for preserving the address of data to be read; The memory address information of data to be read is sent to first component by CPU; First component, by DDA engine, according to the memory address information of data to be read, obtains data to be read from second component.
With prior art, the cpu bus resource that Data Migrations a large amount of in data transmission procedure causes and memory source take to be compared more greatly, pass through this programme, CPU carries out in the process of data transmission at first component and second component, be only the forwarding capability that first component and second component provide the memory address of data to be transmitted, directly do not transmit data to be transmitted, the data volume of transmission can be reduced, and then cpu bus resource can be reduced and memory source takies, and then data transmission efficiency can be improved.
Embodiment 3
Another embodiment of the present invention provides a kind of computing machine, and as shown in Figure 3, this computing machine comprises: central processor CPU 31, internal memory 32, first component 33 and second component 34, is configured with DDA engine in described first component 33.
Described first component 33, for receiving direct memory access DMA data access request, described DMA data access request comprises the mark of data to be read; Described DMA data access request is sent to described CPU31.
Described CPU31, for after receiving described DMA data access request, obtains the memory address information of described data to be read according to the mark of described data to be read; The memory address information of described data to be read is used to indicate for preserving the address of the transport addresses information of described data to be read in described internal memory 32, and the transport addresses information of described data to be read is used to indicate in described second component 34 for preserving the address of described data to be read; The memory address information of described data to be read is sent to described first component 33.
Described first component 33, also for receiving the memory address information of described data to be read, by described DDA engine, according to the memory address information of data described to be read being received from described CPU31, obtains described data to be read from described second component 34.
Further, as shown in Figure 4, described internal memory 32 comprises the first virtual buffer unit 321 and the second virtual buffer unit 322, wherein, the read-write mode of described first virtual buffer unit 321 is corresponding with described second component 34, and the read-write mode of described second virtual buffer unit 322 is corresponding with described first component 33.
Described CPU31, also for after receiving described DMA data access request, is sent to described second component 34 by the address of described first virtual buffer unit and the mark of described data to be read.
Described second component 34, for according to the address of described first virtual buffer unit 321 and the mark of described data to be read, by the described first virtual buffer unit 321 of the transport addresses information of described data to be read write.
Described CPU31, also for reading the transport addresses information of described data to be read from described first virtual buffer unit 321, and by the described second virtual buffer unit 322 of the transport addresses information of described data to be read write; The address of described second virtual buffer unit 322 is sent to described first component 33.
Further, described first component 33, also for the address according to described second virtual buffer unit 322, obtains the transport addresses information of described data to be read from described second virtual buffer unit 322; By described DDA engine, according to the instruction of the transport addresses information of described data to be read, from described second component 34, read described data to be read.
Further, described CPU31, also adds descriptor, to generate descriptor message for the transport addresses information for being kept at the data described to be read in described first virtual buffer unit 321; By the described second virtual buffer unit 322 of described descriptor message write.
Wherein, described descriptor is for identifying the transport addresses information of described data to be read.
Further, in a kind of application scenarios of the embodiment of the present invention, described first component 33 is network interface card, and described second component 34 is disk.
Optionally, in the another kind of application scenarios of the embodiment of the present invention, described first component 33 is described disk, and described second component 34 is described network interface card.
The computing machine that the embodiment of the present invention provides, DMA data access request, after receiving the DMA data access request of the mark comprising data to be read, is sent to CPU by first component; CPU, after receiving DMA data access request, obtains the memory address information of data to be read according to the mark of data to be read; The memory address information of data to be read is used to indicate for preserving the address of the transport addresses information of data to be read in internal memory, and the transport addresses information of data to be read is used to indicate in second component for preserving the address of data to be read; The memory address information of data to be read is sent to first component by CPU; First component, by DDA engine, according to the memory address information of data to be read, obtains data to be read from second component.
With prior art, the cpu bus resource that Data Migrations a large amount of in data transmission procedure causes and memory source take to be compared more greatly, pass through this programme, CPU carries out in the process of data transmission at first component and second component, be only the forwarding capability that first component and second component provide the memory address of data to be transmitted, directly do not transmit data to be transmitted, the data volume of transmission can be reduced, and then cpu bus resource can be reduced and memory source takies, and then data transmission efficiency can be improved.
Through the above description of the embodiments, those skilled in the art can be well understood to, for convenience and simplicity of description, only be illustrated with the division of above-mentioned each functional module, in practical application, can distribute as required and by above-mentioned functions and be completed by different functional modules, the inner structure by device is divided into different functional modules, to complete all or part of function described above.The system of foregoing description, the specific works process of device and unit, with reference to the corresponding process in preceding method embodiment, can not repeat them here.
In several embodiments that the application provides, should be understood that, disclosed system, apparatus and method, can realize by another way.Such as, device embodiment described above is only schematic, such as, the division of described module or unit, be only a kind of logic function to divide, actual can have other dividing mode when realizing, such as multiple unit or assembly can in conjunction with or another system can be integrated into, or some features can be ignored, or do not perform.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, and the indirect coupling of device or unit or communication connection can be electrical, machinery or other form.
The described unit illustrated as separating component or can may not be and physically separates, and the parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of unit wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, also can be that the independent physics of unit exists, also can two or more unit in a unit integrated.Above-mentioned integrated unit both can adopt the form of hardware to realize, and the form of SFU software functional unit also can be adopted to realize.
If described integrated unit using the form of SFU software functional unit realize and as independently production marketing or use time, can be stored in a computer read/write memory medium.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words or all or part of of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprising some instructions in order to make a computer equipment (can be personal computer, server, or the second equipment etc.) or processor (processor) perform all or part of step of method described in each embodiment of the present invention.And aforesaid storage medium comprises: USB flash disk, portable hard drive, ROM (read-only memory) (ROM, Read-OnlyMemory), random access memory (RAM, RandomAccessMemory), magnetic disc or CD etc. various can be program code stored medium.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; change can be expected easily or replace, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.
Claims (10)
1. a data transmission method, is characterized in that, described method is applied in computing machine, and described computing machine comprises central processor CPU, internal memory, first component and second component, is configured with DDA engine in described first component, and described method comprises:
Described first component receives direct memory access DMA data access request, and described DMA data access request comprises the mark of data to be read;
Described DMA data access request is sent to described CPU by described first component;
Described CPU, after receiving described DMA data access request, obtains the memory address information of described data to be read according to the mark of described data to be read; The memory address information of described data to be read is used to indicate for preserving the address of the transport addresses information of described data to be read in described internal memory, and the transport addresses information of described data to be read is used to indicate in described second component for preserving the address of described data to be read;
The memory address information of described data to be read is sent to described first component by described CPU;
Described first component, by described DDA engine, according to the memory address information of described data to be read, obtains described data to be read from described second component.
2. method according to claim 1, it is characterized in that, described internal memory comprises the first virtual buffer unit and the second virtual buffer unit, wherein, the read-write mode of described first virtual buffer unit is corresponding with described second component, the read-write mode of described second virtual buffer unit is corresponding with described first component, and described method also comprises:
The address of described first virtual buffer unit and the mark of described data to be read, after receiving described DMA data access request, are sent to described second component by described CPU;
The address of described second component according to described first virtual buffer unit and the mark of described data to be read, by the described first virtual buffer unit of the transport addresses information of described data to be read write;
Described CPU reads the transport addresses information of described data to be read from described first virtual buffer unit, and by the described second virtual buffer unit of the transport addresses information of described data to be read write;
The memory address information of described data to be read is sent to described first component by described CPU, comprising:
The address of described second virtual buffer unit is sent to described first component by described CPU.
3. method according to claim 2, is characterized in that, described first component, by described DDA engine, according to the memory address information of described data to be read, obtains described data to be read, comprising from described second component:
Described first component, according to the address of described second virtual buffer unit, obtains the transport addresses information of described data to be read from described second virtual buffer unit;
Described first component, by described DDA engine, according to the instruction of the transport addresses information of described data to be read, reads described data to be read from described second component.
4. method according to claim 2, is characterized in that, described by the transport addresses information of described data to be read write described second virtual buffer unit before, described method also comprises:
Described CPU is that the transport addresses information of the data described to be read be kept in described first virtual buffer unit adds descriptor, and to generate descriptor message, wherein, described descriptor is for identifying the transport addresses information of described data to be read;
Described CPU, by the described second virtual buffer unit of the transport addresses information of described data to be read write, comprising:
Described CPU is by the described second virtual buffer unit of described descriptor message write.
5. the method according to any one of claim 1-3, is characterized in that, described first component is network interface card, and described second component is disk;
Or described first component is described disk, described second component is described network interface card.
6. a computing machine, is characterized in that, comprising: central processor CPU, internal memory, first component and second component, is configured with DDA engine in described first component;
Described first component, for receiving direct memory access DMA data access request, described DMA data access request comprises the mark of data to be read; Described DMA data access request is sent to described CPU;
Described CPU, for after receiving described DMA data access request, obtains the memory address information of described data to be read according to the mark of described data to be read; The memory address information of described data to be read is used to indicate for preserving the address of the transport addresses information of described data to be read in described internal memory, and the transport addresses information of described data to be read is used to indicate in described second component for preserving the address of described data to be read; The memory address information of described data to be read is sent to described first component;
Described first component, also for receiving the memory address information of described data to be read, by described DDA engine, according to the memory address information of data described to be read being received from described CPU, obtains described data to be read from described second component.
7. computing machine according to claim 6, it is characterized in that, described internal memory comprises the first virtual buffer unit and the second virtual buffer unit, wherein, the read-write mode of described first virtual buffer unit is corresponding with described second component, and the read-write mode of described second virtual buffer unit is corresponding with described first component;
Described CPU, also for after receiving described DMA data access request, is sent to described second component by the address of described first virtual buffer unit and the mark of described data to be read;
Described second component, for according to the address of described first virtual buffer unit and the mark of described data to be read, by the described first virtual buffer unit of the transport addresses information of described data to be read write;
Described CPU, also for reading the transport addresses information of described data to be read from described first virtual buffer unit, and by the described second virtual buffer unit of the transport addresses information of described data to be read write; The address of described second virtual buffer unit is sent to described first component.
8. computing machine according to claim 7, is characterized in that, described first component, also for the address according to described second virtual buffer unit, obtains the transport addresses information of described data to be read from described second virtual buffer unit; By described DDA engine, according to the instruction of the transport addresses information of described data to be read, from described second component, read described data to be read.
9. computing machine according to claim 7, is characterized in that, described CPU, also adds descriptor, to generate descriptor message for the transport addresses information for being kept at the data described to be read in described first virtual buffer unit; By the described second virtual buffer unit of described descriptor message write;
Wherein, described descriptor is for identifying the transport addresses information of described data to be read.
10. the computing machine according to any one of claim 6-8, is characterized in that, described first component is network interface card, and described second component is disk;
Or described first component is described disk, described second component is described network interface card.
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| CN201410240221.6A CN105335309B (en) | 2014-05-30 | 2014-05-30 | A kind of data transmission method and computer |
| PCT/CN2015/072670 WO2015180513A1 (en) | 2014-05-30 | 2015-02-10 | Data transmission method and computer |
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Also Published As
| Publication number | Publication date |
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| CN105335309B (en) | 2018-09-11 |
| WO2015180513A1 (en) | 2015-12-03 |
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