CN105306306A - Link connectivity detection system and method - Google Patents
Link connectivity detection system and method Download PDFInfo
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- CN105306306A CN105306306A CN201510772567.5A CN201510772567A CN105306306A CN 105306306 A CN105306306 A CN 105306306A CN 201510772567 A CN201510772567 A CN 201510772567A CN 105306306 A CN105306306 A CN 105306306A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
- H04L43/0811—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking connectivity
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Abstract
The invention relates to the field of automatic testing, in particular to a PCIE equipment link connectivity detection system and a method. The invention detects the link connectivity of the PCIE equipment and the downstream equipment by reading the link state information in the attribute file of the PCIE equipment, realizes the action process from the stable connection to the disconnection to the recovery of the link state between the PCIE equipment and the downstream equipment by controlling, and judges whether the link state information values of the PCIE equipment and the downstream equipment before and after the action are equal to verify the success and the failure of the link connection of the PCIE equipment. The invention can quickly and accurately verify the dynamically changed link connectivity of the PCIE equipment and more effectively achieve the test aim.
Description
Technical field
The present invention relates to a kind of automatic test field, particularly relate to a kind of PCIE (PeripheralComponentInterconnectExpress, peripheral component interconnect standard) device link detection of connectivity system and method.
Background technology
Present stage often adopts the current information speed and current bandwidth information that read this PCIE device to verify the operating state of PCIE device.And simply read when the information rate of PCIE device and bandwidth information can only illustrate this PCIE device static state and be in normal operating conditions, the bandwidth that static state obtains and information rate are the reactions of PCIE device state after starting system, if link connection state changes, then static acquisition methods can't detect the link connection state of dynamic change, and this can cause and detect imperfect to PCIE device connectivity of link.
Summary of the invention
In view of this, be necessary to provide a kind of connectivity of link detection system to solve the problems referred to above.
A kind of connectivity of link detection system, is applied in an electronic installation, and this system is for detecting the connectivity of link of PCIE device in this electronic installation and upstream device, and this system comprises:
Searching module, for determining the property file of PCIE device in the file system of this electronic installation to be detected, and determining the store path of this property file;
Read module, for according to searching property file that module determines and store path reads and stores the link-state information of this PCIE device from this property file, and tentatively judge this PCIE device according to the link-state information of the PCIE device got and whether be in link connection state with the link that this PCIE device is carried out between the upstream device that communicates;
Link connects training module, for realizing being connected to disconnection again to the change procedure recovered and whether actual the Link State detected this PCIE device and upstream device within the default time experienced by this change procedure by stable tentatively determining to control after the link between PCIE device and upstream device is in link connection state this PCIE device and upstream device Link State;
Authentication module, for determining that actual experienced by within the time of presetting of the Link State between PCIE device and upstream device is connected to disconnection again after the change recovered by stable, obtain the PCIE device current link conditions value of information, and judge that whether the link-state information value of this PCIE device that in this PCIE device, the current link conditions value of information and read module read in advance is equal, and judge the link successful connection between this PCIE device and upstream device when determining equal.
A kind of link connectivity detection method, be applied in a connectivity of link detection system, the method comprising the steps of:
Determine the property file of PCIE device in the file system of this electronic installation to be detected, and determine the store path of this property file;
Read from this property file according to the property file obtained and store path thereof and store the link-state information of this PCIE device and the link-state information of PCIE device that basis gets tentatively judges this PCIE device and whether is in link connection state with the link that this PCIE device is carried out between the upstream device that communicates;
Realize being connected to disconnection again to the change procedure recovered and whether actual the Link State detected this PCIE device and upstream device within the default time experienced by this change procedure by stable tentatively determining to control after the link between PCIE device and upstream device is in link connection state this PCIE device and upstream device Link State;
Obtain the PCIE device current link conditions value of information, and judge that in this PCIE device, whether the current link conditions value of information is equal with the link-state information value of this PCIE device read in advance, and judge the link successful connection between this PCIE device and upstream device when determining equal.
Connectivity of link detection system of the present invention and method detect the connectivity of link of PCIE device and upstream device by the link-state information read in the property file of PCIE device and are connected to disconnection again to the course of action recovered by the Link State between control realization PCIE device and upstream device by stable, judge that whether PCIE device and the upstream device link-state information value before and after this action is equal and verify that the successful connection of PCIE device link can verify the connectivity of link of PCIE device dynamic change fast and accurately with failure, more effectively reach test purpose.
Accompanying drawing explanation
Fig. 1 is the running environment figure of an embodiment of the present invention link detection of connectivity system.
Fig. 2 is the functional block diagram of an embodiment of the present invention link detection of connectivity system 100.
Fig. 3 is the flow chart of an embodiment of the present invention link method for detecting connectivity.
Main element symbol description
| Connectivity of link detection system | 100 |
| Electronic installation | 200 |
| Memory cell | 10 |
| Processing unit | 20 |
| PCIE device | 30 |
| Upstream device | 40 |
| Search module | 110 |
| Read module | 120 |
| Link connects training module | 130 |
| Authentication module | 140 |
Following embodiment will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Embodiment
Please refer to Fig. 1, is the running environment figure of an embodiment of the present invention link detection of connectivity system 100.This system 100 operates in an electronic installation 200, and this electronic installation 200 can be a personal computer or a server.This electronic installation 200 comprises memory cell 10, processing unit 20, at least one PCIE device 30 and carries out being connected the upstream device 40 communicated with this PCIE device 30.This connectivity of link detection system 100 is stored in this memory cell 10, and can be called execution by this processing unit 20.In other embodiments, this system 100 is for being solidificated in the program in processing unit 20.The associated drives of this PCIE device 30 in the process of the operating system of electronic installation 200 by searching PCIE device 30 according to the method for recursive scanning PCI (PeripheralComponentInterconnect) bus, simultaneously in the process of scanning PCIE device 30, a property file can be created for each PCIE device 30, and designated store path.This PCIE device 30 can for the one in the video card of employing PCIE interface, sound card or network interface card.Wherein, this upstream device 40 can be a PCIE device equally.This connectivity of link detection system 100 is passed through the link-state information read in the property file of PCIE device 30 and is detected the connectivity of link of PCIE device 30 and upstream device 40 and be connected to disconnection again to the course of action recovered by the Link State between control realization PCIE device 30 and upstream device 40 by stable, judges that whether PCIE device 30 and the upstream device 40 link-state information value before and after this action is equal and verifies whether PCIE device link connects successful or failed.
Please refer to Fig. 2, is the functional block diagram of an embodiment of the present invention link detection of connectivity system 100.This system comprises searches module 110, read module 120, link connection training module 130 and authentication module 140.Module alleged by the present invention has been the program segment of certain function, is more suitable for describing the effect of software in processing unit 20 than program.This searches module 110 for determining the property file of PCIE device 30 in the file system of electronic installation 200 to be detected, and determines the store path of this property file in file system.Wherein, the data content of this property file comprises the link-state information such as bandwidth and information rate of this PCIE device 30.Wherein, the mapping table of each PCIE device 30 and storage directory is stored in this memory cell 10, this storage directory comprises title and the store path of the property file of PCIE device 30, and this searches module 110 by searching this mapping table to determine the property file corresponding with this PCIE device 30 and store path.
This read module 120 is for according to the link-state information value of searching property file that module 110 determines and store path thereof and read from this property file this PCIE device 30.The link-state information value of this PCIE device 30 is stored in this from this property file.Present embodiment, can read the link-state informations such as the bandwidth sum information rate in the property file of each PCIE device 30 by system pread () function.
This read module 120 is also for tentatively judging this PCIE device 30 and whether being in link connection state with the link that this PCIE device 30 is carried out between the upstream device 40 that communicates according to the link-state information of PCIE device 30 got.Wherein, this read module 120 is when judging to represent that the information rate of link-state information and the value of bandwidth are less than predetermined value, then determine that the link between this PCIE device 30 link and upstream device 40 is in off-state, this read module 120 when judging to represent that the information rate of link-state information and the value of bandwidth are greater than predetermined value, then tentatively determines that the link between PCIE device 30 and upstream device 40 is in link connection state.
This link connects and to control PCIE device 30 after training module 130 is in link connection state for the link tentatively determining at read module 120 between PCIE device 30 with upstream device 40 and carry out link with upstream device 40 and be connected training action.Concrete, this link connects training action and is: in a Preset Time, control this PCIE device 30 realize being connected to disconnection again to the change recovered by stable with upstream device 40 Link State.In present embodiment, this link connects the link connecting moves of training module 130 by the value (i.e. the value of link training position) of the link control register (not shown in FIG.) the 5th of this PCIE device 30 is set to 1 control open between this PCIE device 30 and upstream device 40.Wherein, this Preset Time is 500 μ s (microsecond).
This link connects training module 130, and also for detecting Link State between this PCIE device 30 and upstream device 40, in Preset Time, whether actual experienced by is connected to disconnection again to the change procedure recovered by stable.Concrete, whether whether this link connect training module 130 and occur being experienced by 0 to 1 Link State judging PCIE device 30 and upstream device 40 to the change procedure of 0 being again connected to disconnection again to the change procedure recovered by stable by the value of the mode bit detecting the Link Status register (not shown in FIG.) of PCIE device 30.Wherein, by the change procedure of 0 to 1, the value of the Link Status register mode bit of PCIE device 30 represents that link disconnects, and is represented that link connects recovered by the change procedure of 1 to 0.Wherein, if this link connection training module 130 determines that the Link State between PCIE device 30 and upstream device 40 does not have to experience in Preset Time be connected to disconnection again to the change recovered by stable, then judge the link connection failure between this PCIE device 30 and upstream device 40.
For connecting training module 130 at link, this authentication module 140 determines that Link State actual experienced by Preset Time between PCIE device 30 and upstream device 40 is connected to disconnection again after the change recovered by stable, obtain the current link conditions value of information of PCIE device 30, and judge that whether the link-state information value of this PCIE device 30 that the link-state information value of current acquisition in PCIE device 30 reads with read module 120 is equal.Wherein, if this authentication module 140 determines that the link-state information value of this PCIE device 30 that the link shape state information value of the PCIE device 30 of current acquisition and read module 120 read is unequal, namely this link-state information value is unequal after experienced by a link connecting moves, then finally judge that the link between this PCIE device 30 with upstream device 40 is connected unsuccessful, if this authentication module 140 determines that the link-state information value of the PCIE device 30 of current acquisition is equal with the link-state information value of this PCIE device 30 that read module 120 reads, namely, this link-state information value is equal after experienced by a link connecting moves, the link then finally judging between this PCIE device 30 with upstream device 40 is connected and keeps normal, thus demonstrate PCIE device 30 and the link-attached successful of upstream device 40 further.
Please refer to Fig. 3, is the flow chart of an embodiment of the present invention link method for detecting connectivity.The method is applied in above-mentioned connectivity of link detection system.The method comprising the steps of:
S301: determine the property file of a PCIE device 30 in the file system of electronic installation 200, and determine the store path of this property file in file system.Wherein, the data content of this property file comprises the link-state information such as bandwidth and information rate of this PCIE device 30.
S302: the link-state information reading this PCIE device 30 according to the property file obtained and store path thereof from this property file.Present embodiment, can read the link-state informations such as the bandwidth sum information rate in the property file of each PCIE device 30 by system pread () function.
S303: the link-state information according to the PCIE device 30 read tentatively judges whether the link between the upstream device 40 that this PCIE device 30 and this PCIE device 30 carry out communicating is in link connection state.
S304: carry out link with upstream device 40 and be connected training action tentatively determining to control after the link between PCIE device 30 with upstream device 40 is in link connection state PCIE device 30, namely control this PCIE device 30 and be connected to disconnection again to the change procedure recovered with upstream device 40 Link State by stable in a Preset Time.
S305: whether actual experienced by is connected to disconnection again to the change recovered by stable to the Link State between detection PCIE device 30 and upstream device 40 within the time of presetting.Wherein, if the Link State determining between PCIE device 30 and upstream device 40 does not have to experience in Preset Time be connected to disconnection again to the change recovered by stable, then enter step S307, otherwise enter step S306.
S306: the current bandwidth and the information rate value that obtain PCIE device 30, and judge that whether the Link State value of this PCIE device 30 that the Link State value of current acquisition in PCIE device 30 reads with read module 120 is equal.Wherein, if determine that the Link State value of this PCIE device 30 that the Link State value of current acquisition and read module 120 read in advance is unequal, then enter step S307, if determine that the Link State value of this PCIE device 30 that the Link State value of current acquisition and read module 120 read in advance is equal, then enter step S308.
S307: judge the link connection failure between this PCIE device 30 and upstream device 40.
S308: judge the link successful connection between this PCIE device 30 and upstream device 40.
Above embodiment is only in order to illustrate technical scheme of the present invention and unrestricted, although with reference to preferred embodiment to invention has been detailed description, those skilled in the art is to be understood that, can modify to technical scheme of the present invention or equivalent replacement, and not depart from the essence of technical solution of the present invention.
Claims (10)
1. a connectivity of link detection system, is applied in an electronic installation, and this system is for detecting the connectivity of link of PCIE device in this electronic installation and upstream device, and it is characterized in that, this system comprises:
Searching module, for determining the property file of PCIE device in the file system of this electronic installation to be detected, and determining the store path of this property file;
Read module, for according to searching property file that module determines and store path reads and stores the link-state information of this PCIE device from this property file, and tentatively judge this PCIE device according to the link-state information of the PCIE device got and whether be in link connection state with the link that this PCIE device is carried out between the upstream device that communicates;
Link connects training module, for realizing being connected to disconnection again to the change procedure recovered and whether actual the Link State detected this PCIE device and upstream device within the default time experienced by this change procedure by stable tentatively determining to control after the link between PCIE device and upstream device is in link connection state this PCIE device and upstream device Link State;
Authentication module, for determining that actual experienced by within the time of presetting of the Link State between PCIE device and upstream device is connected to disconnection again after the change recovered by stable, obtain the PCIE device current link conditions value of information, and judge that whether the link-state information value of this PCIE device that in this PCIE device, the current link conditions value of information and read module read in advance is equal, and judge the link successful connection between this PCIE device and upstream device when determining equal.
2. the system as claimed in claim 1, it is characterized in that, when the link Link State connected between training module determination PCIE device and upstream device does not have actual experience to be connected to disconnection again to the change recovered by stable within the time of presetting, then judge the link connection failure between this PCIE device and upstream device.
3. the system as claimed in claim 1, it is characterized in that, this authentication module when determining that the link-state information value of this PCIE device that in this PCIE device, the current link conditions value of information and read module read in advance is unequal, then judges the link connection failure between this PCIE device and upstream device.
4. PCIE device connectivity of link detection system as claimed in claim 1, it is characterized in that, the link-state information of this PCIE device comprises bandwidth and information rate.
5. the system as claimed in claim 1, it is characterized in that, whether this link connects training module and occurs determining that whether actual experienced by of PCIE device Link State is connected to disconnection again to the change procedure recovered by stable to the change procedure of 0 again by 0 to 1 by the mode bit detecting PCIE device Link Status register.
6. a link connectivity detection method, be applied in a connectivity of link detection system, it is characterized in that, the method comprising the steps of:
Determine the property file of PCIE device in the file system of this electronic installation to be detected, and determine the store path of this property file;
Read from this property file according to the property file obtained and store path thereof and store the link-state information of this PCIE device and the link-state information of PCIE device that basis gets tentatively judges this PCIE device and whether is in link connection state with the link that this PCIE device is carried out between the upstream device that communicates;
Realize being connected to disconnection again to the change procedure recovered and whether actual the Link State detected this PCIE device and upstream device within the default time experienced by this change procedure by stable tentatively determining to control after the link between PCIE device and upstream device is in link connection state this PCIE device and upstream device Link State;
Obtain the PCIE device current link conditions value of information, and judge that in this PCIE device, whether the current link conditions value of information is equal with the link-state information value of this PCIE device read in advance, and judge the link successful connection between this PCIE device and upstream device when determining equal.
7. method as claimed in claim 6, it is characterized in that, also comprise in step " reads from this property file according to the property file obtained and store path thereof and store the link-state information of this PCIE device and the link-state information of PCIE device that basis gets tentatively judges this PCIE device and whether is in link connection state with the link that this PCIE device is carried out between the upstream device that communicates ":
When determining that the Link State between PCIE device and upstream device does not have actual experience to be connected to disconnection again to the change recovered by stable within the time of presetting, then judge the link connection failure between this PCIE device and upstream device.
8. method as claimed in claim 6, it is characterized in that, also comprise in step " obtains the PCIE device current link conditions value of information; and judge that in this PCIE device, whether the current link conditions value of information is equal with the link-state information value of this PCIE device read in advance, and judges the link successful connection between this PCIE device and upstream device when determining equal ":
When determining that in this PCIE device, the current link conditions value of information is unequal with the link-state information value of this PCIE device read in advance, then judge the link connection failure between this PCIE device and upstream device.
9. method as claimed in claim 6, it is characterized in that, the link-state information of this PCIE device comprises bandwidth and information rate.
10. method as claimed in claim 6, it is characterized in that whether occur determining that whether actual experienced by of PCIE device Link State is connected to disconnection again to the change procedure recovered by stable to the change procedure of 0 again by 0 to 1 by the mode bit detecting PCIE device Link Status register.
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| CN201510772567.5A CN105306306B (en) | 2015-11-12 | 2015-11-12 | Link connectivity detection system and method |
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| CN109558282A (en) * | 2018-12-03 | 2019-04-02 | 郑州云海信息技术有限公司 | A kind of PCIE chain circuit detecting method, system and electronic equipment and storage medium |
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| CN113688087A (en) * | 2021-10-25 | 2021-11-23 | 苏州浪潮智能科技有限公司 | PCIE (peripheral component interface express) device enumeration method, system, storage medium and device |
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| CN105306306B (en) | 2018-08-24 |
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