CN105278182A - Liquid crystal display panel and manufacture method thereof - Google Patents
Liquid crystal display panel and manufacture method thereof Download PDFInfo
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- CN105278182A CN105278182A CN201510793665.7A CN201510793665A CN105278182A CN 105278182 A CN105278182 A CN 105278182A CN 201510793665 A CN201510793665 A CN 201510793665A CN 105278182 A CN105278182 A CN 105278182A
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- 238000000034 method Methods 0.000 title claims abstract description 44
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 80
- 238000009413 insulation Methods 0.000 claims description 199
- 230000000903 blocking effect Effects 0.000 claims description 71
- 229920002120 photoresistant polymer Polymers 0.000 claims description 67
- 239000011159 matrix material Substances 0.000 claims description 17
- 238000010586 diagram Methods 0.000 description 34
- 238000010606 normalization Methods 0.000 description 25
- 238000005516 engineering process Methods 0.000 description 7
- 239000010409 thin film Substances 0.000 description 7
- 230000003872 anastomosis Effects 0.000 description 6
- 239000000428 dust Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000007812 deficiency Effects 0.000 description 3
- 230000035515 penetration Effects 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 239000003344 environmental pollutant Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000013528 metallic particle Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 231100000719 pollutant Toxicity 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133514—Colour filters
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Geometry (AREA)
- Liquid Crystal (AREA)
Abstract
The invention provides a liquid crystal display panel which comprises a color filter substrate and an array substrate. The color filter substrate comprises a first substrate and a color filter layer which is arranged on the first substrate. The color filter layer comprises a first color resistor, a second color resistor and a third color resistor. The array substrate comprises a second substrate, a first electrode layer, an insulating layer and a second electrode layer; wherein the first electrode layer, the insulating layer and the second electrode layer are arranged on the second substrate. The insulating layer comprises a first insulating layer, a second insulating layer and a third insulating layer. The first insulating layer, the second insulating layer and the third insulating layer are respectively arranged in correspondence with the first color resistor, the second color resistor and the third color resistor of the color filter substrate. Furthermore the thickness of the first insulating layer, the thickness of the second insulating layer and the thickness of the third insulating layer are not totally same. The invention further provides a manufacture method of the liquid crystal display panel. The liquid crystal display panel and the manufacture method thereof have advantages of high image quality of a displayed picture and easy manufacture.
Description
Technical field
The present invention relates to display technique field, particularly the manufacture method of a kind of display panels and this display panels.
Background technology
Liquid crystal indicator (LiquidCrystalDisplay, LCD) possesses the plurality of advantages such as frivolous, energy-conservation, radiationless, has therefore replaced traditional cathode-ray tube (CRT) (CRT) display gradually.Current liquid crystal display is widely used in the electronic equipments such as HD digital TV, desk-top computer, personal digital assistant (PDA), notebook computer, mobile phone, digital camera.
Liquid crystal indicator comprises colored filter substrate, thin-film transistor array base-plate and the liquid crystal layer between colored filter substrate and thin-film transistor array base-plate.Wherein, colored filter from thin-film transistor array base-plate is provided with different electrodes, and drive turning to of the liquid crystal molecule in liquid crystal layer by the pressure reduction controlled between the electrode on colored filter substrate or thin-film transistor array base-plate, so make light from different directions by liquid crystal layer to realize the display of picture.But; the in-plane of positivity liquid crystal is adopted to change (In-PlaneSwitching; IPS) type liquid crystal indicator can face usually due to red (Red; R), green (Green; and blue (Blue G); B) electro-optical characteristic curves of three looks is misfitted and produces color divergence, and then the problem that the image quality of display frame is reduced.
At present, in prior art, main employing two kinds of methods solve the problems of the technologies described above.First method utilizes three gamma curves to drive red, green and blue three look respectively, but this mode complicacy is high; Second method adopts different electrode widths and electrode separation to drive red, green and blue three look to realize employing gamma curve between each sub-pixel to thin-film transistor array base-plate side, but this kind of mode adds the complicacy in the process making thin-film transistor array base-plate.
Therefore, be necessary to provide the technical scheme of improvement to overcome the above technical matters existed in prior art.
Summary of the invention
In view of above problem, the invention provides a kind of display panels, its display image quality is high and making is simple.
Concrete, the embodiment of the present invention provides a kind of display panels, and described display panels comprises colored filter substrate and array base palte.Described colored filter substrate comprises the first substrate, is arranged on described first suprabasil color filter layers, and described color filter layers comprises the first color blocking, the second color blocking and the 3rd color blocking.Described array base palte comprises the second substrate, the second electrode lay be arranged on described second suprabasil first electrode layer, being arranged on the insulation course on described first electrode layer and being arranged on described insulation course, described insulation course comprises the first insulation course, the second insulation course and the 3rd insulation course.Wherein, described first insulation course, described second insulation course and described 3rd insulation course are respectively with the first color blocking, second color blocking of described colored filter substrate and the 3rd color blocking is corresponding arranges, and the thickness of the thickness of the thickness of described first insulation course, described second insulation course and described 3rd insulation course is not exclusively equal.
Further, described first insulation course, described second insulation course and described 3rd insulation course are on the same layer.
Further, described first electrode layer is common electrode layer, and described the second electrode lay is pixel electrode layer.
Further, described first electrode layer is pixel electrode layer, and described the second electrode lay is common electrode layer.
Further, described colored filter substrate also comprises black matrix" and flatness layer, described black matrix" is positioned at the interval of described first color blocking, described second color blocking and described 3rd color blocking, and described flatness layer is positioned at the surface of described black matrix" and described color filter layers.
The present invention also provides a kind of manufacture method of above-mentioned display panels, and described manufacture method comprises step: in the first substrate, form color filter layers, and described color filter layers comprises the first color blocking, the second color blocking and the 3rd color blocking; Second substrate forms the first electrode layer, insulation course and photoresist layer successively; Described photoresist layer is exposed, makes described photoresist layer form first area photoresist layer, second area photoresist layer and the 3rd area light resistance layer; The described insulation course corresponding to described 3rd area light resistance layer position etches; Described first area photoresist layer is developed, to remove the photoresistance of described first area photoresist layer; The described insulation course corresponding to photoresist layer position, described first area and described 3rd corresponding being etched by etched insulation course in area light resistance layer position, to form the first insulation course and the 3rd insulation course; Described second area photoresist layer is developed, to remove the photoresistance of described second area photoresist layer, and make described insulation course corresponding to described second area photoresist layer position form the second insulation course, wherein, the thickness of the thickness of described first insulation course, the thickness of described second insulation course and described 3rd insulation course is not exclusively equal; Described first insulation course, described second insulation course and described 3rd insulation course form the second electrode lay; Described first substrate and described second substrate are assembled, wherein, described first insulation course, described second insulation course and described 3rd insulation course are corresponding with described first color blocking, described second color blocking and described 3rd color blocking position respectively.
Further, described in the first substrate, form the step of color filter layers after also comprise step: in described first substrate, form black matrix" and flatness layer, wherein, described black matrix" is positioned at the interval of described first color blocking, described second color blocking and described 3rd color blocking, and described flatness layer is positioned at the surface of described black matrix" and described color filter layers.
Further, to described photoresist layer carry out expose adopt be gray level mask exposure method or half gray level mask exposure method.
Further, described first electrode layer is pixel electrode layer, and described the second electrode lay is common electrode layer.
Further, described first electrode layer is common electrode layer, and described the second electrode lay is pixel electrode layer.
The electro-optical characteristic curves anastomose property of manufacture method by regulating the thickness of the insulation course between the pixel electrode layer on array base palte and common electrode layer to improve each sub-pixel of display panels of the present invention and this display panels, and then realize only needing a gamma curve to control each sub-pixel, thus make display panels realize high image quality display, and make simple.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of the display panels that one embodiment of the invention provides.
Fig. 2 is the step schematic diagram of the manufacture method of the display panels that one embodiment of the invention provides.
The cut-away section structural representation of the manufacture method that Fig. 3 a to 3i is the display panels shown in Fig. 2 in manufacturing process.
Fig. 4 a is the electro-optical characteristic curves schematic diagram of each sub-pixel of the display panels of prior art.
Fig. 4 b is the normalization electro-optical characteristic curves schematic diagram of each sub-pixel of the display panels of prior art.
Fig. 5 a is the electro-optical characteristic curves schematic diagram of red sub-pixel under different insulative layer thickness of the display panels that one embodiment of the invention provides.
Fig. 5 b is the electro-optical characteristic curves schematic diagram of green sub-pixels under different insulative layer thickness of the display panels that one embodiment of the invention provides.
Fig. 5 c is the electro-optical characteristic curves schematic diagram of blue subpixels under different insulative layer thickness of the display panels that one embodiment of the invention provides.
Fig. 5 d is the curve synoptic diagram that the saturation voltage of each sub-pixel of red, green, blue of the display panels that one embodiment of the invention provides changes along with thickness of insulating layer.
Fig. 6 is the first normalization electro-optical characteristic curves schematic diagram of each sub-pixel of red, green, blue of the display panels that one embodiment of the invention provides.
Fig. 7 is the second normalization electro-optical characteristic curves schematic diagram of each sub-pixel of red, green, blue of the display panels that one embodiment of the invention provides.
3rd normalization electro-optical characteristic curves schematic diagram of each sub-pixel of red, green, blue of the display panels that Fig. 8 provides for one embodiment of the invention.
Embodiment
For further setting forth the present invention for the technological means reaching predetermined goal of the invention and take and effect, below in conjunction with accompanying drawing and preferred embodiment, to the display panels proposed according to the present invention and manufacture method embodiment, method, step, structure, feature and effect, be described in detail as follows.
Aforementioned and other technology contents, feature and effect for the present invention, can clearly present in the detailed description of following cooperation with reference to graphic preferred embodiment.By the explanation of embodiment, when can to the present invention for the technological means reaching predetermined object and take and effect be able to more deeply and concrete understanding, however institute's accompanying drawings be only to provide with reference to and the use of explanation, be not used for being limited the present invention.
Please refer to Fig. 1, Fig. 1 is the cross-sectional view of the display panels that one embodiment of the invention provides.As shown in Figure 1, display panels provided by the invention comprises colored filter substrate 10, array base palte 20 and the liquid crystal layer between colored filter substrate 10 and array base palte 20 (not indicating in figure).This display panels is applicable to in-plane and changes (In-PlaneSwitching, IPS) type, the display panels that namely liquid crystal molecule turns at the plane internal rotation with substrate-parallel when applying the electric field of display.
Concrete, colored filter substrate 10 comprises the first substrate 100, black matrix" 101, color filter layers 102 and the flatness layer 103 be arranged in the first substrate 100, and flatness layer 103 is between color filter layers 102 and liquid crystal layer.Color filter layers 102 comprises the first color blocking 102a, the second color blocking 102b and the 3rd color blocking 102c, and preferably, the first color blocking 102a is red color resistance, and the second color blocking 102b is green color blocking, and the 3rd color blocking 102c is blue color blocking.Black matrix" 101 between the first substrate 100 and flatness layer 103, and is distributed in the interval of the first color blocking 102a, the second color blocking 102b and the 3rd color blocking 102c.
Array base palte 20 comprises the second substrate 200, first electrode layer 201, insulation course 202 and the second electrode lay 203.Wherein, the first electrode layer 201 is arranged on the surface of the second substrate 200 towards liquid crystal layer, and insulation course 202 is arranged on the surface of the first electrode layer 201 towards liquid crystal layer, and the second electrode lay 203 is arranged on the surface of insulation course 202 towards liquid crystal layer.Insulation course 202 comprises the first insulation course 202a, second insulation course 202b and the 3rd insulation course 202c, first insulation course 202a, second insulation course 202b and the 3rd insulation course 202c respectively with the first color blocking 102a of colored filter substrate 10, second color blocking 102b and the 3rd color blocking 102c correspondence is arranged, and the thickness of the first insulation course 202a, the thickness of the second insulation course 202b and the thickness of the 3rd insulation course 202c not exclusively equal, that is, the thickness of the first insulation course 202a can be equal with the thickness of the thickness of the second insulation course 202b or the 3rd insulation course 202c, the thickness of the second insulation course 202b can be equal with the thickness of the thickness of the first insulation course 202a or the 3rd insulation course 202c, the thickness of the 3rd insulation course 202c can be equal with the thickness of the thickness of the first insulation course 202a or the second insulation course 202b, but the thickness of the first insulation course 202a, the thickness of the second insulation course 202b and the thickness of the 3rd insulation course 202c can not be completely equal.
Further, in an embodiment of the present invention, the first insulation course 202a, the second insulation course 202b and the 3rd insulation course 202c are on the same layer.
Further, the first electrode layer 201 is transparent electrode layer with the second electrode lay 203.In the present embodiment, this first electrode layer 201 is planar structure, this the second electrode lay 203 comprises multiple strip sub-electrode layer (sign) be parallel to each other, in other embodiments, this first electrode layer 201 also can comprise multiple strip sub-electrode layer be parallel to each other, and this second electrode lay 203 also can be planar structure.In the present embodiment, this first electrode layer 201 is common electrode layer, and this second electrode lay 203 is pixel electrode layer, and in other embodiments, this first electrode layer 201 also can be pixel electrode layer, and this second electrode lay 203 is common electrode layer.
In the present embodiment, first insulation course 202a of insulation course 202, second insulation course 202b and the 3rd insulation course 202c need respectively with the first color blocking 102a of colored filter substrate 10, second color blocking 102b and the 3rd color blocking 102c correspondence is arranged, and the first insulation course 202a, the thickness of the second insulation course 202b and the 3rd insulation course 202c is not exclusively equal, to make the first color blocking 102a, the normalization electro-optical characteristic curves anastomose property of the sub-pixel at the second color blocking 102b and the 3rd color blocking 102c place is high, and make the saturation voltage of the sub-pixel of each different colours when penetrance reaches maximum simultaneously identical, and then make display panels can show high image quality picture.
Please refer to Fig. 2, Fig. 2 is the step schematic diagram of the manufacture method of the display panels that one embodiment of the invention provides.As shown in Figure 2, the step of the manufacture method of display panels of the present invention comprises:
S21: form color filter layers in the first substrate, color filter layers comprises the first color blocking, the second color blocking and the 3rd color blocking;
Please refer to Fig. 3 a, first provide first substrate 100, and clean the first substrate 100, the fundamental purpose of cleaning is the pollutants such as the organism on removal first substrate 100 surface, metallic particles and dust.Further, after the first substrate 100 has been cleaned and carried out drying, the first substrate 100 forms color filter layers 102, color filter layers 102 comprises the first color blocking 102a, the second color blocking 102b and the 3rd color blocking 102c.In the present embodiment, the first substrate 100 is glass substrate.
Further, the first substrate 100 after formation colored filter 102 forms black matrix" 101 and flatness layer 103, wherein, black matrix" 101 is positioned at the interval of the first color blocking 102a, the second color blocking 102b and the 3rd color blocking 102c, and flatness layer 103 is positioned at black matrix" 101 and the surface of color filter layers 102 towards liquid crystal layer.
S22: form the first electrode layer, insulation course and photoresist layer successively in the second substrate;
Please refer to Fig. 3 b, first provide second substrate 200, and clean the second substrate 200, the fundamental purpose of cleaning is the pollutants such as the organism on removal second substrate 200 surface, metallic particles and dust.Further, after the second substrate 200 has been cleaned and carried out drying, the second substrate 200 forms the first electrode layer 201 and insulation course 202 successively by spatter film forming method, and be coated with photoresist layer 204 on this insulation course 202, wherein, the photoresistance in this photoresist layer 204 is positivity photoresistance.It should be noted that, in the present embodiment, this second substrate 200 is glass substrate, and also can adopt chemical vapour deposition technique (ChemicalVaporDeposition when forming the first electrode layer 201 and insulation course 202 in the second substrate 200, CVD), the film build method such as plasma enhanced chemical vapor deposition method (PlasmaEnhancedChemicalVaporDeposition, PECVD).
S23: expose photoresist layer, makes photoresist layer form first area photoresist layer, second area photoresist layer and the 3rd area light resistance layer;
Please refer to Fig. 3 c, after step S22 completes, exposure-processed need be carried out to the photoresist layer 204 in the second substrate 200.In the present embodiment, gray level mask exposure method or half gray level mask exposure method is adopted to carry out exposure-processed to the photoresist layer 204 in the second substrate 200.Concrete, mask plate 30 is placed on the top of the second substrate 200, and utilize light to irradiate this mask plate 30, this mask plate 30 comprises normal district 30a and shield bars 30b, normal district 30a and shield bars 30b is alternately distributed, and wherein, the normal district 30a of part is provided with printing opacity adjustment layer 30c, this printing opacity adjustment layer 30c can by the light of adjustment through it, and then make photoresist layer 204 have different thickness.
Further, when light therethrough mask plate 30 irradiates the second substrate 200, due to the region of the normal region 30a on mask plate 30, shield bars 30b and the light transmission capacity of normal region 30a that printing opacity adjustment layer 30c is set different, and then form first area photoresist layer 204a, second area photoresist layer 204b and the 3rd area light resistance layer 204c after causing photoresist layer 204 to be irradiated by light, and the thickness of the first district photoresist layer 204a, second area photoresist layer 204b and the 3rd area light resistance layer 204c is different.In the present embodiment, the normal region 30a of what the position due to the 3rd area light resistance layer 204c was corresponding is mask plate 30, therefore after irradiating through light, the photoresistance of the 3rd area light resistance layer 204c disappears.
S24: the insulation course corresponding to the 3rd area light resistance layer position etches;
Please refer to Fig. 3 d, in step S23, because the photoresist layer of the 3rd area light resistance layer 204c disappears, therefore without the need to developing to the photoresist layer in this region.After step S23 completes; second substrate 200 need be placed in etching solution and etch; now; because insulation course 202 that first area photoresist layer 204a is corresponding with second area photoresist layer 204b position has the protection of photoresist layer 204, therefore only need etch by the insulation course 202 corresponding to the 3rd area light resistance layer 204c position.In the present embodiment, the thickness of insulation course 202 is b, the etched thickness of insulation course 202 corresponding to the 3rd area light resistance layer 204c position is h1, therefore the thickness of the insulation course 202 that the 3rd area light resistance layer 204c position is corresponding is b-△ h1, and now thickness b-△ h1 is not the target thickness of insulation course 202 corresponding to the 3rd area light resistance layer 204c position.It should be noted that, in the present embodiment, the thickness etched can be controlled by the flow velocity controlling the time of the second substrate 200 in developer solution and developer solution.
S25: develop to first area photoresist layer, to remove the photoresistance of first area photoresist layer;
Please refer to Fig. 3 e, after step S24 completes, need develop to the second substrate 200, to remove the photoresistance of first area photoresist layer 204a.Concrete, at first area photoresist layer 204a surface spraying developer, the photoresistance generation chemical reaction of developer and first area photoresist layer 204a can be made, and then remove the photoresistance of first area photoresist layer 204a.
S26: the insulation course corresponding to photoresist layer position, first area and the 3rd corresponding being etched by etched insulation course in area light resistance layer position, to form the first insulation course and the 3rd insulation course;
Please refer to Fig. 3 f, after step S25 completes, second substrate 200 need be placed in etching solution and etch, now, because insulation course 202 that second area photoresist layer 204b position is corresponding has the protection of photoresist layer 204, and insulation course 202 corresponding to insulation course 202 corresponding to first area photoresist layer 204a and the 3rd area light resistance layer 204c position does not have the protection of photoresist layer 204, therefore the insulation course 202 corresponding to photoresist layer 204a position, first area is needed to etch, and to corresponding again being etched by etched insulation course 202 in the 3rd area light resistance layer 204c position, to form the first insulation course 202a and the 3rd insulation course 202c.In the present embodiment, the thickness of insulation course 202 is b, the etched thickness of insulation course 202 corresponding to photoresist layer 204a position, first area is △ h2, and what the 3rd area light resistance layer 204c position was corresponding is similarly △ h2 by etched insulation course 202 by the thickness again etched away, therefore the thickness of the first insulation course 202a is b-△ h2, the thickness of the 3rd insulation course 202c is b-△ h3, and namely the thickness of the 3rd insulation course 202c is b-△ h1-△ h2.It should be noted that, in the present embodiment, the thickness etched can be controlled by the flow velocity controlling the time of the second substrate 200 in developer solution and developer solution.
S27: second area photoresist layer is developed, to remove the photoresistance of second area photoresist layer, and make insulation course corresponding to second area photoresist layer position form the second insulation course, wherein, the thickness of the thickness of the first insulation course, the thickness of the second insulation course and the 3rd insulation course is not exclusively equal;
Please refer to Fig. 3 g, after step S26 completes, need develop to the second substrate 200, to remove the photoresistance of second area photoresist layer 204b.Concrete, can at second area photoresist layer 204b surface spraying developer, make the photoresistance generation chemical reaction of developer and second area photoresist layer 204b, and then remove the photoresistance of second area photoresist layer 204b, and then insulation course 202 corresponding to second area photoresist layer 204b position is made to form the second insulation course 202b.After developing to second area photoresist layer 204b, etch without the need to the insulation course 202 corresponding to second area photoresist layer 204b position, therefore, the thickness of the second insulation course 202b is the thickness b of insulation course 202.In addition, from in step S24 and S26, the thickness of the 3rd insulation course 202c is b-△ h3, the thickness of the first insulation course 202a is b-△ h2, therefore, in display panels of the present invention, the first electrode layer 201 is not exclusively equal with the thickness of the thickness of the first insulation course 202a of the insulation course 202 between the second electrode lay 203, the thickness of the second insulation course 202b and the 3rd insulation course 202c.
S28: form the second electrode lay on the first insulation course, the second insulation course and the 3rd insulation course;
Please refer to Fig. 3 h, after step S27 completes, chemical vapour deposition technique or plasma enhanced chemical vapor deposition method is adopted to form a planar transparent membrane on the first insulation course 202a, the second insulation course 202b and the 3rd insulation course 202c, and be coated with photoresistance on the transparent thin film, form the second electrode lay 203 with target pattern by exposure, development.
S29: the first substrate and the second substrate are assembled, wherein, the first insulation course, the second insulation course and the 3rd insulation course are corresponding with the first color blocking, the second color blocking and the 3rd color blocking position respectively.
Please refer to Fig. 3 i, after step S28 completes, need the first substrate 100 and the second substrate 200 to assemble.Wherein, the first substrate 100 is relative with the second substrate 200, and the first insulation course 202a, the second insulation course 202b and the 3rd insulation course 202c are corresponding with the first color blocking 102a, the second color blocking 102b and the 3rd color blocking 102c position respectively.
Further this display panels is described with the curve synoptic diagram utilizing TechWiz software to carry out simulating below:
Please refer to Fig. 4 a, Fig. 4 a is the electro-optical characteristic curves schematic diagram of each sub-pixel of the display panels of prior art.As shown in fig. 4 a, a represents the electro-optical characteristic curves schematic diagram of the red sub-pixel of prior art display panels, b represents the electro-optical characteristic curves schematic diagram of the green sub-pixels of prior art display panels, and c represents the electro-optical characteristic curves schematic diagram of the blue subpixels of prior art display panels.Thickness of insulating layer between pixel electrode layer and common electrode layer be 5000 dusts and the box of display panels thick be 3.5 microns, and the electrode width of pixel electrode or public electrode and electrode separation be respectively 3 microns with 4.8 microns time, the saturation voltage of red sub-pixel is 4.5V, the saturation voltage of green sub-pixels is 4.6V, the saturation voltage of blue subpixels is 5.3V, and when the saturation voltage of red sub-pixel is 4.5V, its maximum penetration rate is 20.47%, when the saturation voltage of green sub-pixels is 4.6V, its maximum penetration rate is 25.34%, when the saturation voltage of blue subpixels is 5.3V, its maximum penetration rate is 26.52%.Therefore, from such as 4a, when insulation course thickness is homogeneous, red sub-pixel, green sub-pixels and blue subpixels electro-optical characteristic curves are dispersion trend, if only under a gamma curve controls, then distortion is comparatively serious.
Further, please refer to Fig. 4 b, Fig. 4 b is the normalization electro-optical characteristic curves schematic diagram of each sub-pixel of the display panels of prior art.As shown in Figure 4 b, a ' represents the normalization electro-optical characteristic curves schematic diagram of the red sub-pixel of the display panels of prior art, b ' represents the normalization electro-optical characteristic curves schematic diagram of the green sub-pixels of the display panels of prior art, and c ' represents the normalization electro-optical characteristic curves schematic diagram of the blue subpixels of the display panels of prior art.When insulation course thickness between pixel electrode and public electrode is homogeneous, in prior art, the normalization electro-optical characteristic curves schematic diagram of each sub-pixel of display panels has certain dispersiveness, and according to a gamma line, each sub-pixel is driven, then will cause distortion.
Please refer to Fig. 5 a, Fig. 5 a is the electro-optical characteristic curves schematic diagram of red sub-pixel under different insulative layer thickness of the display panels that one embodiment of the invention provides.As shown in Figure 5 a, respectively illustrate in Fig. 5 a red sub-pixel thickness of insulating layer be 0.05 micro-, 0.1 micron, 0.2 micron, 0.25 micron, 0.3 micron, 0.35 micron, 0.4 micron, 0.45 micron, 0.47 micron, 0.6 micron, 0.62 micron and 0.7 micron time electro-optical characteristic curves schematic diagram.Therefore, the saturation voltage of the red sub-pixel in display panels of the present invention increases along with the thickness of insulation course 202 and increases, and the voltage of saturation voltage when to be penetrance maximum.
Please refer to Fig. 5 b, Fig. 5 b is the electro-optical characteristic curves schematic diagram of green sub-pixels under different insulative layer thickness of the display panels that one embodiment of the invention provides.As shown in Figure 5 b, respectively illustrate in Fig. 5 b green sub-pixels thickness of insulating layer be 0.05 micro-, 0.1 micron, 0.2 micron, 0.25 micron, 0.3 micron, 0.35 micron, 0.4 micron, 0.45 micron, 0.47 micron, 0.6 micron, 0.62 micron and 0.7 micron time electro-optical characteristic curves schematic diagram.Therefore, the saturation voltage of the green sub-pixels in display panels of the present invention increases along with the thickness of insulation course 202 and increases, and the voltage of saturation voltage when to be penetrance maximum.
Please refer to Fig. 5 c, Fig. 5 c is the electro-optical characteristic curves schematic diagram of blue subpixels under different insulative layer thickness of the display panels that one embodiment of the invention provides.As shown in Figure 5 c, respectively illustrate in Fig. 5 c blue subpixels thickness of insulating layer be 0.05 micro-, 0.1 micron, 0.2 micron, 0.25 micron, 0.3 micron, 0.35 micron, 0.4 micron, 0.45 micron, 0.47 micron, 0.6 micron, 0.62 micron and 0.7 micron time electro-optical characteristic curves schematic diagram.Therefore, the saturation voltage of the blue subpixels in display panels of the present invention increases along with the thickness of insulation course 202 and increases, and the voltage of saturation voltage when to be penetrance maximum.
Further, please refer to Fig. 5 d, Fig. 5 d Fig. 5 d is the curve synoptic diagram that the saturation voltage of each sub-pixel of red, green, blue of the display panels that one embodiment of the invention provides changes along with thickness of insulating layer.As fig 5d, l represents the curve synoptic diagram of saturation voltage along with insulation course 202 variation in thickness of the red sub-pixel of display panels of the present invention, m represents the curve synoptic diagram of saturation voltage along with insulation course 202 variation in thickness of the green sub-pixels of display panels of the present invention, and n represents the curve synoptic diagram of saturation voltage along with insulation course 202 variation in thickness of the blue subpixels of display panels of the present invention.As fig 5d, the saturation voltage of each sub-pixel of display panels of the present invention increases along with the increase of the thickness of insulation course 202.
Please also refer to Fig. 4 b and Fig. 6, Fig. 6 is the first normalization electro-optical characteristic curves schematic diagram of each sub-pixel of red, green, blue of the display panels that one embodiment of the invention provides.As shown in Figure 6, when the thickness of the first insulation course 202a corresponding to the red sub-pixel of display panels of the present invention is 3500 dusts, the thickness of the second insulation course 202b that green sub-pixels is corresponding is 3500 dusts, when the thickness of the 3rd insulation course 202c that blue subpixels is corresponding is 500 dust, normalization electro-optical characteristic curves and the insulation course of the display panels shown in Fig. 4 b of each sub-pixel of display panels of the present invention are taked compared with the normalization electro-optical characteristic curves of each sub-pixel of identical thickness, the normalization electro-optical characteristic curves of each sub-pixel of display panels of the present invention takes the normalization electro-optical characteristic curves anastomose property of each sub-pixel of identical thickness high than the insulation course of the display panels shown in Fig. 4 b, make under same gray level, the color divergence of display frame reduces, image quality improves, and each sub-pixel of the RGB of display panels of the present invention when penetrance all reaches maximal value 1 after saturation voltage be 4.1V.In addition, because the thickness of the first insulation course 202a differs 3000 dusts with the thickness of the 3rd insulation course 202c, that is, the thickness of the first insulation course 202a differs 0.3 micron with the thickness of the 3rd insulation course 202c, therefore, it is poor to be arranged on the second electrode lay 203 on the 3rd insulation course 202c and to be arranged on the section between the second electrode lay 203 on the first insulation course 202a with 0.3 micron, and the existence of this section of difference will cause the problem of follow-up orientation inequality, and orientation inequality will make display panels produce dark-state light leak, in order to solve this technological deficiency, optics alignment technique can be taked in follow-up orientation work, and optics alignment technique existing detailed description in existing technology, so place repeats no more.
Please also refer to Fig. 4 b and Fig. 7, Fig. 7 is the second normalization electro-optical characteristic curves schematic diagram of each sub-pixel of red, green, blue of the display panels that one embodiment of the invention provides.As shown in Figure 7, when the thickness of the first insulation course 202a corresponding to the red sub-pixel of display panels of the present invention is 5000 dusts, the thickness of the second insulation course 202b that green sub-pixels is corresponding is 4500 dusts, when the thickness of the 3rd insulation course 202c that blue subpixels is corresponding is 2500 dust, normalization electro-optical characteristic curves and the insulation course of the display panels shown in Fig. 4 b of each sub-pixel of display panels of the present invention are taked compared with the normalization electro-optical characteristic curves of each sub-pixel of identical thickness, the normalization electro-optical characteristic curves of each sub-pixel of display panels of the present invention takes the normalization electro-optical characteristic curves anastomose property of each sub-pixel of identical thickness high than the insulation course of the display panels shown in Fig. 4 b, make under same gray level, the color divergence of display frame reduces, image quality improves, and each sub-pixel of the RGB of display panels of the present invention when penetrance all reaches maximal value 1 after saturation voltage be 4.5V.In addition, because the thickness of the first insulation course 202a differs 2500 dusts with the thickness of the 3rd insulation course 202c, that is, the thickness of the first insulation course 202a differs 0.25 micron with the thickness of the 3rd insulation course 202c, therefore, it is poor to be arranged on the second electrode lay 203 on the 3rd insulation course 202c and to be arranged on the section between the second electrode lay 203 on the first insulation course 202a with 0.25 micron, and the existence of this section of difference will cause the problem of follow-up orientation inequality, and orientation inequality will make display panels produce dark-state light leak, in order to solve this technological deficiency, optics alignment technique can be taked in follow-up orientation work, and optics alignment technique existing detailed description in existing technology, so place repeats no more.
Please also refer to Fig. 4 b and Fig. 8, the 3rd normalization electro-optical characteristic curves schematic diagram of each sub-pixel of red, green, blue of the display panels that Fig. 8 provides for one embodiment of the invention.As shown in Figure 8, when the thickness of the first insulation course 202a corresponding to the red sub-pixel of display panels of the present invention is 7000 dusts, the thickness of the second insulation course 202b that green sub-pixels is corresponding is 6200 dusts, when the thickness of the 3rd insulation course 202c that blue subpixels is corresponding is 4000 dust, normalization electro-optical characteristic curves and the insulation course of the display panels shown in Fig. 4 b of each sub-pixel of display panels of the present invention are taked compared with the normalization electro-optical characteristic curves of each sub-pixel of identical thickness, the normalization electro-optical characteristic curves of each sub-pixel of display panels of the present invention takes the normalization electro-optical characteristic curves anastomose property of each sub-pixel of identical thickness high than the insulation course of the display panels shown in Fig. 4 b, make under same gray level, the color divergence of display frame reduces, image quality improves, and each sub-pixel of the RGB of display panels of the present invention when penetrance all reaches maximal value 1 after saturation voltage be 5V.Because the thickness of the first insulation course 202a differs 3000 dusts with the thickness of the 3rd insulation course 202c, that is, the thickness of the first insulation course 202a differs 0.3 micron with the thickness of the 3rd insulation course 202c, therefore, it is poor to be arranged on the second electrode lay 203 on the 3rd insulation course 202c and to be arranged on the section between the second electrode lay 203 on the first insulation course 202a with 0.3 micron, and the existence of this section of difference will cause the problem of follow-up orientation inequality, and orientation inequality will make display panels produce dark-state light leak, in order to solve this technological deficiency, optics alignment technique can be taked in follow-up orientation work, and optics alignment technique existing detailed description in existing technology, so place repeats no more.
The electro-optical characteristic curves anastomose property of manufacture method by regulating the thickness of the insulation course between the pixel electrode layer on array base palte and common electrode layer to improve each sub-pixel of display panels of the present invention and this display panels, and then realize only needing a gamma curve to control each sub-pixel, thus make display panels realize high image quality display, and make simple.
The above, it is only preferred embodiment of the present invention, not any pro forma restriction is done to the present invention, although the present invention discloses as above with preferred embodiment, but and be not used to limit the present invention, any those skilled in the art, do not departing within the scope of technical solution of the present invention, make a little change when the technology contents of above-mentioned announcement can be utilized or be modified to the Equivalent embodiments of equivalent variations, in every case be do not depart from technical solution of the present invention content, according to any simple modification that technical spirit of the present invention is done above embodiment, equivalent variations and modification, all still belong in the scope of technical solution of the present invention.
Claims (10)
1. a display panels, is characterized in that, described display panels comprises:
Colored filter substrate, described colored filter substrate comprises the first substrate, is arranged on described first suprabasil color filter layers, and described color filter layers comprises the first color blocking, the second color blocking and the 3rd color blocking; And
Array base palte, described array base palte comprises the second substrate, the second electrode lay be arranged on described second suprabasil first electrode layer, being arranged on the insulation course on described first electrode layer and being arranged on described insulation course, described insulation course comprises the first insulation course, the second insulation course and the 3rd insulation course;
Wherein, described first insulation course, described second insulation course and described 3rd insulation course are respectively with described first color blocking of described colored filter substrate, described second color blocking and described 3rd color blocking is corresponding arranges, and the thickness of the thickness of the thickness of described first insulation course, described second insulation course and described 3rd insulation course is not exclusively equal.
2. display panels according to claim 1, is characterized in that, described first insulation course, described second insulation course and described 3rd insulation course are on the same layer.
3. display panels according to claim 1, is characterized in that, described first electrode layer is common electrode layer, and described the second electrode lay is pixel electrode layer.
4. display panels according to claim 1, is characterized in that, described first electrode layer is pixel electrode layer, and described the second electrode lay is common electrode layer.
5. display panels according to claim 1, it is characterized in that, described colored filter substrate also comprises black matrix" and flatness layer, described black matrix" is positioned at the interval of described first color blocking, described second color blocking and described 3rd color blocking, and described flatness layer is positioned at the surface of described black matrix" and described color filter layers.
6. a manufacture method for display panels, is characterized in that, described manufacture method comprises step:
First substrate forms color filter layers, and described color filter layers comprises the first color blocking, the second color blocking and the 3rd color blocking;
Second substrate forms the first electrode layer, insulation course and photoresist layer successively;
Described photoresist layer is exposed, makes described photoresist layer form first area photoresist layer, second area photoresist layer and the 3rd area light resistance layer;
The described insulation course corresponding to described 3rd area light resistance layer position etches;
Described first area photoresist layer is developed, to remove the photoresistance of described first area photoresist layer;
The described insulation course corresponding to photoresist layer position, described first area and described 3rd corresponding being etched by etched insulation course in area light resistance layer position, to form the first insulation course and the 3rd insulation course;
Described second area photoresist layer is developed, to remove the photoresistance of described second area photoresist layer, and make described insulation course corresponding to described second area photoresist layer position form the second insulation course, wherein, the thickness of the thickness of described first insulation course, the thickness of described second insulation course and described 3rd insulation course is not exclusively equal;
Described first insulation course, described second insulation course and described 3rd insulation course form the second electrode lay; And
Described first substrate and described second substrate are assembled, wherein, described first insulation course, described second insulation course and described 3rd insulation course are corresponding with described first color blocking, described second color blocking and described 3rd color blocking position respectively.
7. the manufacture method of display panels according to claim 6, is characterized in that, described in the first substrate, form the step of color filter layers after also comprise step:
Described first substrate forms black matrix" and flatness layer, wherein, described black matrix" is positioned at the interval of described first color blocking, described second color blocking and described 3rd color blocking, and described flatness layer is positioned at the surface of described black matrix" and described color filter layers.
8. the manufacture method of display panels according to claim 6, is characterized in that, to described photoresist layer carry out expose adopt be gray level mask exposure method or half gray level mask exposure method.
9. the manufacture method of display panels according to claim 6, is characterized in that, described first electrode layer is pixel electrode layer, and described the second electrode lay is common electrode layer.
10. the manufacture method of display panels according to claim 6, is characterized in that, described first electrode layer is common electrode layer, and described the second electrode lay is pixel electrode layer.
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