CN105236346A - MEMS chip packaging structure and manufacturing method thereof - Google Patents
MEMS chip packaging structure and manufacturing method thereof Download PDFInfo
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- CN105236346A CN105236346A CN201510777087.8A CN201510777087A CN105236346A CN 105236346 A CN105236346 A CN 105236346A CN 201510777087 A CN201510777087 A CN 201510777087A CN 105236346 A CN105236346 A CN 105236346A
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Abstract
The invention discloses an MEMS chip packaging structure and a manufacturing method thereof. The method includes the steps that first, a cover plate made of the same material as MEMS chips is selected, wherein the cover plate is provided with first surfaces and second surfaces, lead openings are formed in the second surfaces of the cover plate through a through-silicon-via process, second insulating layers, second metal circuit layers and protecting layers are sequentially laid on the second surfaces and in the lead openings, bonding pad positions are reserved on the second meat circuit layers, and bonding balls grow on bonding pads; next, first insulating layers, first metal circuit layers and buffer layers are sequentially laid on the first surfaces of the cover plate, cavities are manufactured, sealing rings and convex conducting points are manufactured on the buffer layers finally, and the cavities are made wider than functional zones of the functional chips; then, bonding pads of the MEMS chips are bonded to the convex conducting points on the first surfaces of the cover plate, and packaging of the chips is completed. By additionally arranging the buffer layers, bonding force between the sealing rings and the cover plate is increased, sealing capability is guaranteed, air pressure resisting capability is improved, and reliability is improved.
Description
Technical field
The present invention relates to a kind of chip-packaging structure, particularly relate to a kind of MEMS chip encapsulating structure and preparation method thereof.
Background technology
Microelectromechanical systems (MEMS:MicroElectroMechanicalSystems) is the cutting edge technology of a kind of novel multi-crossed disciplines grown up since eighties of last century eighties, it has merged microelectronics and micro mechanics, Si micromachining technology in integrated circuit fabrication process and the micromachining technology in mechanical industry are combined, produces various excellent performance, cheap, microminiaturized sensor, actuator, driver and micro-system.
For MEMS package, chip and internal wiring coupling part should be realized to protect, ensure that weld pad exposes again.Conventional method is generally utilize crown cap or vinyl cover to be encapsulated after chip load and bonding wire, for some semiconductor MEMS chip, need high-vacuum applications environment, therefore, this semiconductor MEMS package technology is needed around chip functions district, establish sealing ring to ensure the air-tightness in chip functions district, in prior art, usually the conductive salient point at sealing ring and edge is separated certain distance, concrete width is formulated according to MEMS chip size.But the bonding of this structure is further improved, to meet the sealing to sealing ring, anti-air pressure ability, the requirements at the higher level that cohesiveness and reliability propose.
Summary of the invention
In order to solve the problems of the technologies described above, the present invention proposes a kind of MEMS chip encapsulating structure and preparation method thereof, by setting up cushion around sealing ring and between cover plate, add the adhesion of sealing ring and cover plate, ensure that sealability, and improve anti-air pressure ability, add reliability.
Technical scheme of the present invention is achieved in that
A kind of MEMS chip encapsulating structure, comprising: cover plate and MEMS chip, and the functional surfaces of described MEMS chip has functional areas and is positioned at some weld pads of functional areas periphery, and described weld pad and described functional areas are electrical connected, described cover plate has first surface and second surface corresponding thereto, the first surface of described cover plate is equipped with the first insulating barrier, described first insulating barrier is equipped with the first metallic circuit layer, cushion is equipped with on region on described first insulating barrier except described first metallic circuit layer and on described first metallic circuit layer, described first metallic circuit layer is preset with sealing ring connecting portion and the conductive salient point connecting portion corresponding with some described weld pads, described cushion offers the first opening exposing described sealing ring connecting portion and the second opening exposing described conductive salient point connecting portion, sealing ring is manufactured with in described first opening, conductive salient point is manufactured with in described second opening, the described weld pad of the functional surfaces of described conductive salient point and described MEMS chip is bonded together, and makes described seal ring seal be looped around outside the functional areas of described MEMS chip, the second surface of described cover plate is formed and conducts structure, by electrically causing on described cover plate second surface of the described first metallic circuit layer of described cover plate first surface.
Further, on the cushion of described cover plate first surface, the position of the functional areas of corresponding described MEMS chip forms a cavity, and described cavity is positioned at described sealing ring, and covers the functional areas of described MEMS chip.
Further, the material of described cover plate is identical with the substrate material of described MEMS chip.
Further, the thickness of described sealing ring is 2 μm ~ 50 μm, its material comprise copper, tin, nickel, silver, gold, titanium one or more.
Further, described sealing ring is identical with the material of described conductive salient point, is metal material, and the height of described sealing ring is identical with the height of described conductive salient point.
Further, conduct structure described in comprise:
Lead-in wire opening, to be formed on described cover plate second surface and to extend on described first metallic circuit layer;
Second insulating barrier, on the second surface covering described cover plate and on the sidewall of described lead-in wire opening;
Second metallic circuit layer, is formed on described second insulating barrier, is electrically connected described first metallic circuit layer, and causes on the second surface of described cover plate;
Protective layer, is covered on described cover plate second surface and described second metallic circuit layer; Described protective layer is formed with the soldered ball of the reserved pad being electrically connected described second metallic circuit layer.
A preparation method for MEMS chip encapsulating structure, comprises the following steps:
A. provide the wafer that has some MEMS chip, the functional surfaces of described MEMS chip has functional areas and is positioned at some weld pads of functional areas periphery, and described weld pad and described functional areas are electrical connected, and have Cutting Road between adjacent MEMS chip;
B., one cover plate is provided, described cover plate has some unit of corresponding each MEMS chip, each unit has first surface and second surface corresponding thereto, the second surface of each unit is manufactured with lead-in wire opening, and lay the second insulating barrier, the second metallic circuit layer and protective layer successively in second surface and lead-in wire opening, and reserve pad on described second metallic circuit layer;
C. the first surface of described cover plate is ground or photoetching until described second surface exposes the second metallic circuit layer in described lead-in wire opening;
D. the first insulating barrier, the first metallic circuit layer and cushion is laid successively at the first surface of described cover plate, and described first insulating barrier is formed with insulated openings, described first metallic circuit layer is electrically connected described second metallic circuit layer by described insulated openings; Described first metallic circuit layer is preset with sealing ring connecting portion and the conductive salient point connecting portion corresponding with some described weld pads, the first opening exposing described sealing ring connecting portion and the second opening exposing described conductive salient point connecting portion is offered on described cushion, and sealing ring is made in described first opening, in described second opening, make conductive salient point;
E. make the conductive salient point of described cover plate first surface mutually corresponding with the bond pad locations of described MEMS chip functional surfaces and be bonded together;
F. described cover plate second surface is after bonding reserved pad locations and is formed soldered ball.
G. cut cover plate and wafer, form single MEMS chip encapsulating structure.
Further, in step D, on described cushion, the position of the functional areas of corresponding described MEMS chip forms a cavity, and described cavity is positioned at described sealing ring, and can cover the functional areas of described MEMS chip;
Further, the buffer layer thickness of described cover plate first surface is 2um ~ 30um.
Further, the thickness of described sealing ring is 2um ~ 50um, and width is for being not less than 30um.
The invention has the beneficial effects as follows: the invention provides a kind of MEMS chip encapsulating structure and preparation method thereof, first, cushion is equipped with on region on first insulating barrier except the first metallic circuit layer and on described first metallic circuit layer, add the adhesion of sealing ring and cover plate, ensure that sealability, and improve anti-air pressure ability, add reliability, simultaneously because the rigidity of cushion (such as pi) is more weak, be conducive to discharging stress; Secondly, the interconnection line of this packaging technology is from cover plate instead of draws this from MEMS chip substrate and just greatly reduce the impact of stress on device performance; In addition, the cover plate identical with MEMS substrate material is adopted to reduce traditional problem excessive with thermal coefficient of expansion during bond glass; Finally; cover plate is provided with cavity; the functional surfaces of MEMS chip is connected with the bonding of the first surface of cover plate and is realized by sealing ring and some conductive salient points; seal ring seal is around the functional areas of MEMS chip; functional unit for functional areas provides the working space of sealing, and this has good protective effect to chip functions district.
Accompanying drawing explanation
Fig. 1 is the MEMS chip schematic diagram containing functional areas and weld pad;
Fig. 2 is the cover plate schematic diagram that second surface contains reserved pad locations;
Fig. 3 is the structural representation laying the first insulating barrier at cover plate first surface;
Fig. 4 is the structural representation laying the first metallic circuit layer at cover plate first surface;
Fig. 5 lays cushion at cover plate first surface and forms the structural representation of the first opening and the second opening;
Fig. 6 is the structural representation forming sealing ring and conductive salient point at cover plate first surface;
Fig. 7 is the structural representation of cover plate and MEMS chip bonding;
Fig. 8 is the structural representation after MEMS chip has encapsulated.
By reference to the accompanying drawings, make the following instructions:
1-cover plate 2-MEMS chip
201-functional surfaces 202-functional areas
203-weld pad 3-first insulating barrier
4-first metallic circuit layer 401-sealing ring connecting portion
402-conductive salient point connecting portion 5-cushion
501-first opening 502-second opening
6-sealing ring 7-conductive salient point
8-cavity 9-goes between opening
10-second insulating barrier 11-second metallic circuit layer
12-protective layer 13-soldered ball
Detailed description of the invention
For enabling technical scheme of the present invention more understandable, below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in detail.For convenience of description, in the structure of embodiment accompanying drawing, each part does not press normal rates convergent-divergent, therefore does not represent the actual relative size of each structure in embodiment.
As shown in Figure 8, a kind of MEMS chip encapsulating structure, comprising: cover plate 1 and MEMS chip 2, and the functional surfaces 201 of described MEMS chip has functional areas 202 and is positioned at some weld pads 203 of functional areas periphery, and described weld pad and described functional areas are electrical connected, described cover plate has first surface and second surface corresponding thereto, the first surface of described cover plate is equipped with the first insulating barrier 3, described first insulating barrier is equipped with the first metallic circuit layer 4, cushion 5 is equipped with on region on described first insulating barrier except described first metallic circuit layer and on described first metallic circuit layer, described first metallic circuit layer is preset with sealing ring connecting portion 401 and the conductive salient point connecting portion 402 corresponding with some described weld pads, described cushion offers the first opening 501 exposing described sealing ring connecting portion and the second opening 502 exposing described conductive salient point connecting portion, sealing ring 6 is manufactured with in described first opening, conductive salient point 7 is manufactured with in described second opening, the described weld pad of the functional surfaces of described conductive salient point and described MEMS chip is bonded together, and makes described seal ring seal be looped around outside the functional areas of described MEMS chip, the second surface of described cover plate is formed and conducts structure, by electrically causing on described cover plate second surface of the described first metallic circuit layer of described cover plate first surface.Like this, cushion is equipped with on region on first insulating barrier except the first metallic circuit layer and on described first metallic circuit layer, add the adhesion of sealing ring and cover plate, ensure that sealability, and improve anti-air pressure ability, add reliability, simultaneously because the rigidity of cushion is more weak, be conducive to discharging stress; Secondly, the interconnection line of this packaging technology is from cover plate instead of draws this from MEMS chip substrate and just greatly reduce the impact of stress on device performance.
Preferably, on the cushion of described cover plate first surface, the position of the functional areas of corresponding described MEMS chip forms a cavity 8, and described cavity is positioned at described sealing ring, and covers the functional areas of described MEMS chip.Like this, the functional unit for functional areas provides the working space of sealing, and this has good protective effect to chip functions district.
Preferably, the material of described cover plate is identical with the substrate material of described MEMS chip; Reduce traditional problem excessive with thermal coefficient of expansion during bond glass.
Preferably, the thickness of described sealing ring is 2 μm ~ 50 μm, its material comprise copper, tin, nickel, silver, gold, titanium one or more.
Preferably, described sealing ring is identical with the material of described conductive salient point, is metal material, and the height of described sealing ring is identical with the height of described conductive salient point.
Preferably, conduct structure described in comprise:
Lead-in wire opening 9, to be formed on described cover plate second surface and to extend on described first metallic circuit layer;
Second insulating barrier 10, on the second surface covering described cover plate and on the sidewall of described lead-in wire opening;
Second metallic circuit layer 11, is formed on described second insulating barrier, is electrically connected described first metallic circuit layer, and causes on the second surface of described cover plate;
Protective layer 12, is covered on described cover plate second surface and described second metallic circuit layer; Described protective layer is formed with the soldered ball 13 of the reserved pad being electrically connected described second metallic circuit layer.
The preparation method of a kind of MEMS chip encapsulating structure of the embodiment of the present invention is described below in conjunction with Fig. 1 to Fig. 8.
A. see Fig. 1, the wafer that one has some MEMS chip 2 is provided, the functional surfaces 201 of described MEMS chip has functional areas 202 and is positioned at some weld pads 203 of functional areas periphery, described weld pad and described functional areas are electrical connected, as chip functions district and the extraneous window be communicated with, between adjacent MEMS chip, there is Cutting Road;
B. see Fig. 2, one cover plate 1 is provided, described cover plate has some unit of corresponding each MEMS chip, each unit has first surface and second surface corresponding thereto, the second surface of each unit is manufactured with lead-in wire opening 9, and lay the second insulating barrier 10, second metallic circuit layer 11 and protective layer 12 successively in second surface and lead-in wire opening, and reserve pad on described second metallic circuit layer; This lead-in wire opening can be formed by silicon via process, and the material of this second insulating barrier 10 can be silica or other materials; This second metallic circuit layer does not extend to Cutting Road position, so that protective layer encapsulating, the material of this protective layer can be high molecular polymer, silica, silicon nitride etc., plays insulation and protection metallic circuit.
Optionally, lead-in wire opening 9 can be formed by the first rear perforate of fluting, also can only fluting or only perforate.
Preferably, the hole depth of a perforate can reach 200-600um.
C. see Fig. 3, the first surface of described cover plate is ground or photoetching until described second surface exposes the second metallic circuit layer in described lead-in wire opening, for the electrical pad locations by leading to cover plate second surface of the weld pad by MEMS chip.
D. see Fig. 3, Fig. 4, Fig. 5 and Fig. 6, the first insulating barrier 3, first metallic circuit layer 4 and cushion 5 is laid successively at the first surface of described cover plate, and described first insulating barrier is formed with insulated openings, described first metallic circuit layer is electrically connected described second metallic circuit layer by described insulated openings; Described first metallic circuit layer is preset with sealing ring connecting portion 401 and the conductive salient point connecting portion 402 corresponding with some described weld pads, the first opening 501 exposing described sealing ring connecting portion and the second opening 502 exposing described conductive salient point connecting portion is offered on described cushion, and sealing ring 6 is made in described first opening, in described second opening, make conductive salient point 7.What the present invention first metallic circuit layer adopted is copper wire, and also can adopt other metals, this does not limit protection scope of the present invention.The cushion material that the present invention uses is pi, and also can adopt other materials, this does not limit protection scope of the present invention, and this cushion forms the first opening and the second opening by photoetching process.
Optionally, the material of the first metallic circuit layer can comprise one or more of nickel, gold, titanium, copper, tin, silver, iron etc.
Preferably, this first insulating barrier is can photoetching material, and direct exposure imaging forms this insulated openings.
Preferably, conductive salient point and sealing ring complete simultaneously, do technique so simple, reduce cost.
E. see Fig. 7, make the conductive salient point of described cover plate first surface mutually corresponding with the bond pad locations of described MEMS chip functional surfaces and be bonded together, not needing to be coated with adhesive glue.
F. see Fig. 8, described cover plate second surface is after bonding reserved pad locations and is formed soldered ball 13.Be soldered ball in the present embodiment, as tin ball, can also be solder micro convex point in other are implemented, or be directly UBM, or be copper post.
G. cut cover plate and wafer, form single MEMS chip encapsulating structure, see Fig. 8.
Preferably, in step D, on described cushion, the position of the functional areas of corresponding described MEMS chip forms a cavity 8, and described cavity is positioned at described sealing ring, and can cover the functional areas of described MEMS chip; Like this, by the cover board forming cavity, after this cavity bonding, cover on the top of the functional areas of MEMS chip, the device for MEMS chip functional areas provides seal operation space and/or working environment.
Preferably, the buffer layer thickness of described cover plate first surface is 2um ~ 30um.
Preferably, the thickness of described sealing ring is 2um ~ 50um, and width is for being not less than 30um.
In sum, the present invention can solve cover plate and the bad problem of chip adhesion preferably, cover plate used in the present invention has certain versatility simultaneously, can produce in enormous quantities, cover plate is only needed to cover on the chip that will encapsulate during encapsulation, the encapsulation to chip can be completed, simple and convenient.
Above embodiment is with reference to accompanying drawing, to a preferred embodiment of the present invention will be described in detail.Those skilled in the art by carrying out amendment on various forms or change to above-described embodiment, but when not deviating from essence of the present invention, drops within protection scope of the present invention.
Claims (10)
1. a MEMS chip encapsulating structure, it is characterized in that: comprising: cover plate (1) and MEMS chip (2), the functional surfaces (201) of described MEMS chip has functional areas (202) and is positioned at some weld pads (203) of functional areas periphery, and described weld pad and described functional areas are electrical connected, described cover plate has first surface and second surface corresponding thereto, the first surface of described cover plate is equipped with the first insulating barrier (3), described first insulating barrier is equipped with the first metallic circuit layer (4), cushion (5) is equipped with on region on described first insulating barrier except described first metallic circuit layer and on described first metallic circuit layer, described first metallic circuit layer is preset with sealing ring connecting portion (401) and the conductive salient point connecting portion (402) corresponding with some described weld pads, described cushion offers the first opening (501) exposing described sealing ring connecting portion and the second opening (502) exposing described conductive salient point connecting portion, sealing ring (6) is manufactured with in described first opening, conductive salient point (7) is manufactured with in described second opening, the described weld pad of the functional surfaces of described conductive salient point and described MEMS chip is bonded together, and makes described seal ring seal be looped around outside the functional areas of described MEMS chip, the second surface of described cover plate is formed and conducts structure, by electrically causing on described cover plate second surface of the described first metallic circuit layer of described cover plate first surface.
2. MEMS chip encapsulating structure according to claim 1, it is characterized in that: on the cushion of described cover plate first surface, the position of the functional areas of corresponding described MEMS chip forms a cavity (8), and described cavity is positioned at described sealing ring, and cover the functional areas of described MEMS chip.
3. MEMS chip encapsulating structure according to claim 1, is characterized in that: the material of described cover plate is identical with the substrate material of described MEMS chip.
4. MEMS chip encapsulating structure according to claim 1, is characterized in that, the thickness of described sealing ring is 2 μm ~ 50 μm, its material comprise copper, tin, nickel, silver, gold, titanium one or more.
5. MEMS chip encapsulating structure according to claim 1, it is characterized in that: described sealing ring is identical with the material of described conductive salient point, is metal material, and the height of described sealing ring is identical with the height of described conductive salient point.
6. MEMS chip encapsulating structure according to claim 1, is characterized in that: described in conduct structure and comprise:
Lead-in wire opening (9), to be formed on described cover plate second surface and to extend on described first metallic circuit layer;
Second insulating barrier (10), on the second surface covering described cover plate and on the sidewall of described lead-in wire opening;
Second metallic circuit layer (11), is formed on described second insulating barrier, is electrically connected described first metallic circuit layer, and causes on the second surface of described cover plate;
Protective layer (12), is covered on described cover plate second surface and described second metallic circuit layer; Described protective layer is formed with the soldered ball (13) of the reserved pad being electrically connected described second metallic circuit layer.
7. a preparation method for MEMS chip encapsulating structure, is characterized in that: comprise the following steps:
A., the wafer that has some MEMS chip (2) is provided, the functional surfaces (201) of described MEMS chip has functional areas (202) and is positioned at some weld pads (203) of functional areas periphery, described weld pad and described functional areas are electrical connected, and have Cutting Road between adjacent MEMS chip;
B., one cover plate (1) is provided, described cover plate has some unit of corresponding each MEMS chip, each unit has first surface and second surface corresponding thereto, the second surface of each unit is manufactured with lead-in wire opening (9), and lay the second insulating barrier (10), the second metallic circuit layer (11) and protective layer (12) successively in second surface and lead-in wire opening, and reserve pad on described second metallic circuit layer;
C. the first surface of described cover plate is ground or photoetching until described second surface exposes the second metallic circuit layer in described lead-in wire opening;
D. the first insulating barrier (3), the first metallic circuit layer (4) and cushion (5) is laid successively at the first surface of described cover plate, and described first insulating barrier is formed with insulated openings, described first metallic circuit layer is electrically connected described second metallic circuit layer by described insulated openings; Described first metallic circuit layer is preset with sealing ring connecting portion (401) and the conductive salient point connecting portion (402) corresponding with some described weld pads, the first opening (501) exposing described sealing ring connecting portion and the second opening (502) exposing described conductive salient point connecting portion is offered on described cushion, and sealing ring (6) is made in described first opening, in described second opening, make conductive salient point (7);
E. make the conductive salient point of described cover plate first surface mutually corresponding with the bond pad locations of described MEMS chip functional surfaces and be bonded together;
F. described cover plate second surface is after bonding reserved pad locations and is formed soldered ball (13).
G. cut cover plate and wafer, form single MEMS chip encapsulating structure.
8. the preparation method of MEMS chip encapsulating structure according to claim 7, it is characterized in that, in step D, on described cushion, the position of the functional areas of corresponding described MEMS chip forms a cavity (8), described cavity is positioned at described sealing ring, and can cover the functional areas of described MEMS chip;
9. the preparation method of MEMS chip encapsulating structure according to claim 7, it is characterized in that, the buffer layer thickness of described cover plate first surface is 2um ~ 30um.
10. the preparation method of MEMS chip encapsulating structure according to claim 7, it is characterized in that, the thickness of described sealing ring is 2um ~ 50um, and width is for being not less than 30um.
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| WO2022012476A1 (en) * | 2020-07-14 | 2022-01-20 | 中芯集成电路（宁波）有限公司上海分公司 | Wafer level packaging method and package structure of mems device |
| CN117303305A (en) * | 2023-11-29 | 2023-12-29 | 麦斯塔微电子(深圳)有限公司 | MEMS device packaging structure and preparation method thereof |
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Application publication date: 20160113 Assignee: Huatian Science and Technology (Nanjing) Co.,Ltd. Assignor: HUATIAN TECHNOLOGY (KUNSHAN) ELECTRONICS Co.,Ltd. Contract record no.: X2021610000005 Denomination of invention: MEMS chip packaging structure and its fabrication method Granted publication date: 20170926 License type: Common License Record date: 20210527 |