CN105224890A - A kind of information protecting method and storer - Google Patents
A kind of information protecting method and storer Download PDFInfo
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- CN105224890A CN105224890A CN201410250697.8A CN201410250697A CN105224890A CN 105224890 A CN105224890 A CN 105224890A CN 201410250697 A CN201410250697 A CN 201410250697A CN 105224890 A CN105224890 A CN 105224890A
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Abstract
The invention discloses a kind of information protecting method and storer, wherein, described information protecting method comprises: according to preset rules judge I/O interface to information be the first protection information or the second protection information; When I/O interface to information be the first protection information time: the first protection information is write the first volatile storage; Read the first protection information write in the first volatile storage, and the first protection information write in the first volatile storage is write in non-volatility memorizer; First protection information is also written back in the first volatile storage by the first protection information write in reading non-volatility memorizer; When I/O interface to information be the second protection information time: the second protection information is write in the second volatile storage.Present invention reduces the area occupied of storage chip in storer, accelerate the reading rate of the first protection information, and when storer generation power down, the first protection information can not be lost.
Description
Technical field
The present invention relates to technical field of memory, be specifically related to a kind of information protecting method and storer.
Background technology
Along with developing rapidly and widespread use of various electronic installation and embedded system, as computing machine, personal digital assistant, mobile phone, digital camera etc., need the storer that capacity is large, storage chip area occupied is little in a large number.
Permanent safeguard bit (PersistentProtectionBits; be called for short PPB) and dynamic protection position (DynamicProtectionBits; be called for short DYB) be two kinds of modes of storage protection information; can with block (block) or section (sector) for unit protects; a general block or corresponding (bit) protection information of sector, the guard mode that block or sector corresponding according to this bit of Determines of bit needs.In the storage chip of mass storage; adopt block-based protected mode (AdvancedBlockProtection) to carry out block or sector protection and there is higher degree of freedom; when the capacity stored in storer is larger; the number of usual block or sector is many, and the number of the protection information of PPB and DYB therefore needed is more.
In prior art, generally use latch (latch) to store the data be under PPB and DYB protected mode, each latch has corresponding decoding selection circuit and exports storbing gate, is finally connected in cluster bus.Latch is adopted to be that read-write operation is simple to the benefit that the data under PPB and DYB protected mode store; but when the number of the protection information needing PPB and DYB stored in storer is larger; this method makes the area occupied of storage chip excessive; and along with storage size increase; the area that a large amount of decoding schemes and gating circuit take is excessive, thus causes the wasting of resources.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of information protecting method and storer, to solve the problem that when mass storage carries out information protection, storage chip area occupied is excessive.
On the one hand; embodiments provide a kind of information protecting method; information in order to receive a storer is protected; described information comprises the first protection information and the second protection information; this storer comprises I/O interface, the first volatile storage, the second volatile storage and non-volatility memorizer, and described information protecting method comprises:
According to preset rules judge described I/O interface to information be the first protection information or the second protection information;
When I/O interface to information be the first protection information time:
Described first protection information is write and is stored in the first volatile storage;
Read the first protection information stored in described first volatile storage, and the first protection information stored in the first volatile storage is write and is stored in described non-volatility memorizer;
Read the first protection information of storing in described non-volatility memorizer and described first protection information is written back in the first volatile storage;
When I/O interface to information be the second protection information time:
Described second protection information is write and is stored in the second volatile storage.
Further, described method also comprises:
When described storer power down and after re-powering, read the first protection information of storing in described non-volatility memorizer and described first protection information is write in the first volatile storage.
Further, when described storer exports the first protection information, from described first volatile storage, read the first protection information and described first protection information is sent to described I/O interface.
Further, when described storer exports the second protection information, from described second volatile storage, read the second protection information and described second protection information is sent to described I/O interface.
On the other hand, embodiments provide a kind of storer, described storer comprises:
I/O interface, for receiving or output information, wherein, described information comprises the first protection information and/or the second protection information;
First volatile storage, for writing and storing the first protection information that described I/O interface arrives, also for reading the first protection information write in non-volatility memorizer described in the first protection information write-back that store in non-volatility memorizer;
Non-volatility memorizer, for reading in described first volatile storage described first protection information stored, and writes and stores the first protection information stored in described first volatile storage;
Second volatile storage, for writing and storing the second protection information that described I/O interface arrives.
Further, when described storer power down and after re-powering, described first volatile storage reads the first protection information stored in non-volatility memorizer and also writes the first protection information write in described non-volatility memorizer.
Further, described first volatile storage or described second volatile storage are static RAM.
Further, described non-volatility memorizer comprises any one in ROM (read-only memory), programmable type ROM (read-only memory), electrically-alterable ROM (EAROM), erasable and programmable formula ROM (read-only memory), erasable programmable type ROM (read-only memory) and flash memory.
Further, described first protection information is permanent safeguard bit protection information.
Further, described second protection information is dynamic protection position protection information.
The information protecting method that the embodiment of the present invention provides and storer, by the first protection information and the second protection information are stored in the first volatile storage and the second volatile storage respectively, reduce the area occupied of storage chip in storer, in addition, being stored in by described first protection information after in the first volatile storage is stored in non-volatility memorizer by the first protection information be stored in the first volatile storage further, again the first protection information be stored in non-volatility memorizer is written back in the first volatile storage afterwards, accelerate the reading rate of the first protection information, and when storer generation power down, described first protection information can not be lost.
Accompanying drawing explanation
Exemplary embodiment of the present invention will be described in detail by referring to accompanying drawing below, the person of ordinary skill in the art is more clear that above-mentioned and other feature and advantage of the present invention, in accompanying drawing:
Fig. 1 is the process flow diagram of a kind of information protecting method that the embodiment of the present invention one provides;
Fig. 2 is the structural drawing of a kind of storer that the embodiment of the present invention two provides.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, illustrate only part related to the present invention in accompanying drawing but not full content.
Embodiment one
Fig. 1 is the process flow diagram of a kind of information protecting method that the embodiment of the present invention one provides; as shown in Figure 1; this information protecting method is protected in order to the information received a storer; described information comprises the first protection information and the second protection information; this storer comprises I/O interface, the first volatile storage, the second volatile storage and non-volatility memorizer; particularly, described information protecting method comprises:
Step 11, to judge according to preset rules described I/O interface to information be the first protection information or the second protection information.
In the present embodiment; according to preset rules judge described I/O interface to information be the first protection information or the second protection information; when described I/O interface to information be the first protection information time; perform step 12; when described I/O interface to information be the second protection information time, perform step 15.
For example, when I/O interface to information there is numerical value (1000)
2, (1001)
2, (1010)
2, (1011)
2, (1100)
2, (1101)
2, (1110)
2or (1111)
2time, judge that the information received is the first protection information according to preset rules, then described I/O interface sends the first write enable signal E1 to described first volatile storage, and the first protection information writes in described first volatile storage according to described first write enable signal E1 by the first volatile storage; When I/O interface to information there is numerical value (0000)
2time; judge that the information received is the second protection information according to preset rules; then described I/O interface sends the second write enable signal E2 to described second volatile storage, and the second protection information writes in the second volatile storage according to described second write enable signal E2 by the second volatile storage.
In the present embodiment; described first protection information is preferably permanent safeguard bit protection information; i.e. PPB protection information; described second protection information is preferably dynamic protection position protection information; i.e. DYB protection information; wherein, described PPB protection is the protected mode that a kind of power down is not lost, and DYB is the protected mode that a kind of power down is lost.
Step 12, described first protection information write and is stored in the first volatile storage.
When I/O interface to information be PPB protection information time; send the first write enable signal E1 to described first volatile storage, after the first volatile storage receives described first write enable signal E1, PPB protection information write and be stored in the first volatile storage.
In the present embodiment; described first volatile storage is preferably static RAM (StaticRAM; be called for short SRAM); SRAM does not need to refresh the data can preserving its storage inside; due to SRAM read or write speed quickly; during I/O interface sends the first write enable signal E1, by the data of PPB protection information completely stored in a SRAM, thus the work efficiency of storer entirety can be improved.
Step 13, read the first protection information stored in described first volatile storage, and the first protection information stored in the first volatile storage is write and is stored in described non-volatility memorizer.
PPB protection information is stored in after in a SRAM, the control circuit of memory inside sends the signal of reading the one SRAM, described non-volatility memorizer reads the PPB protection information stored in a described SRAM, the control circuit of memory inside sends write enable signal, the PPB protection information stored in the SRAM read writes in described nonvolatile memory by described non-volatility memorizer, by slow for the speed that the PPB protection information stored in a SRAM writes described non-volatility memorizer further, but the data due to described PPB protection information have been temporarily stored in a described SRAM, as long as therefore do not have new data input covered by described PPB protection information or power down occurs in a SRAM, the data writing the PPB protection information in described non-volatility memorizer are believable.
In the present embodiment, described volatile storage can comprise ROM (read-only memory) (Read-OnlyMemory, be called for short ROM), programmable type ROM (read-only memory) (ProgrammableROM, be called for short PROM), electrically-alterable ROM (EAROM) (ElectricallyAlterableRead-OnlyMemory, be called for short EAROM), erasable and programmable formula ROM (read-only memory) (ErasableProgrammableRead-OnlyMemory, be called for short EPROM), erasable programmable type ROM (read-only memory) (ElectricallyErasableProgrammableRead-OnlyMemory, be called for short EEPROM) and flash memory (FlashMemory) in any one, these non-volatility memorizer stored data are stablized, when there is power down, the data of the protection information stored also can not change, therefore, by PPB protection information stored in described non-volatility memorizer, ensure that PPB protection information can not because of storer generation power down by the loss of data of PPB protection information.
Step 14, read the first protection information of storing in described non-volatility memorizer and described first protection information is written back in the first volatile storage.
The internal control circuit of storer sends the signal that reads described non-volatility memorizer and the data of the PPB protection information stored in the non-volatility memorizer read is sent in a described SRAM; the control circuit of described memory inside sends the write enable signal of a SRAM simultaneously, and the write back data of the PPB protection information stored in the described non-volatility memorizer received enters in a SRAM by a described SRAM.When the data that the data being written back into the PPB protection information in a SRAM and described I/O interface write the protection information of the PPB in a SRAM are identical; illustrate that the PPB protection information stored in described non-volatility memorizer is correct, thus can prevent because the reasons such as non-volatility memorizer is aging cause the situation of the data transformation entering the PPB protection information described non-volatility memorizer from the first SRAM write.
In the present embodiment; when user will read PPB protection information; or when the chip internal at storer place will read PPB protection information when carrying out program erase operation, from a described SRAM, read described PPB protection information and described PPB protection information is sent to I/O interface.
Step 15, described second protection information to be write in the second volatile storage.
In the present embodiment; described second protection information can be preferably DYB protection information; DYB protection information is dynamic protection information; the loss of data of the protection information stored after storer power down; described second volatile storage is preferably SRAM; for DYB protection information, only need to ensure that the data of protection information are effective before the storage chip power down of this external memory, so only need in DYB protection information write the 2nd SRAM.
When user will read DYB protection information, or when will read DYB protection information when the chip internal at storer place carries out program erase operation, from described 2nd SRAM, read described DYB protection information and described DYB protection information is sent to I/O interface.
In a preferred embodiment of the present embodiment, when described I/O interface to information be the first protection information time, described method also comprises:
When described storer power down and after re-powering, read the first protection information of storing in described non-volatility memorizer and described first protection information is write in the first volatile storage.
When storer generation power down; the first protection information be stored in the first volatile storage is lost; after storer re-powers, in order to accelerate the speed of reading first protection information, the first protection information be stored in nonvolatile memory is write in the first volatile storage.
The information protecting method that the embodiment of the present invention one provides, by the first protection information and the second protection information are stored in the first volatile storage and the second volatile storage respectively, reduce the area occupied of storage chip in storer, in addition, being stored in by described first protection information after in the first volatile storage is stored in non-volatility memorizer by the first protection information be stored in the first volatile storage further, again the first protection information be stored in non-volatility memorizer is written back in the first volatile storage afterwards, accelerate the reading rate of the first protection information, and when storer generation power down, described first protection information can not be lost.
Embodiment two
Fig. 2 is the structural drawing of a kind of storer that the embodiment of the present invention two provides, and as shown in Figure 2, described storer comprises I/O interface 21, first volatile storage 22, non-volatility memorizer 23 and the second volatile storage 24.
Described I/O interface 21 is for receiving or output information, and wherein, described information comprises the first protection information and/or the second protection information.
I/O interface 21 receives external input information and comprises the first protection information and/or the second protection information; judge that the information that I/O interface 21 receives is the first protection information or the second protection information according to preset rules; when judge I/O interface to information be the first protection information time; the first write enable signal is sent to the first volatile storage 22; when judge I/O interface to information be the second protection information time, send the second write enable signal to the second volatile storage 24.
In the present embodiment; described first protection information can be preferably PPB protection information; described PPB protection information is permanent position protection information; for the means of information protection that power down is not lost; described second protection information can be preferably DYB protection information; described DYB protection information is dynamic protection position protection information, is the protected mode that power down is lost.
When user will read PPB protection information, or when will read PPB protection information when the chip internal of storer carries out program erase operation, from described first volatile storage, read described PPB protection information and described PPB protection information is sent to I/O interface.
When user will read DYB protection information; or when the chip internal of storer will read DYB protection information when carrying out program erase operation, from described second volatile storage 24, read described DYB protection information and described DYB protection information is sent to I/O interface 21.
The PPB protection information that described first volatile storage 22 receives for writing described I/O interface 21, also for reading in non-volatility memorizer 23 the PPB protection information of write and the PPB protection information of write in non-volatility memorizer 23 described in write-back.
Described first volatile storage 22 can be preferably SRAM; its read or write speed quickly; when I/O interface to information be PPB protection information time, send the first write enable signal to a SRAM, a SRAM according to the first write enable signal by PPB protection information write the one SRAM in.
After non-volatility memorizer 23 writes and stores the PPB protection information stored in the first volatile storage 22, described first volatile storage 22 reads the PPB protection information of storage in non-volatility memorizer 23 and is written back into by described PPB protection information in a described SRAM22, by the PPB protection information be written back in the first volatile storage 22 with write compared with the PPB protection information in a SRAM22 from described I/O interface 21, when the two is identical, illustrate that the PPB protection information stored in described non-volatility memorizer 23 is believable, prevent the incomplete situation of storage data because the reasons such as non-volatility memorizer 23 is aging cause.
In addition; when described storer power down and after re-powering; a described SRAM22 reads the PPB protection information of storage in non-volatility memorizer 23 and writes the PPB protection information stored in described non-volatility memorizer 23; the benefit of such process is; when storer generation power down; the PPB protection information be stored in a SRAM22 is lost; after storer re-powers; in order to accelerate the speed reading PPB protection information, the PPB protection information be stored in nonvolatile memory 23 is write in a SRAM22.
Described non-volatility memorizer 23 for reading the described PPB protection information of write in described first volatile storage 22, and writes and stores the PPB protection information stored in described first volatile storage 22.
PPB protection information is stored in after in a SRAM22; non-volatility memorizer 23 reads the PPB protection information in a SRAM22; and the PPB protection information in a SRAM22 is write and is stored in non-volatility memorizer 23, prevent storer generation power down from causing the loss of data of PPB protection information.
The second protection information that described second volatile storage 24 receives for writing described I/O interface 21.
Described second volatile storage 24 can be preferably SRAM; when the information that described I/O interface 21 receives is the second protection information; send the second write enable signal to the second volatile storage 24, the second protection information writes in the second volatile storage 24 according to described second write enable signal by described second volatile storage 24.
The storer that the embodiment of the present invention two provides, by the first protection information and the second protection information are stored in the first volatile storage and the second volatile storage respectively, reduce the area occupied of storage chip in storer, in addition, being stored in by described first protection information after in the first volatile storage is stored in non-volatility memorizer by the first protection information be stored in the first volatile storage further, again the first protection information be stored in non-volatility memorizer is written back in the first volatile storage afterwards, accelerate the reading rate of the first protection information, and when storer generation power down, described first protection information can not be lost.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, to those skilled in the art, the present invention can have various change and change.All do within spirit of the present invention and principle any amendment, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. an information protecting method; information in order to receive a storer is protected; described information comprises the first protection information and the second protection information; this storer comprises I/O interface, the first volatile storage, the second volatile storage and non-volatility memorizer; it is characterized in that, described information protecting method comprises:
According to preset rules judge described I/O interface to information be the first protection information or the second protection information;
When I/O interface to information be the first protection information time:
Described first protection information is write and is stored in the first volatile storage;
Read the first protection information stored in described first volatile storage, and the first protection information stored in the first volatile storage is write and is stored in described non-volatility memorizer;
Read the first protection information of storing in described non-volatility memorizer and described first protection information is written back in the first volatile storage;
When I/O interface to information be the second protection information time:
Described second protection information is write and is stored in the second volatile storage.
2. information protecting method according to claim 1, is characterized in that, described method also comprises:
When described storer power down and after re-powering, read the first protection information of storing in described non-volatility memorizer and described first protection information is write in the first volatile storage.
3. information protecting method according to claim 1, is characterized in that, when described storer exports the first protection information, reads the first protection information and described first protection information is sent to described I/O interface from described first volatile storage.
4. information protecting method according to claim 1, is characterized in that, when described storer exports the second protection information, reads the second protection information and described second protection information is sent to described I/O interface from described second volatile storage.
5. a storer, is characterized in that, described storer comprises:
I/O interface, for receiving or output information, wherein, described information comprises the first protection information and/or the second protection information;
First volatile storage, for writing and storing the first protection information that described I/O interface arrives, also for reading the first protection information write in non-volatility memorizer described in the first protection information write-back that store in non-volatility memorizer;
Non-volatility memorizer, for reading in described first volatile storage described first protection information stored, and writes and stores the first protection information stored in described first volatile storage;
Second volatile storage, for writing and storing the second protection information that described I/O interface arrives.
6. storer according to claim 5; it is characterized in that; when described storer power down and after re-powering, described first volatile storage reads the first protection information stored in non-volatility memorizer and also writes the first protection information write in described non-volatility memorizer.
7. storer according to claim 5, is characterized in that, described first volatile storage or described second volatile storage are static RAM.
8. storer according to claim 5, it is characterized in that, described non-volatility memorizer comprise in ROM (read-only memory), programmable type ROM (read-only memory), electrically-alterable ROM (EAROM), erasable and programmable formula ROM (read-only memory), erasable programmable type ROM (read-only memory) and flash memory any one.
9. storer according to claim 5, is characterized in that, described first protection information is permanent safeguard bit protection information.
10. storer according to claim 5, is characterized in that, described second protection information is dynamic protection position protection information.
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| CN101015021A (en) * | 2004-05-11 | 2007-08-08 | 斯班逊有限公司 | Semiconductor device and method of controlling the semiconductor device |
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|---|---|---|---|---|
| CN101015021A (en) * | 2004-05-11 | 2007-08-08 | 斯班逊有限公司 | Semiconductor device and method of controlling the semiconductor device |
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