CN105204958A - Coding method for prolonging NAND Flash data reliable storage time - Google Patents
Coding method for prolonging NAND Flash data reliable storage time Download PDFInfo
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Abstract
The invention relates to a coding method for prolonging NAND Flash data reliable storage time, and aims to solve the problems in the prior art that the NAND Flash data reliable storage time is short, the computing cost of the LDPC algorithm is high, the computing capability requirements of a hardware are high, and data backup needs to be rewritten. The coding method is realized through the following steps: 1, obtaining corresponding continuous reliable storage time length; 2, iteratively executing the step 1 after the data is read each time; 3, after the step 2 is executed, comparing T<store> and T<limit>, and if reaching the T<limit>, executing the step 4, otherwise, executing the step 5; 4, starting up an out-of-place updating mechanism of the data; 5, reading the data; 6, executing ECC error correction; 7, judging whether the storage time length of the data reaches T<next>, and if yes, executing the step 8, and if no, executing the step 9; 8, when T<current> reaches the T<next>, executing the step 2 and the step 9; 9, obtaining the correct data; 10, ending. The coding method is applied to the field of data storage.
Description
Technical field
The present invention relates to the coding method extending the NANDFlash data reliable memory time.
Background technology
Solid state hard disc (SolidStateDrives, SSDs) there is the advantages such as read or write speed is fast, low in energy consumption, shock resistance is strong, the good characteristic of SSDs makes it replace traditional mechanical type rotating disk gradually, be widely used in the movable storage devices such as embedded and consumer electronics at present, and large data server field.For improving the memory capacity of SSDs and reducing its unit carrying cost, NANDFlash develops into multilevel-cell (Multi-levelCell, MLC) from single layer cell (SingleLevelCell, SLC) gradually.Under same volume, the threshold voltage spacing that MLC/TLC closes on state can obviously diminish.Therefore, while the raising of NANDFlash chip production process brings high performance-price ratio, the reduction of NANDFlash data reliable memory time is inevitably brought.
The type of error affecting NANDFlash memory reliability macroscopically main manifestations be programming interference mistake, read error, erasure error and resident wrong four kinds.And the occasion of longer-term storage is needed in data, resident mistake just becomes dominant type of error, and this is also one of type of error of paying close attention to most of people.The resident mistake of data of NANDFlash is mainly because the electronics being originally stored in floating boom pole is revealed, and the voltage causing floating boom pole to keep diminishes.The reading of the present data of this error list is exactly there occurs bit flipping.Namely data change to " 0 " by " 1 " or are changed to " 1 " by " 0 ", one of resident error property is exactly that the unit errors present attribute when each reading made a mistake remains unchanged substantially, also be in other words in adjacent twi-read (not experiencing erase operation) process, the position registration of resident mistake in NANDFlash very high (more than 70%).Can be concise and to the point be stated by Fig. 2, wherein letter represents Error Location, and in figure, a, b, c, e, f are the mistake that repeatable position occurs, and g, h are the new mistake produced, and registration is 5/6.The prolongation along with time data memory that we are usually said, the increase of error in data figure place is also resident mistake newly-increased in the resident errors of original Flash, and namely it is cumulative relation on position relationship.
Before MLC/TLC is universal, for the error correction algorithm mainly Hamming check code of SLC chip, this algorithm checking feature is very limited, be merely able to inspection 2 bit error correction 1 bit-errors, this is enough to SLC, because it is very low that the characteristic of SLC itself determines its error rate, substantially do not need the error correction algorithm that error correcting capability is strong.After MLC chip occurs, original error correction algorithm just can not meet current demand, so bring into use BCH error correction algorithm gradually, corresponding computing cost also significantly improves, to such an extent as to needs special main control chip to run error correction algorithm, and it is exactly this error correction algorithm that current NANDFlash mainly adopts.BCH not only can correct a mistake, the position of all right Wrong localization.For TLC chip, BCH algorithm is also difficult to adapt to its ever-increasing error rate, and then there is the LDPC algorithm that error correcting capability is stronger, but because this algorithm computing cost is high, it is made to require that comparatively BCH algorithm is high to the arithmetic capability of hardware, relative BCH algorithm, needs to rewrite mass data backup, is not also widely used at present.
Summary of the invention
The object of the invention is to solve that the existing NANDFlash data reliable memory time is low, LDPC algorithm computing cost is high, the arithmetic capability of hardware requires high, the problem that data backup rewrites, and a kind of coding method extending the NANDFlash data reliable memory time is proposed.
Above-mentioned goal of the invention is achieved through the following technical solutions:
Step one, according to data storage time length T
storewith can error correction figure place, obtain and correspondingly continue reliable memory time span T
next, automatically upgrade errors present information table, mark is misregistration positional information also;
Step 2, in data storage procedure, read data each time, iteration performs a step one;
After step 3, execution step 2, by T
storewith limit protection cycle T
limitcompare, if reach capacity protection period T
limit, then step 4 is performed, if do not reach capacity protection period T
limit, then step 5 is performed;
Described, limit protection cycle T
limitfor artificial setting in advance;
The strange land update mechanism of step 4, startup data, utilizes the FTL garbage reclamation mechanism of NANDFlash, data is backed up in strange land, flushing errors positional information table, then perform step 5;
Step 5, reading data;
Step 6, execution ECC error correction;
Step 7, judging distance upgraded errors present information table, time data memory length T last time
currentwhether reach and continue reliable memory time span T
nextif then row step 8, if not, performs step 9; T
currentfor the module preset in storage system, the time that record data store;
Step 8, works as T
currentreach T
nextduring time span, upgrade errors present information table, namely according to ECC characteristic, mark is misregistration positional information also, performs step 2, then performs step 9;
Step 9, acquisition correct data;
Step 10, end.
Invention effect
Adopt a kind of coding method extending the NANDFlash data reliable memory time of the present invention, patent of the present invention relates to field of solid state storage, current solid-state storage is based on MLC/TLC type NAND Flash memory chip, and its error rate is obviously higher than traditional SLC chip.Patent emphasis of the present invention is studied for the resident mistake of the data that MLC/TLC chip is higher, under the prerequisite of not carrying out HardwareUpgring or raising ECC algorithm error correcting capability, by the resident error property of the data of NANDFlash, utilizing NANDFlash mistake prediction model indirectly can improve ECC can error correction figure place, and then extends the time of data reliable memory.The data such as this coding strategy can be widely used in data server, archives need the long-time application stored.Nowadays the focus of research has been become for the research of the resident mistake of NANDFlash.Patent of the present invention relates to a kind of coding strategy extending the NANDFlash data reliable memory time, utilize the position registration characteristic of the resident mistake of NANDFlash, in conjunction with corresponding storage policy, make do not needing under the prerequisite changing ECC error correcting capability, extend the reliable holding time of data in Flash, save HardwareUpgring cost, the method significantly improves the reliability that NANDFlash data store under the prerequisite not changing ECC error correcting capability simultaneously.
1) do not change the original storage data in NANDFlash, each " renewal " only need store a small amount of errors present information, avoids the mass data backup rewriting that classic method causes;
2) this coding method can under the prerequisite not increasing HardwareUpgring cost and ECC error correcting capability, and what significantly increase NANDFlash can error correction figure place, improves the reliable memory time of data, such as: traditional E CC error correcting capability is that every 512 bytes can error correction 3, we get the Flash block wiping 5000 times, under the prerequisite not changing ECC error correcting capability, misregistration is corrected by the positional information of misregistration, extend the data reliable memory time, effect signal is as Fig. 6, wherein reliable memory time first time is the reliable memory time of traditional scheme data, second with the reliable memory time is that use the present invention accumulates the reliable memory time obtained after superposition upgrades erropr message list for the third time, as seen from Figure 6, the data reliable memory time can be significantly improved after application the present invention.
3) propose the concept of reliable memory time, when data retention over time reaches the threshold value of reliable memory time, start and upgrade errors present information table mechanism, and in conjunction with the error prediction model of NANDFlash, determine the time can continuing reliable memory;
4) propose the concept in data protection cycle, when data retention over time reaches the threshold value of protection period, after starting strange land update mechanism, start new protection period;
5) additional storage space takies less, and the computational load brought can be disregarded.
Accompanying drawing explanation
Fig. 1 is process flow diagram of the present invention;
Fig. 2 is that in background technology, resident error occurrence location registration describes schematic diagram;
Fig. 3 is for calculating reliable memory time span T
nextschematic flow sheet;
Fig. 4 is for restarting protection period schematic flow sheet;
Fig. 5 is digital independent schematic flow sheet;
Fig. 6 is for extending data reliable memory time principle schematic.
Embodiment
Embodiment one: composition graphs 1 illustrates present embodiment, a kind of coding method extending the NANDFlash data reliable memory time, it is characterized in that, the coding method of a kind of NANDFlash of prolongation data reliable memory time is specifically carried out according to the following steps:
Step one, according to data storage time length T
storewith can error correction figure place, obtain and correspondingly continue reliable memory time span T
next, automatically upgrade errors present information table, mark is misregistration positional information also;
Step 2, in data storage procedure, read data each time, iteration performs a step one;
Step 3, as Fig. 4, to perform after step 2, by T
storewith limit protection cycle T
limitcompare, if reach capacity protection period T
limit(illustrate and accumulated a large amount of mistakes), then perform step 4, if do not reach capacity protection period T
limit, then step 5 is performed;
Described, limit protection cycle T
limitfor artificial setting in advance;
The strange land update mechanism of step 4, startup data, utilize the FTL garbage reclamation mechanism of NANDFlash, data are carried out in strange land back up (also just meaning the data storage cycles starting a new round), flushing errors positional information table, then perform step 5;
Step 5, reading data;
Step 6, execution ECC error correction;
Step 7, judging distance upgraded erropr message list last time, time data memory length T
currentwhether reach and continue reliable memory time span T
nextif then row step 8, if not, performs step 9; T
currentfor the module preset in storage system, the time that record data store;
Step 8, works as T
currentreach T
nextduring time span, upgrade errors present information table, namely according to ECC characteristic, mark is misregistration positional information also, performs step 2, then performs step 9;
Step 9, acquisition correct data;
Step 10, end.
Embodiment two: present embodiment and embodiment one unlike: in described step one according to data storage time length T
storewith can error correction figure place, automatically upgrade errors present information table; Detailed process is:
Step one by one, as Fig. 3, by read timestamp obtain data storage time length T
store, obtain current wrong figure place by data redundancy district, the 80% calculating acquisition of current wrong figure place press ECC checking feature can error correction figure place;
ECC is writing a Chinese character in simplified form of " ErrorCorrectingCode ", is bug check and correction;
Step one two, by step one by one in data storage time length T
storewith can the error prediction model of error correction figure place input NANDFlash, obtain and corresponding continue reliable memory time span T
next(also just determining the moment needing next time to upgrade errors present information table), as time data memory length T
currentreach T
nextduring time span, automatically upgrade errors present information table, namely according to ECC characteristic, mark is misregistration positional information also, T
currentfor the module preset in storage system, the time that record data store.
Other step and parameter identical with embodiment one.
Embodiment three: present embodiment and embodiment one or two unlike: read data in described step 5; Detailed process is:
Step May Day, as Fig. 5, iteration performs a step one, reading error location information table, and information table is that sky then performs step 5 two, otherwise performs step 5 three;
Step 5 two, establishment errors present information table, perform step 2 (performing once);
Step 5 three, errors present according to errors present information table record, carry out step-by-step inversion operation to the information of errors present, data are stored as scale-of-two, and namely non-zero namely 1, identify errors present, namely correspondence position negate can be obtained correct data.
The startup of reading process mainly contains two kinds of modes, and one is by start by set date, and namely time data memory reaches force start time span T
next.Another kind is exactly with the daily digital independent of user, by self-adaptation start by set date way selection, can avoid because of the repeatedly erropr message list frequent updating that causes of read operation in a short time.What describe is data reading mode, only has correct having read out of data, just completes the object of reliable memory.Major function is exactly while data reading, record the positional information of mistake, and the positional information of mistake is preserved.With Normal practice unlike, corresponding data position " negate " in sense data is obtained the data of " correctly " by the errors present information that can store according to these when next time reads, so just before execution ECC, error correction can be carried out to the data bit of recorded errors present, avoid the data backup expense that conventional measures causes, for ECC error correction leaves larger performance space.
Other step and parameter identical with embodiment one or two.
Embodiment:
Traditional E CC error correcting capability is that every 512 bytes can error correction 3, we get the Flash block wiping 5000 times, under the prerequisite not changing ECC error correcting capability, misregistration is corrected by the positional information of misregistration, extend the data reliable memory time, effect signal is as figure, wherein reliable memory time first time is the reliable memory time of traditional scheme data, second with the reliable memory time is that use the present invention accumulates the reliable memory time obtained after superposition upgrades erropr message list for the third time, as seen from the figure, the data reliable memory time can be significantly improved after application the present invention.
The present invention also can have other various embodiments; when not deviating from the present invention's spirit and essence thereof; those skilled in the art are when making various corresponding change and distortion according to the present invention, but these change accordingly and are out of shape the protection domain that all should belong to the claim appended by the present invention.
Claims (3)
1. extend the coding method of NANDFlash data reliable memory time, it is characterized in that, the coding method of a kind of NANDFlash of prolongation data reliable memory time is specifically carried out according to following steps:
Step one, according to data storage time length T
storewith can error correction figure place, obtain and correspondingly continue reliable memory time span T
next, automatically upgrade errors present information table, mark is misregistration positional information also;
Step 2, in data storage procedure, read data each time, iteration performs a step one;
After step 3, execution step 2, by T
storewith limit protection cycle T
limitcompare, if reach capacity protection period T
limit, then step 4 is performed, if do not reach capacity protection period T
limit, then step 5 is performed;
Described, limit protection cycle T
limitfor artificial setting in advance;
The strange land update mechanism of step 4, startup data, utilizes the FTL garbage reclamation mechanism of NANDFlash, data is backed up in strange land, flushing errors positional information table, then perform step 5;
Step 5, reading data;
Step 6, execution ECC error correction;
Step 7, judging distance upgraded errors present information table, time data memory length T last time
currentwhether reach and continue reliable memory time span T
nextif then row step 8, if not, performs step 9; T
currentfor the module preset in storage system, the time that record data store;
Step 8, works as T
currentreach T
nextduring time span, upgrade errors present information table, namely according to ECC characteristic, mark is misregistration positional information also, performs step 2, then performs step 9;
Step 9, acquisition correct data;
Step 10, end.
2. a kind of coding method extending the NANDFlash data reliable memory time according to claim 1, is characterized in that, in described step one according to data storage time length T
storewith can error correction figure place, automatically upgrade errors present information table; Detailed process is:
Step one by one, by read timestamp obtain data storage time length T
store, obtain current wrong figure place by data redundancy district, the 80% calculating acquisition of current wrong figure place press ECC checking feature can error correction figure place;
ECC is writing a Chinese character in simplified form of " ErrorCorrectingCode ", is bug check and correction;
Step one two, by step one by one in data storage time length T
storewith can error correction figure place input error forecast model, obtain and correspondingly continue reliable memory time span T
next, as time data memory length T
currentreach T
nextduring time span, automatically upgrade errors present information table, namely according to ECC characteristic, mark is misregistration positional information also, T
currentfor the module preset in storage system, the time that record data store.
3. a kind of coding method extending the NANDFlash data reliable memory time according to claim 2, is characterized in that, read data in described step 5; Detailed process is:
Step May Day, iteration perform a step one, reading error location information table, and information table is that sky then performs step 5 two, otherwise perform step 5 three;
Step 5 two, establishment errors present information table, perform step 2;
Step 5 three, errors present according to errors present information table record, carry out step-by-step inversion operation to the information of errors present, data are stored as scale-of-two, and namely non-zero namely 1, identify errors present, namely correspondence position negate can be obtained correct data.
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Cited By (5)
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| CN106598484A (en) * | 2016-11-17 | 2017-04-26 | 华为技术有限公司 | Data storage method, flash memory chip and storage device |
| CN107480012A (en) * | 2017-08-28 | 2017-12-15 | 郑州云海信息技术有限公司 | The data reconstruction method and data recovery system of a kind of solid state hard disc |
| CN107832012A (en) * | 2017-11-03 | 2018-03-23 | 重庆大学 | A kind of method that online mining flash memory system journey difference phenomenon optimization refreshes |
| CN111555815A (en) * | 2020-05-19 | 2020-08-18 | 南京王师大数据有限公司 | Time coding method, device and storage medium |
| CN112948166A (en) * | 2019-10-16 | 2021-06-11 | 长江存储科技有限责任公司 | Data processing method and related product |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106598484A (en) * | 2016-11-17 | 2017-04-26 | 华为技术有限公司 | Data storage method, flash memory chip and storage device |
| CN107480012A (en) * | 2017-08-28 | 2017-12-15 | 郑州云海信息技术有限公司 | The data reconstruction method and data recovery system of a kind of solid state hard disc |
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| CN111555815B (en) * | 2020-05-19 | 2022-07-15 | 南京王师大数据有限公司 | Time coding method, device and storage medium |
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