CN105204298B - A kind of recessed quadrangle FPGA hardware fill method for direct-write type lithography machine pattern generator - Google Patents
A kind of recessed quadrangle FPGA hardware fill method for direct-write type lithography machine pattern generator Download PDFInfo
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- CN105204298B CN105204298B CN201510662716.2A CN201510662716A CN105204298B CN 105204298 B CN105204298 B CN 105204298B CN 201510662716 A CN201510662716 A CN 201510662716A CN 105204298 B CN105204298 B CN 105204298B
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Abstract
The present invention relates to a kind of recessed quadrangle FPGA hardware fill method for direct-write type lithography machine pattern generator, solving cannot be directed to the defect that recessed quadrangle is filled operation compared with prior art.The present invention is comprised the following steps：Data prediction, obtains vertex point coordinate information, and coordinate line is carried out for summit, draws the four edges of quadrangle；Data inputting, four side memories are set up for four edges, and the coordinate value information of four edges is stored into corresponding side memory respectively；The determination in region is filled, to four side memories with YminFor initial address synchronizes traversal filling treatment, treatment terminates rear four side memories to Ymin+1Traversal filling treatment is carried out, until it is Y to read addressmax.The present invention directly can be filled to recessed quadrangle.
Description
Technical field
It is specifically a kind of to be used for write-through light the present invention relates to direct-write type lithography machine graphic processing data technical field
Quarter machine pattern generator recessed quadrangle FPGA hardware fill method.
Background technology
Direct-write type lithography machine is the necessary equipment in semiconductor production process, and direct-write type lithography machine equipment utilization figure occurs
Device replaces the mask plate of conventional lithography machine, and the laser for reflecting specific wavelength by DMD reacts with dry film or photoresist will exposure
Figure is transferred directly on PCB or wafer.It is with the difference of conventional exposure machine：First via computer by exposure figure
Readout, is then converted to the figure coordinate point data beneficial to slave computer treatment, and slave computer is conveyed to by transmission medium
FPGA is reduced into binary graphics to be exposed to fill.But due to being limited by computer and slave computer treatment pattern classes,
Treatment currently for pattern classes can only run into recessed quadrangle for triangle (main) and trapezoidal (special convex quadrangle)
Situation when occurring, then need first to be split into several triangles, the combination of multiple triangles is formed, then again to triangle
Shape is processed one by one, and involved figure coordinate point data amount is big, and charging efficiency is relatively low, and then have impact on write-through photoetching
The production capacity of equipment.How realization for recessed quadrangle be directly filled operation have become be badly in need of solve technology ask
Topic.
The content of the invention
The invention aims to solve that the defect that recessed quadrangle is filled operation cannot be directed in the prior art, carry
Solved the above problems for the recessed quadrangle FPGA hardware fill method of direct-write type lithography machine pattern generator for a kind of.
To achieve these goals, technical scheme is as follows：
A kind of recessed quadrangle FPGA hardware fill method for direct-write type lithography machine pattern generator, including following step
Suddenly：
Data prediction, obtains vertex point coordinate information, and coordinate line is carried out for summit, draws the four edges of quadrangle；
Data inputting, four side memories are set up for four edges, and the coordinate value information of four edges is stored to phase respectively
In the side memory answered；
The determination in region is filled, to four side memories with YminFor initial address synchronizes traversal filling treatment, place
Reason terminates rear four side memories to Ymin+1Traversal filling treatment is carried out, until it is Y to read addressmax。
Described data prediction is comprised the following steps：
It is M*N to define frame area size where quadrangle, obtains known four summit A (x1, y1), B (x2, y2), C
(x3,y3)、D(x4,y4)；
Four edges are drawn for four summits A, B, C, D, x, y value in each edge is got；
On the basis of y values, maximum and minimum value to the x values corresponding to same y values in each edge merge record,
It is recorded as Xall=(Xmin, Xmax)；
Calculate the maximum Y of Y-coordinate in four summit A (x1, y1), B (x2, y2), C (x3, y3), D (x4, y4)max、
Minimum value Ymin。
Described data inputting is comprised the following steps：
Four side memories are set up, the size of side memory is：Depth is N, width is 2* (log2M+1), Suo Youwei
Initial value be 0；
By four edges Xall, side coordinate value information in the range of Y-coordinate with Y be write address information, Xall+ 1 believes to write data
Breath is deposited into four side memories respectively.
Described traversal filling treatment is comprised the following steps：
With YminFor initial address reads the value in the memory of side, if the value for reading is 0, then it represents that the side memory correspondence
That side there is no intersection point with current Y value；If the value for reading is for non-zero, then it represents that this while memory it is corresponding that while with current Y
Be present intersection point in value, recorded；
If a certain Y value and four edges all have intersection point, the quadrangle is recessed quadrangle, the X values of this four edges of reading
Obtain this four intersection point Xa、Xb、Xc、Xd；To Xa、Xb、Xc、XdCarry out ascending order arrangement；By XaWith XbBetween and XcWith XdBetween fill out
It is 1 to fill, and remaining is 0, and filling result storage is arrived into Frame Handler；
If a certain Y value and two sides all have intersection point, the X values on this two sides of reading obtain XaAnd Xb, by XaWith XbBetween
1 is filled with, remaining is 0, and Frame Handler is arrived into filling result storage.
Beneficial effect
A kind of recessed quadrangle FPGA hardware fill method for direct-write type lithography machine pattern generator of the invention, it is and existing
Have technology to compare directly can be filled to recessed quadrangle.By combining the programmable features of FPGA, abundant deposited using its
Reservoir and gate resource, the filling of recessed quadrangle is quickly realized with the mode of parallel processing, not only saves data biography
Defeated bandwidth, also improves the production capacity of direct-write type lithography machine.
Brief description of the drawings
Fig. 1 is flow chart of the method for the present invention；
Fig. 2 a- Fig. 2 e are the filling instantiation procedure figure of concave quadrangle of the present invention；
Fig. 3 is the filling exemplary plot of traversal filling process step in the present invention；
Fig. 4 is that the maximum and minimum value of the x values for same y values in data prediction step of the invention are merged
The output timing diagram of record；
Fig. 5 is the hardware model figure of side memory.
Specific embodiment
To make have a better understanding and awareness to architectural feature of the invention and the effect reached, to preferably
Embodiment and accompanying drawing coordinate detailed description, are described as follows：
As shown in figure 1, a kind of recessed quadrangle FPGA for direct-write type lithography machine pattern generator of the present invention is hard
Part fill method, comprises the following steps：
The first step, data prediction.Vertex point coordinate information is obtained, coordinate line is carried out for summit, draw quadrangle
Four edges, i.e., by process of data preprocessing, can export x, y value got on recessed quadrangle in each edge.It is specifically walked
It is rapid as follows：
(1) it is M*N to define frame area size where quadrangle, by known four summit A (x1, y1), B (x2, y2),
C (x3, y3), D (x4, y4), as shown in Figure 2 a, can directly orient four vertex positions of quadrangle.
(2) as shown in Figure 2 b, four edges are drawn for four summits A, B, C, D, so as to get x, the y in each edge
Value.
(3) on the basis of y values, maximum and minimum value to the x values corresponding to same y values in each edge merge note
Record, is recorded as Xall=(Xmin, Xmax).Determine XallPurpose be, when while or while extended line it is small with the angle of X-direction
During in 45 degree or more than 135 degree, side identical Y has multiple different x values.And when the side with such feature is located at institute
At the left side of quadrangle, XminIt is then particularly important, when the side with such feature is located at the right of place quadrangle, XmaxThen
It is particularly important.In litho machine field, the fineness of figure is particularly significant, in order to not lose the edge detail information of figure, then needs
Accurately to record the corresponding all X information of identical Y value.The output timing diagram of the step block is as shown in figure 4, as shown in Figure 2 b
When while or while extended line and X-direction angle less than 45 degree or more than 135 degree when, have multiple not for identical Y
Same x values are (because in order to meet this angle of inclination, the trend of hypotenuse has in multiple X values in pixel compartments in same Y value
Continuously distributed, such as X8、X9And X10), maximum and minimum value are merged and is recorded as Xall=(Xmin, Xmax), by
Datavalid signals indicate effective X of current Y valueallSignal.When while or while extended line and X-direction angle more than etc.
During in 45 degree and less than or equal to 135 degree, same Xall=(Xmin, Xmax), but only because the reason for angle of inclination, now Xmin=
Xmax.The effective marker of all outputs ' 1 ' is defined with datavalid signals as high level.
(4) maximum of Y-coordinate in four summit A (x1, y1), B (x2, y2), C (x3, y3), D (x4, y4) is calculated
Ymax, minimum value Ymin, to carry out traversal filling treatment from top to bottom below.
Second step, data inputting.Four side memories are set up for four edges, the coordinate value information of four edges is deposited respectively
In storage to corresponding side memory, the filling of recessed quadrangle is carried out using FPGA herein, make above-mentioned picture four edges be while entering
Capable, and the information of four edges is stored into the side memory of formed objects respectively, the programmable features of FPGA are recycled, lead to
Cross the content information of judgement storage identical address in the memory of side to recognize recessed quadrangle, and utilize its abundant logical resource
To calculate the region of filling 1 and 0 so that the traversal filling processing procedure for four edges is also synchronously to carry out, and is realized
The filling process of journey such as Fig. 2 a- Fig. 2 e.It is comprised the following steps that：
(1) four side memories are set up, it is the IP kernel of the customizable inside FPGA, entitled Dual Port RAM,
The size of side memory is：Depth is N, width is 2* (log2M+1), the initial value of all is 0, side memory it is hard
Part illustraton of model is as shown in Figure 5.
(2) by four edges Xall, side coordinate value information in Y-coordinate scope (recessed square range) with Y be write address letter
Breath, Xall+ 1 is deposited into four side memories respectively to write data message, and current this edge is stored in each side memory
X values, and be with Y as address information.
3rd step, fills the determination in region.To four side memories with YminFor initial address is synchronized (parallel) time
Filling treatment is gone through, the binary result after filling is stored to size as in the frame memory of M*N, treatment terminates rear simultaneously by four
The reading address of side memory adds 1, i.e., four side memories are to Ymin+1Traversal filling treatment is carried out, until it is Y to read addressmax,
Now complete the filling of this concave polygon.Traversal filling treatment is comprised the following steps：
(1) with YminFor initial address reads the value in the memory of side, if the value for reading is 0, then it represents that the side memory pair
That side answered does not have intersection point with current Y value, i.e., current border area domain is not directed to this coordinate points.If the value for reading is non-zero, then it represents that
This while memory it is corresponding that while there is intersection point with current Y value, recorded, to treat that subsequent analysis are four intersection points or two
Individual intersection point.
(2) if a certain Y value and four edges all have intersection point, the quadrangle is recessed quadrangle, such as the upper horizontal line institute of Fig. 3
Show, a certain Y value and four edges all have intersection point can then there are four intersection point X under same Y valuea、Xb、Xc、Xd.Read respectively
The X values of this four edges, directly obtain this four intersection point X by side coordinate informationa、Xb、Xc、Xd.Due to the characteristic of recessed quadrangle,
In four intersection points, middle intersection point adjacent two-by-two will not produce filling region, will not otherwise form recessed quadrangle.Therefore to Xa、
Xb、Xc、XdCarry out ascending order arrangement；By XaWith XbBetween and XcWith XdBetween be filled with 1, remaining is 0, XbWith XcBetween be not filled with,
Frame Handler is arrived into filling result storage, as shown in Figure 2 c, the filling work of a Y value (transverse direction) is now completed.
(3) if a certain Y value and two sides all have intersection point, as shown in the lower horizontal line of Fig. 3, the X values on this two sides of reading,
X is obtained by side coordinate informationaAnd Xb, by XaWith XbBetween be filled with 1, remaining is 0, and will filling result storage to frame treatment
Device.As shown in Figure 2 d, the filling work of a Y value (transverse direction) is now also completed.
From YminFor initial address starts, add 1 with each Y-axis address and be circulated, that is, carry out Ymin+1、Ymin+2、Ymin+3Deng
Traversal filling treatment, synchronously carried out by four side memories, as shown in Figure 2 e, until YmaxTraversal filling treatment terminate after,
The filling work of whole recessed quadrangle is completed.
General principle of the invention, principal character and advantages of the present invention has been shown and described above.The technology of the industry
Personnel it should be appreciated that the present invention is not limited to the above embodiments, the simply present invention described in above-described embodiment and specification
Principle, various changes and modifications of the present invention are possible without departing from the spirit and scope of the present invention, these change and
Improvement is both fallen within the range of claimed invention.The protection domain of application claims by appending claims and its
Equivalent is defined.
Claims (2)
1. a kind of recessed quadrangle FPGA hardware fill method for direct-write type lithography machine pattern generator, it is characterised in that bag
Include following steps：
11) data prediction, obtains vertex point coordinate information, and coordinate line is carried out for summit, draws the four edges of quadrangle；Institute
The data prediction stated is comprised the following steps：
111) it is M*N to define frame area size where quadrangle, obtains known four summit A (x1, y1), B (x2, y2), C
(x3,y3)、D(x4,y4)；
112) four edges are drawn for four summits A, B, C, D, gets x, y value in each edge；
113) on the basis of y values, maximum and minimum value to the x values corresponding to same y values in each edge merge record,
It is recorded as Xall=(Xmin, Xmax)；
114) the maximum Y of Y-coordinate in four summit A (x1, y1), B (x2, y2), C (x3, y3), D (x4, y4) is calculatedmax、
Minimum value Ymin；
12) data inputting, four side memories are set up for four edges, and the coordinate value information of four edges is stored to corresponding respectively
Side memory in；
13) determination in region is filled, to four side memories with YminFor initial address synchronizes traversal filling treatment, place
Reason terminates rear four side memories to Ymin+1Traversal filling treatment is carried out, until it is Y to read addressmax；Its traversal filling treatment bag
Include following steps：
131) with YminFor initial address reads the value in the memory of side, if the value for reading is 0, then it represents that the side memory correspondence
That side there is no intersection point with current Y value；If the value for reading is for non-zero, then it represents that this while memory it is corresponding that while with current Y
Be present intersection point in value, recorded；
If 132) a certain Y value and four edges all have intersection point, the quadrangle is recessed quadrangle, the X values of this four edges of reading
Obtain this four intersection point Xa、Xb、Xc、Xd；To Xa、Xb、Xc、XdCarry out ascending order arrangement；By XaWith XbBetween and XcWith XdBetween fill out
It is 1 to fill, and remaining is 0, and filling result storage is arrived into Frame Handler；
If 133) a certain Y value and two sides all have intersection point, the X values on this two sides of reading obtain XaAnd Xb, by XaWith XbBetween
1 is filled with, remaining is 0, and Frame Handler is arrived into filling result storage.
2. a kind of recessed quadrangle FPGA hardware filling for direct-write type lithography machine pattern generator according to claim 1
Method, it is characterised in that described data inputting is comprised the following steps：
21) four side memories are set up, the size of side memory is：Depth is N, width is 2* (log2M+1), all
Initial value is 0；
22) by four edges Xall, side coordinate value information in the range of Y-coordinate with Y be write address information, Xall+ 1 is to write data message
Deposit respectively into four side memories.
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| US6693719B1 (en) * | 1998-09-16 | 2004-02-17 | Texas Instruments Incorporated | Path to trapezoid decomposition of polygons for printing files in a page description language |
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