CN105181197A - Eddy current dynamometer system based on logic amplification circuit - Google Patents
Eddy current dynamometer system based on logic amplification circuit Download PDFInfo
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- CN105181197A CN105181197A CN201510250930.7A CN201510250930A CN105181197A CN 105181197 A CN105181197 A CN 105181197A CN 201510250930 A CN201510250930 A CN 201510250930A CN 105181197 A CN105181197 A CN 105181197A
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Abstract
The invention discloses an eddy current dynamometer system based on a logic amplification circuit. The system is composed of a single-chip microcomputer (4), a motor control module (5), a display (6), an operation module (7), a motor (1) to be metered, an eddy current dynamometer (2) and a signal processing module (3), wherein the motor control module (5), the display (6) and the operation module (7) are connected with the single-chip microcomputer (4), the motor (1) to be metered is connected with the motor control module (5), the eddy current dynamometer (2) is connected with the motor (1) to be metered, and the signal processing module is connected with the eddy current dynamometer (2). The system is characterized in that the logic amplification circuit is arranged between the signal processing module (3) and the single-chip microcomputer (4). Torque signals output by the eddy current dynamometer can be amplified due to effect of the logic amplification circuit, so that the output power of the motor to be metered can be metered accurately.
Description
Technical field
The present invention relates to a kind of eddy current dynamometric system, specifically refer to a kind of eddy current dynamometric system of logic-based amplifying circuit.
Background technology
Electric eddy current dynamometer is the loading measurement of power equipment of current domestic advanced person, especially load in dynamometer test at the power machine of middle low power and micropower, the low speed of each power machine and High speed load dynamometer test aspect, relatively other type measurement of power loading equipemtn, in performance, price, reliability, safeguards there is obvious advantage in complexity etc.Especially in the loading measurement of power of low-speed machinery and micropower machinery, then other method is unrivaled especially.Therefore, replaced powder clutch, hydraulic dynamometer, DC generation unit etc. at a lot of occasion electric eddy current dynamometer, be used for measuring the performance of the power machines such as various motor, gasoline engine, diesel engine, gear case, become the necessaries of type approval test.But the torque signal that current used eddy current dynamometric system is sometimes collected is more weak, have impact on the test of power-measuring system to output power of motor to a great extent.
Summary of the invention
The object of the invention is to overcome traditional eddy current dynamometric system there will be and collect more weak torque signal, power of motor is tested to the defect impacted, a kind of eddy current dynamometric system of logic-based amplifying circuit is provided.
Object of the present invention is achieved through the following technical solutions: a kind of eddy current dynamometric system of logic-based amplifying circuit, by single-chip microcomputer, the motor control module be connected with single-chip microcomputer, display, operational module, what be connected with motor control module treats measured motor, with treat the electric eddy current dynamometer that measured motor is connected, and the signal processing module to be connected with electric eddy current dynamometer, between signal processing module and single-chip microcomputer, be also provided with logic amplifying circuit.
Further, described logic amplifying circuit is by amplifier P1, amplifier P2, triode VT5, negative pole is connected with the collector of triode VT5, positive pole is then in turn through polar capacitor C9 that resistance R11 is connected with the negative pole of amplifier P2 after resistance R14 and resistance R15, negative pole is connected with the tie point of resistance R15 with resistance R14, positive pole is then in turn through polar capacitor C8 that resistance R13 is connected with the positive pole of polar capacitor C9 after resistance R12, N pole is connected with the tie point of resistance R14 with resistance R11, the diode D5 that P pole is then connected with the negative pole of polar capacitor C8, P pole is connected with the output terminal of amplifier P1, the diode D7 that N pole is then connected with the base stage of triode VT5, and P pole is connected with the output terminal of amplifier P2, the diode D6 that N pole is then connected with the emitter of triode VT5 after resistance R16 forms, the positive pole of described amplifier P1 is connected with the N pole of diode D5, its negative pole is then connected with the tie point of resistance R13 with resistance R12, the positive pole of described amplifier P2 is connected with the positive pole of polar capacitor C8, its negative pole is then connected with the N pole of diode D5, the N pole of described diode D5 together with its P pole as the input end of this logic amplifying circuit 8, and the N pole of diode D6 together with the positive pole of polar capacitor C9 as the output terminal of this logic amplifying circuit 8.
Described signal processing module is by signal processing circuit, the Sheffer stroke gate control circuit be connected with signal processing circuit, the bistable trigger-action circuit be connected with Sheffer stroke gate control circuit, and form with the rear end transformation output circuit that bistable trigger-action circuit is connected with Sheffer stroke gate control circuit simultaneously.
Described signal processing circuit is by process chip U, the resistance R1 that one end is connected with-SIG the pin of process chip U, the other end is then connected with the BIAS pin of process chip U after resistance R3, one end is connected with-CAR the pin of process chip U, the resistance R2 of other end ground connection, and the resistance R4 that one end is connected with the GMIN pin of process chip U, the other end is then connected with the ADJ pin of process chip U after potentiometer R5 forms;-V the pin of described process chip U is respectively with the tie point of resistance R1 and resistance R3 and bistable trigger-action circuit is connected, its-OUT pin is all connected with Sheffer stroke gate control circuit with+OUT pin; + SIG the pin of described process chip U together with its-V pin as the input end of this signal processing circuit.
Described Sheffer stroke gate control circuit is by Sheffer stroke gate A1, Sheffer stroke gate A2, positive pole is connected with the output terminal of Sheffer stroke gate A1 after polar capacitor C4 through resistance R6 in turn, the polar capacitor C1 of its minus earth, N pole is connected with the tie point of polar capacitor C4 with resistance R6, the diode D1 of P pole ground connection, positive pole is connected with the N pole of diode D1 after resistance R7, the polar capacitor C2 of minus earth, one end is connected with-OUT the pin of process chip U, the resistance R8 that the other end is then connected with the positive pole of Sheffer stroke gate A1, one end is connected with+OUT the pin of process chip U, the resistance R9 that the other end is then connected with the negative pole of Sheffer stroke gate A1, negative pole is connected with the output terminal of Sheffer stroke gate A1, the polar capacitor C5 that positive pole is then connected with the negative pole of Sheffer stroke gate A2, be serially connected in the resistance R10 between the positive pole of Sheffer stroke gate A2 and output terminal, and form with the polar capacitor C7 that resistance R10 is in parallel,-OUT the pin of described process chip U is connected with the positive pole of polar capacitor C1, its+OUT pin is then connected with the positive pole of polar capacitor C2, the negative pole of described Sheffer stroke gate A1 is all connected with bistable trigger-action circuit with its output terminal, the negative pole of described Sheffer stroke gate A2 is connected with bistable trigger-action circuit, its output terminal is then connected with bistable trigger-action circuit and rear end transformation output circuit respectively.
Described bistable trigger-action circuit is by triode VT1, triode VT2, the polar capacitor C3 that positive pole is connected with the collector of triode VT1, negative pole is then connected with the base stage of triode VT2, the polar capacitor C6 that positive pole is connected with the base stage of triode VT1, negative pole is then connected with the emitter of triode VT2, and the diode D2 that N pole is connected with the collector of triode VT2, P pole is then connected with the emitter of triode VT1 forms; The described collector of triode VT1 is connected with the negative pole of Sheffer stroke gate A1, its emitter is then connected with-V the pin of process chip U, base stage is then connected with the negative pole of Sheffer stroke gate A2; The described base stage of triode VT2 is connected with the output terminal of Sheffer stroke gate A1, its emitter is then connected with the output terminal of Sheffer stroke gate A2, collector is then connected with rear end transformation output circuit.
Described rear end transformation output circuit is by transformer T, and triode VT3, triode VT4, be arranged on telefault L1 and the telefault L2 on limit, transformer T source, be arranged on the telefault L3 of transformer T secondary, diode D3, and diode D4 forms; The N pole of described diode D3 is connected with the tap of telefault L1, P pole is then connected with the output terminal of Sheffer stroke gate A2, the P pole of diode D4 is connected with the non-same polarity of telefault L3, its N pole then together with the Same Name of Ends of telefault L3 as the output terminal of this rear end transformation output circuit; The described Same Name of Ends of telefault L1 is connected with the output terminal of Sheffer stroke gate A2, its non-same polarity is then connected with the base stage of triode VT4; The Same Name of Ends of described telefault L2 is connected with the collector of triode VT4, non-same polarity is then connected with the collector of triode VT3, its tap is then connected with the Same Name of Ends of telefault L1; The emitter of described triode VT3 is connected with the emitter of triode VT4, its base stage is then connected with the output terminal of Sheffer stroke gate A2 and the collector of triode VT2 respectively.
In order to reach better implementation result, described process chip U is preferably LM146 integrated circuit to realize.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) structure of the present invention is simple, and easy to operate, system cost is cheap.
(2) the present invention more saves energy consumption while guaranteeing measuring accuracy, reduces the cost in electromechanical testing process.
(3) the present invention is by the effect of logic amplifying circuit, can amplify the torque signal that electric eddy current dynamometer exports, to guarantee that the present invention detects the accuracy of output power of motor to be measured.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention;
Fig. 2 is signal processing module electrical block diagram of the present invention;
Fig. 3 is logic amplification circuit structure schematic diagram of the present invention.
Reference numeral name in above accompanying drawing is called:
1-treat measured motor, 2-electric eddy current dynamometer, 3-signal processing module, 4-single-chip microcomputer, 5-motor control module, 6-display, 7-operational module, 8-logic amplifying circuit, 31-signal processing circuit, 32-Sheffer stroke gate control circuit, 33-bistable trigger-action circuit, 34-rear end transformation output circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, the present invention is by single-chip microcomputer 4, the motor control module 5 be connected with single-chip microcomputer 4, display 6, operational module 7, what be connected with motor control module 5 treats measured motor 1, with the electric eddy current dynamometer 2 treating that measured motor 1 is connected, the signal processing module 3 be connected with electric eddy current dynamometer 2, in order to reach object of the present invention, the present invention is also provided with logic amplifying circuit 8 between signal processing module 3 and single-chip microcomputer 4.
Wherein, single-chip microcomputer 4 is as control center of the present invention.Electric eddy current dynamometer 2 is for detecting the torque signal for the treatment of measured motor and exporting.Signal processing module 3 processes for the torque signal exported electric eddy current dynamometer 2.Logic amplifying circuit 8 can carry out amplification process to torque signal.Single-chip microcomputer 4 can calculate by torque signal the realtime power treating measured motor 1, and is shown intuitively by display 6.Motor control module 5 controls for treating measured motor 1, and staff then can set by operational module 7 output power treating measured motor 1.
During work, start and treat measured motor 1, operator sets the output power treating measured motor 1 on operational module 7, and at this moment single-chip microcomputer 4 sends instruction to motor control module 5, makes it treat measured motor 1 according to the power set by operator and controls.The torque signal of measured motor 1 is treated in electric eddy current dynamometer 2 detections, this torque signal flows to single-chip microcomputer 4 after the process of signal processing module 3 and logic amplifying circuit 8, and single-chip microcomputer 4 is calculated according to torque signal the realtime power for the treatment of measured motor 1 and shown by display 6.Operator can treating compared with the performance number that the realtime power of measured motor 1 and its are arranged in operational module 7, to judge the performance treating measured motor 1 thus.
In order to reach better effect, the DWD system electric eddy current dynamometer that this electric eddy current dynamometer 2 preferentially adopts Sichuan Cheng Bang observation and control technology company limited to produce realizes, and the electric eddy current dynamometer structure of this series is simple, convenient operating maintenance, braking moment is large, and measuring accuracy is high.And single-chip microcomputer 4, motor control module 5, operational module 7 and display 6 all adopt existing technology to realize.
As shown in Figure 2, signal processing module 3 is by signal processing circuit 31, the Sheffer stroke gate control circuit 32 be connected with signal processing circuit 31, the bistable trigger-action circuit 33 be connected with Sheffer stroke gate control circuit 32, and form with the rear end transformation output circuit 34 that bistable trigger-action circuit 33 is connected with Sheffer stroke gate control circuit 32 simultaneously.
Signal processing circuit 31 is wherein by process chip U, the resistance R1 that one end is connected with-SIG the pin of process chip U, the other end is then connected with the BIAS pin of process chip U after resistance R3, one end is connected with-CAR the pin of process chip U, the resistance R2 of other end ground connection, and the resistance R4 that one end is connected with the GMIN pin of process chip U, the other end is then connected with the ADJ pin of process chip U after potentiometer R5 forms.-V the pin of described process chip U is respectively with the tie point of resistance R1 and resistance R3 and bistable trigger-action circuit 33 is connected, its-OUT pin is all connected with Sheffer stroke gate control circuit 32 with+OUT pin.+ SIG the pin of described process chip U together with its-V pin as the input end of this signal processing circuit 31.In order to better implement the present invention, described process chip U preferentially adopts LM1496 integrated circuit to realize.
Described Sheffer stroke gate control circuit 32 is by Sheffer stroke gate A1, Sheffer stroke gate A2, positive pole is connected with the output terminal of Sheffer stroke gate A1 after polar capacitor C4 through resistance R6 in turn, the polar capacitor C1 of its minus earth, N pole is connected with the tie point of polar capacitor C4 with resistance R6, the diode D1 of P pole ground connection, positive pole is connected with the N pole of diode D1 after resistance R7, the polar capacitor C2 of minus earth, one end is connected with-OUT the pin of process chip U, the resistance R8 that the other end is then connected with the positive pole of Sheffer stroke gate A1, one end is connected with+OUT the pin of process chip U, the resistance R9 that the other end is then connected with the negative pole of Sheffer stroke gate A1, negative pole is connected with the output terminal of Sheffer stroke gate A1, the polar capacitor C5 that positive pole is then connected with the negative pole of Sheffer stroke gate A2, be serially connected in the resistance R10 between the positive pole of Sheffer stroke gate A2 and output terminal, and form with the polar capacitor C7 that resistance R10 is in parallel.-OUT the pin of described process chip U is connected with the positive pole of polar capacitor C1, its+OUT pin is then connected with the positive pole of polar capacitor C2; The negative pole of described Sheffer stroke gate A1 is all connected with bistable trigger-action circuit 33 with its output terminal.The negative pole of described Sheffer stroke gate A2 is connected with bistable trigger-action circuit 33, its output terminal is then connected with bistable trigger-action circuit 33 and rear end transformation output circuit 34 respectively.
Described bistable trigger-action circuit 33 is by triode VT1, triode VT2, the polar capacitor C3 that positive pole is connected with the collector of triode VT1, negative pole is then connected with the base stage of triode VT2, the polar capacitor C6 that positive pole is connected with the base stage of triode VT1, negative pole is then connected with the emitter of triode VT2, and the diode D2 that N pole is connected with the collector of triode VT2, P pole is then connected with the emitter of triode VT1 forms.The described collector of triode VT1 is connected with the negative pole of Sheffer stroke gate A1, its emitter is then connected with-V the pin of process chip U, base stage is then connected with the negative pole of Sheffer stroke gate A2.The described base stage of triode VT2 is connected with the output terminal of Sheffer stroke gate A1, its emitter is then connected with the output terminal of Sheffer stroke gate A2, collector is then connected with rear end transformation output circuit 34.
Described rear end transformation output circuit 34 is by transformer T, and triode VT3, triode VT4, be arranged on telefault L1 and the telefault L2 on limit, transformer T source, be arranged on the telefault L3 of transformer T secondary, diode D3, and diode D4 forms.During connection, the N pole of described diode D3 is connected with the tap of telefault L1, P pole is then connected with the output terminal of Sheffer stroke gate A2, the P pole of diode D4 is connected with the non-same polarity of telefault L3, its N pole then together with the Same Name of Ends of telefault L3 as the output terminal of this rear end transformation output circuit 34; The described Same Name of Ends of telefault L1 is connected with the output terminal of Sheffer stroke gate A2, its non-same polarity is then connected with the base stage of triode VT4; The Same Name of Ends of described telefault L2 is connected with the collector of triode VT4, non-same polarity is then connected with the collector of triode VT3, its tap is then connected with the Same Name of Ends of telefault L1; The emitter of described triode VT3 is connected with the emitter of triode VT4, its base stage is then connected with the output terminal of Sheffer stroke gate A2 and the collector of triode VT2 respectively.
Logic amplifying circuit 8 is emphasis of the present invention, and as shown in Figure 3, it is by amplifier P1, amplifier P2, triode VT5, resistance R11, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, polar capacitor C8, polar capacitor C9, diode D5, diode D6, diode D7 form, during connection, the negative pole of polar capacitor C9 is connected with the collector of triode VT5, its positive pole is then connected with the negative pole of amplifier P2 after resistance R14 and resistance R15 through resistance R11 in turn, the negative pole of polar capacitor C8 is connected with the tie point of resistance R15 with resistance R14, its positive pole is then connected with the positive pole of polar capacitor C9 after resistance R12 through resistance R13 in turn, the N pole of diode D5 is connected with the tie point of resistance R14 with resistance R11, P pole is then connected with the negative pole of polar capacitor C8, the P pole of diode D7 is connected with the output terminal of amplifier P1, its N pole is then connected with the base stage of triode VT5, the P pole of diode D6 is connected with the output terminal of amplifier P2, its N pole is then connected with the emitter of triode VT5 after resistance R16.The positive pole of described amplifier P1 is connected with the N pole of diode D5, its negative pole is then connected with the tie point of resistance R13 with resistance R12.The positive pole of described amplifier P2 is connected with the positive pole of polar capacitor C8, its negative pole is then connected with the N pole of diode D5.The N pole of described diode D5 together with its P pole as the input end of this logic amplifying circuit 8, and the N pole of diode D6 together with the positive pole of polar capacitor C9 as the output terminal of this logic amplifying circuit 8.
As mentioned above, just well the present invention can be realized.
Claims (7)
1. the eddy current dynamometric system of a logic-based amplifying circuit, by single-chip microcomputer (4), the motor control module (5) be connected with single-chip microcomputer (4), display (6), operational module (7), what be connected with motor control module (5) treats measured motor (1), with the electric eddy current dynamometer (2) treating that measured motor (1) is connected, and the signal processing module (3) to be connected with electric eddy current dynamometer (2) forms, and it is characterized in that: be also provided with logic amplifying circuit (8) between signal processing module (3) and single-chip microcomputer (4), described logic amplifying circuit (8) is by amplifier P1, amplifier P2, triode VT5, negative pole is connected with the collector of triode VT5, positive pole is then in turn through polar capacitor C9 that resistance R11 is connected with the negative pole of amplifier P2 after resistance R14 and resistance R15, negative pole is connected with the tie point of resistance R15 with resistance R14, positive pole is then in turn through polar capacitor C8 that resistance R13 is connected with the positive pole of polar capacitor C9 after resistance R12, N pole is connected with the tie point of resistance R14 with resistance R11, the diode D5 that P pole is then connected with the negative pole of polar capacitor C8, P pole is connected with the output terminal of amplifier P1, the diode D7 that N pole is then connected with the base stage of triode VT5, and P pole is connected with the output terminal of amplifier P2, the diode D6 that N pole is then connected with the emitter of triode VT5 after resistance R16 forms, the positive pole of described amplifier P1 is connected with the N pole of diode D5, its negative pole is then connected with the tie point of resistance R13 with resistance R12, the positive pole of described amplifier P2 is connected with the positive pole of polar capacitor C8, its negative pole is then connected with the N pole of diode D5, the N pole of described diode D5 together with its P pole as the input end of this logic amplifying circuit (8), and the N pole of diode D6 together with the positive pole of polar capacitor C9 as the output terminal of this logic amplifying circuit (8).
2. the eddy current dynamometric system of a kind of logic-based amplifying circuit according to claim 1, it is characterized in that: described signal processing module (3) is by signal processing circuit (31), the Sheffer stroke gate control circuit (32) be connected with signal processing circuit (31), the bistable trigger-action circuit (33) be connected with Sheffer stroke gate control circuit (32), and form with rear end transformation output circuit (34) that bistable trigger-action circuit (33) is connected with Sheffer stroke gate control circuit (32) simultaneously.
3. the eddy current dynamometric system of a kind of logic-based amplifying circuit according to claim 2, it is characterized in that: described signal processing circuit (31) is by process chip U, the resistance R1 that one end is connected with-SIG the pin of process chip U, the other end is then connected with the BIAS pin of process chip U after resistance R3, one end is connected with-CAR the pin of process chip U, the resistance R2 of other end ground connection, and the resistance R4 that one end is connected with the GMIN pin of process chip U, the other end is then connected with the ADJ pin of process chip U after potentiometer R5 forms;-V the pin of described process chip U is respectively with the tie point of resistance R1 and resistance R3 and bistable trigger-action circuit (33) is connected, its-OUT pin is all connected with Sheffer stroke gate control circuit (32) with+OUT pin; + SIG the pin of described process chip U together with its-V pin as the input end of this signal processing circuit (31).
4. the eddy current dynamometric system of a kind of logic-based amplifying circuit according to claim 3, it is characterized in that: described Sheffer stroke gate control circuit (32) is by Sheffer stroke gate A1, Sheffer stroke gate A2, positive pole is connected with the output terminal of Sheffer stroke gate A1 after polar capacitor C4 through resistance R6 in turn, the polar capacitor C1 of its minus earth, N pole is connected with the tie point of polar capacitor C4 with resistance R6, the diode D1 of P pole ground connection, positive pole is connected with the N pole of diode D1 after resistance R7, the polar capacitor C2 of minus earth, one end is connected with-OUT the pin of process chip U, the resistance R8 that the other end is then connected with the positive pole of Sheffer stroke gate A1, one end is connected with+OUT the pin of process chip U, the resistance R9 that the other end is then connected with the negative pole of Sheffer stroke gate A1, negative pole is connected with the output terminal of Sheffer stroke gate A1, the polar capacitor C5 that positive pole is then connected with the negative pole of Sheffer stroke gate A2, be serially connected in the resistance R10 between the positive pole of Sheffer stroke gate A2 and output terminal, and form with the polar capacitor C7 that resistance R10 is in parallel,-OUT the pin of described process chip U is connected with the positive pole of polar capacitor C1, its+OUT pin is then connected with the positive pole of polar capacitor C2, the negative pole of described Sheffer stroke gate A1 is all connected with bistable trigger-action circuit (33) with its output terminal, the negative pole of described Sheffer stroke gate A2 is connected with bistable trigger-action circuit (33), its output terminal is then connected with bistable trigger-action circuit (33) and rear end transformation output circuit (34) respectively.
5. the eddy current dynamometric system of a kind of logic-based amplifying circuit according to claim 4, it is characterized in that: described bistable trigger-action circuit (33) is by triode VT1, triode VT2, the polar capacitor C3 that positive pole is connected with the collector of triode VT1, negative pole is then connected with the base stage of triode VT2, the polar capacitor C6 that positive pole is connected with the base stage of triode VT1, negative pole is then connected with the emitter of triode VT2, and the diode D2 that N pole is connected with the collector of triode VT2, P pole is then connected with the emitter of triode VT1 forms; The described collector of triode VT1 is connected with the negative pole of Sheffer stroke gate A1, its emitter is then connected with-V the pin of process chip U, base stage is then connected with the negative pole of Sheffer stroke gate A2; The described base stage of triode VT2 is connected with the output terminal of Sheffer stroke gate A1, its emitter is then connected with the output terminal of Sheffer stroke gate A2, collector is then connected with rear end transformation output circuit (34).
6. the eddy current dynamometric system of a kind of logic-based amplifying circuit according to claim 5, it is characterized in that: described rear end transformation output circuit (34) is by transformer T, triode VT3, triode VT4, be arranged on telefault L1 and the telefault L2 on limit, transformer T source, be arranged on the telefault L3 of transformer T secondary, diode D3, and diode D4 forms; The N pole of described diode D3 is connected with the tap of telefault L1, P pole is then connected with the output terminal of Sheffer stroke gate A2, the P pole of diode D4 is connected with the non-same polarity of telefault L3, its N pole then together with the Same Name of Ends of telefault L3 as the output terminal of this rear end transformation output circuit (34); The described Same Name of Ends of telefault L1 is connected with the output terminal of Sheffer stroke gate A2, its non-same polarity is then connected with the base stage of triode VT4; The Same Name of Ends of described telefault L2 is connected with the collector of triode VT4, non-same polarity is then connected with the collector of triode VT3, its tap is then connected with the Same Name of Ends of telefault L1; The emitter of described triode VT3 is connected with the emitter of triode VT4, its base stage is then connected with the output terminal of Sheffer stroke gate A2 and the collector of triode VT2 respectively.
7. the eddy current dynamometric system of a kind of logic-based amplifying circuit according to claim 6, is characterized in that: described process chip U is LM146 integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510250930.7A CN105181197A (en) | 2015-05-17 | 2015-05-17 | Eddy current dynamometer system based on logic amplification circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510250930.7A CN105181197A (en) | 2015-05-17 | 2015-05-17 | Eddy current dynamometer system based on logic amplification circuit |
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| CN105181197A true CN105181197A (en) | 2015-12-23 |
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| US20140001989A1 (en) * | 2007-04-27 | 2014-01-02 | Kaltenbach & Voigt Gmbh | Method for Operating an Electric Motor |
| CN201233517Y (en) * | 2008-03-04 | 2009-05-06 | 凯迈(洛阳)机电有限公司 | Digital monitoring and controlling system for electric vortex power measuring machine |
| CN201984109U (en) * | 2011-02-14 | 2011-09-21 | 天津市松正电动汽车技术股份有限公司 | Eddy current dynamometric system |
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Application publication date: 20151223 |
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