CN105161066A - GOA driving circuit and driving method thereof - Google Patents
GOA driving circuit and driving method thereof Download PDFInfo
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- CN105161066A CN105161066A CN201510652416.6A CN201510652416A CN105161066A CN 105161066 A CN105161066 A CN 105161066A CN 201510652416 A CN201510652416 A CN 201510652416A CN 105161066 A CN105161066 A CN 105161066A
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Abstract
The invention discloses a GOA driving circuit and a driving method thereof. The GOA driving circuit comprises a plurality of gate lines; a plurality of GOA units arranged on the gate lines, wherein each gate line is symmetrically provided with a first GOA unit and a second GOA unit, the first GOA unit and the second GOA unit respectively comprises a signal input end, a signal output end and a reset end, input ends of the first GOA unit and the second GOA unit on the first row of gate line are respectively connected with a first signal trigger unit and a second signal trigger unit, and trigger signals of the first signal trigger unit and the second signal trigger unit are spaced by the pulse time for 2n+1-row gate scanning; and clock units connected with the first GOA units and the second GOA units. According to the invention, the symmetrical GOA driving circuits are arranged, the pulse time is delayed by the time for 2n+1-row gate scanning through the trigger signals, the gate line on the same row is opened twice, and the interval is the time for 2n+1-row gate scanning, so that a charge sharing function is realized, and the charging rate of a panel is improved.
Description
Technical field
The present invention relates to array base palte row cutting technical field, particularly relate to a kind of GOA driving circuit and driving method thereof.
Background technology
GOA technology is a kind of technology be integrated in by LCD gate driving circuit (GateDriverIC) on array (Array) substrate, have the following advantages: gate driver circuit is integrated on array base palte by (1), can effectively reduce production cost and power consumption; (2) economize (bonding) yield technique that unbinds, product yield and production capacity can be made to get a promotion; (3) save gate driver circuit binding (gateICbonding) region, make display panel (panel) have symmetrical structure, the narrow frame of display panel can be realized.
As shown in Figure 1, for four TFT transistors (TFT1 ~ TFT4) and an electric capacity (Cb), GOA unit drive principle is described, wherein CLK is clock signal, Vss is electronegative potential input point, output [n-1], output [n] and output [n+1] is respectively the (n-1)th row, the gate line drive output signal of n-th line and the (n+1)th row, first output [n-1] first exports a high voltage pulse signal, by TFT4, electric capacity Cb is charged, TFT1 grid is made to be in noble potential, then output [n] is with the noble potential pulse of CLK synchronism output, the n-th line pixel switch of liquid crystal panel is in open mode, TFT2 and TFT3 opens by the noble potential pulse that output [n+1] exports afterwards, Cb and output [n] is dragged down by Vss, after TFT1 closes, output [n] keeps Vss electronegative potential.
Traditional monolateral GOA driving circuit as shown in Figure 2, corresponding 1 the GOA driver element of every a line gate line, the corresponding clock signal of each GOA unit, input end, an output terminal and a reset terminal, wherein input end is lastrow output signal, reset terminal is next line output signal, and the input signal of the first row is trigger pip STV.But for the monolateral GOA driving circuit in Fig. 2, the sequential chart of this GOA driving circuit is joined shown in Fig. 3, CLKA and CLKB is respectively the signal all the time of GOA unit on adjacent gate polar curve, STV is trigger pip, for a reversion drive pattern, if employing precharge, then need interlacing electric charge to share, it controls more complicated.
Therefore, for above-mentioned technical matters, be necessary to provide a kind of GOA driving circuit and driving method thereof.
Summary of the invention
For overcoming the deficiencies in the prior art, the object of the present invention is to provide a kind of GOA driving circuit and the driving method thereof of sharing gated sweep every 3 row (5 row, 7 row etc.) electric charge.
To achieve these goals, the technical scheme that provides of the embodiment of the present invention is as follows:
A kind of GOA driving circuit, described GOA driving circuit comprises:
Some gate lines;
Some GOA unit be positioned on gate line, every bar gate line is arranged with the first GOA unit and the second GOA unit, first GOA unit and the second GOA unit comprise signal input part respectively, signal output part and reset terminal, on the first row gate line, the first GOA unit is connected with secondary signal trigger element with the first signal trigger element respectively with the input end of the second GOA unit, the trigger pip of described first signal trigger element and secondary signal trigger element is pulse signal, and the burst length of the capable gated sweep of trigger signal interval 2n+1 of the first signal trigger element and secondary signal trigger element, wherein, n >=1,
And the clock unit to be connected with the second GOA unit with the first GOA unit.
As a further improvement on the present invention, in described first GOA unit and the second GOA unit:
On remaining row gate line except the first row, the first GOA unit is connected with the signal output part of the second GOA unit with the first GOA unit on lastrow respectively with the signal input part of the second GOA unit;
All first GOA unit are connected be expert at gate line respectively with the signal output part of the second GOA unit;
All first GOA unit are connected with the signal output part of the second GOA unit with the first GOA unit on next line respectively with the signal reset terminal of the second GOA unit.
As a further improvement on the present invention, in the burst length of the trigger pip 3 row gated sweep of the delayed first signal trigger element of trigger pip of described secondary signal trigger element, pixel polarity is driven to carry out precharge to be realized reversion by secondary signal trigger element.
As a further improvement on the present invention, described clock unit comprises the first clock unit and second clock unit that are connected with GOA unit, and wherein, the GOA unit on adjacent lines gate line is connected with second clock unit with the first clock unit respectively.
Correspondingly, a kind of driving method of GOA driving circuit, described driving method comprises:
S1, clock unit send clock signal to the first GOA unit and the second GOA unit;
S2, the first signal trigger element send the first trigger pip to the first GOA unit on gate line, carry out turntable driving successively to gate line;
S3, secondary signal trigger element send the second trigger pip after the first signal trigger element sends the burst length of the capable gated sweep of the first trigger signal interval 2n+1, realize reversion and drive pixel polarity to carry out precharge, wherein, and n >=1.
As a further improvement on the present invention, described step S2 also comprises:
On current line gate line, the output signal of the first GOA unit output terminal inputs to the input end of the first GOA unit on next line gate line, as the input signal of next line;
On current line gate line, the output signal of the first GOA unit output terminal inputs to the reset terminal of the first GOA unit on lastrow gate line, as the reset signal of lastrow.
As a further improvement on the present invention, described step S3 also comprises:
On current line gate line, the output signal of the second GOA unit output terminal inputs to the input end of the second GOA unit on next line gate line, as the input signal of next line;
On current line gate line, the output signal of the second GOA unit output terminal inputs to the reset terminal of the second GOA unit on lastrow gate line, as the reset signal of lastrow.
As a further improvement on the present invention, in described step S3, secondary signal trigger element sends the second trigger pip after the first signal trigger element sends the burst length of the capable gated sweep of the first trigger signal interval 2n+1, realizes reversion and drives pixel polarity to carry out precharge.
The present invention, by arranging symmetrical GOA driving circuit, is postponed the burst length of 2n+1 line scanning, realizes same a line gate line and be opened twice, be spaced apart 2n+1 horizontal-scanning interval, thus realize electric charge sharing functionality, improve the charge rate of panel by trigger pip.
Accompanying drawing explanation
Fig. 1 is the drive principle figure of GOA unit in prior art.
Fig. 2 is the circuit diagram of GOA driving circuit in prior art.
Fig. 3 is the sequential chart of GOA driving circuit in Fig. 2.
Fig. 4 is the pixel electrode schematic diagram of display panel.
Fig. 5 is the circuit diagram of embodiment of the invention GOA driving circuit.
Fig. 6 is the sequential chart of embodiment of the invention GOA driving circuit.
Fig. 7 is the schematic diagram that in the embodiment of the invention, reversion drives pixel polarity.
Embodiment
Technical scheme in the present invention is understood better in order to make those skilled in the art person, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, should belong to the scope of protection of the invention.
Shown in ginseng Fig. 4, display panel generally includes some horizontally disposed gate lines (gateline) and some vertically disposed data lines (dataline).
Shown in ginseng Fig. 5, disclose the symmetrically arranged GOA driving circuit in a kind of both sides in the embodiment of the invention, for driving the display panel in Fig. 3, it specifically comprises:
Some gate lines G 1, G2, G3, G4
Some GOA unit be positioned on gate line, every bar gate line is arranged with the first GOA unit 11 and the second GOA unit 12, first GOA unit 11 comprise signal input part 111, signal output part 112 and reset terminal 113, second GOA unit 12 comprise signal input part 121, signal output part 122 and reset terminal 123.
In first GOA unit of present embodiment and the second GOA unit:
Remaining row gate line (G2, G3, G4 except the first row ...) upper first GOA unit 11 is connected with the signal output part of the second GOA unit 12 with the first GOA unit 11 on lastrow respectively with the signal input part of the second GOA unit 12;
All gate line (G1, G2, G3, G4 ...) on the first GOA unit 11 be connected be expert at gate line respectively with the signal output part of the second GOA unit 12;
All gate line (G1, G2, G3, G4 ...) on the first GOA unit 11 be connected with the signal output part of the second GOA unit with the first GOA unit on next line respectively with the signal reset terminal of the second GOA unit 12.
In the first row gate lines G 1, the first GOA unit 11 is connected with secondary signal trigger element 22 with the first signal trigger element 21 respectively with the input end 111,121 of the second GOA unit 12.Wherein, the trigger pip STV1 of the first signal trigger element 21 and secondary signal trigger element 22 and STV2 is pulse signal, and the burst length of the trigger pip STV1 of the first signal trigger element 21 and secondary signal trigger element 22 and the capable gated sweep of STV2 interval 2n+1, wherein, n >=1;
The clock unit that first GOA unit is connected with the second GOA unit, clock unit comprises the first clock unit 31 and second clock unit 32 that are connected with GOA unit, wherein, the GOA unit on adjacent lines gate line is connected with second clock unit 32 with the first clock unit 31 respectively.
In conjunction with the sequential chart that Figure 6 shows that GOA driving circuit in present embodiment, wherein, CLK is the clock signal of the first clock unit 31 and second clock unit 32, STV1 and STV2 is respectively the trigger pip that the first signal trigger element 21 and secondary signal trigger element 22 send, the burst length of the first trigger signal interval 3 row gated sweep of the delayed first signal trigger element of the second trigger pip of secondary signal trigger element, so can realize reversion by secondary signal trigger element drives pixel polarity to carry out precharge, be illustrated in figure 7 the schematic diagram of the n-th frame and the (n+1)th frame reversion driving pixel polarity.
Should be understood that, in above-mentioned embodiment, the first trigger pip and the second trigger signal interval are the sweep time of 3 row gate lines, also this interval can be set to the sweep time of the gate line such as 5 row, 7 row in other embodiments.
Correspondingly, a kind of driving method of GOA driving circuit, described driving method comprises:
S1, clock unit send clock signal to the first GOA unit and the second GOA unit;
S2, the first signal trigger element send the first trigger pip to the first GOA unit on gate line, carry out turntable driving successively to gate line;
S3, secondary signal trigger element send the second trigger pip after the first signal trigger element sends the burst length of the capable gated sweep of the first trigger signal interval 2n+1, realize reversion and drive pixel polarity to carry out precharge, wherein, and n >=1.
Wherein, step S2 also comprises:
On current line gate line, the output signal of the first GOA unit output terminal inputs to the input end of the first GOA unit on next line gate line, as the input signal of next line;
On current line gate line, the output signal of the first GOA unit output terminal inputs to the reset terminal of the first GOA unit on lastrow gate line, as the reset signal of lastrow.
Step S3 also comprises:
On current line gate line, the output signal of the second GOA unit output terminal inputs to the input end of the second GOA unit on next line gate line, as the input signal of next line;
On current line gate line, the output signal of the second GOA unit output terminal inputs to the reset terminal of the second GOA unit on lastrow gate line, as the reset signal of lastrow.
Preferably, in step s3, secondary signal trigger element sends the second trigger pip after the first signal trigger element sends the burst length of the capable gated sweep of the first trigger signal interval 2n+1, realizes reversion and drives pixel polarity to carry out precharge.
As can be seen from technique scheme, the present invention is by arranging symmetrical GOA driving circuit, the burst length of 2n+1 line scanning is postponed by trigger pip, realize being opened twice with a line gate line, be spaced apart 2n+1 horizontal-scanning interval, thus realize electric charge sharing functionality, improve the charge rate of panel.
To those skilled in the art, obviously the invention is not restricted to the details of above-mentioned one exemplary embodiment, and when not deviating from spirit of the present invention or essential characteristic, the present invention can be realized in other specific forms.Therefore, no matter from which point, all should embodiment be regarded as exemplary, and be nonrestrictive, scope of the present invention is limited by claims instead of above-mentioned explanation, and all changes be therefore intended in the implication of the equivalency by dropping on claim and scope are included in the present invention.Any Reference numeral in claim should be considered as the claim involved by limiting.
In addition, be to be understood that, although this instructions is described according to embodiment, but not each embodiment only comprises an independently technical scheme, this narrating mode of instructions is only for clarity sake, those skilled in the art should by instructions integrally, and the technical scheme in each embodiment also through appropriately combined, can form other embodiments that it will be appreciated by those skilled in the art that.
Claims (8)
1. a GOA driving circuit, is characterized in that, described GOA driving circuit comprises:
Some gate lines;
Some GOA unit be positioned on gate line, every bar gate line is arranged with the first GOA unit and the second GOA unit, first GOA unit and the second GOA unit comprise signal input part respectively, signal output part and reset terminal, on the first row gate line, the first GOA unit is connected with secondary signal trigger element with the first signal trigger element respectively with the input end of the second GOA unit, the trigger pip of described first signal trigger element and secondary signal trigger element is pulse signal, and the burst length of the capable gated sweep of trigger signal interval 2n+1 of the first signal trigger element and secondary signal trigger element, wherein, n >=1,
And the clock unit to be connected with the second GOA unit with the first GOA unit.
2. GOA driving circuit according to claim 1, is characterized in that, in described first GOA unit and the second GOA unit:
On remaining row gate line except the first row, the first GOA unit is connected with the signal output part of the second GOA unit with the first GOA unit on lastrow respectively with the signal input part of the second GOA unit;
All first GOA unit are connected be expert at gate line respectively with the signal output part of the second GOA unit;
All first GOA unit are connected with the signal output part of the second GOA unit with the first GOA unit on next line respectively with the signal reset terminal of the second GOA unit.
3. GOA driving circuit according to claim 1, it is characterized in that, in the burst length of the trigger pip 3 row gated sweep of the delayed first signal trigger element of trigger pip of described secondary signal trigger element, pixel polarity is driven to carry out precharge to be realized reversion by secondary signal trigger element.
4. GOA driving circuit according to claim 1, it is characterized in that, described clock unit comprises the first clock unit and second clock unit that are connected with GOA unit, and wherein, the GOA unit on adjacent lines gate line is connected with second clock unit with the first clock unit respectively.
5. a driving method for the GOA driving circuit according to any one of claim 1-4, is characterized in that, described driving method comprises:
S1, clock unit send clock signal to the first GOA unit and the second GOA unit;
S2, the first signal trigger element send the first trigger pip to the first GOA unit on gate line, carry out turntable driving successively to gate line;
S3, secondary signal trigger element send the second trigger pip after the first signal trigger element sends the burst length of the capable gated sweep of the first trigger signal interval 2n+1, realize reversion and drive pixel polarity to carry out precharge, wherein, and n >=1.
6. driving method according to claim 5, is characterized in that, described step S2 also comprises:
On current line gate line, the output signal of the first GOA unit output terminal inputs to the input end of the first GOA unit on next line gate line, as the input signal of next line;
On current line gate line, the output signal of the first GOA unit output terminal inputs to the reset terminal of the first GOA unit on lastrow gate line, as the reset signal of lastrow.
7. driving method according to claim 5, is characterized in that, described step S3 also comprises:
On current line gate line, the output signal of the second GOA unit output terminal inputs to the input end of the second GOA unit on next line gate line, as the input signal of next line;
On current line gate line, the output signal of the second GOA unit output terminal inputs to the reset terminal of the second GOA unit on lastrow gate line, as the reset signal of lastrow.
8. driving method according to claim 5, it is characterized in that, in described step S3, secondary signal trigger element sends the second trigger pip after the first signal trigger element sends the burst length of the capable gated sweep of the first trigger signal interval 2n+1, realizes reversion and drives pixel polarity to carry out precharge.
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| CN201510652416.6A CN105161066B (en) | 2015-10-10 | 2015-10-10 | GOA driving circuit and its driving method |
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| CN201510652416.6A CN105161066B (en) | 2015-10-10 | 2015-10-10 | GOA driving circuit and its driving method |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105609077A (en) * | 2016-01-28 | 2016-05-25 | 深圳市华星光电技术有限公司 | Pixel driving circuit |
| CN105702222A (en) * | 2016-04-18 | 2016-06-22 | 京东方科技集团股份有限公司 | Shift register unit, grid drive unit, display apparatus and driving method |
| CN111883075A (en) * | 2020-07-28 | 2020-11-03 | 北海惠科光电技术有限公司 | Panel driving circuit, method and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105609077A (en) * | 2016-01-28 | 2016-05-25 | 深圳市华星光电技术有限公司 | Pixel driving circuit |
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| US11488516B2 (en) | 2020-07-28 | 2022-11-01 | Beihai Hkc Optoelectronics Technology Co., Ltd. | Circuit, method of driving panel, and display device |
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| CN105161066B (en) | 2018-11-23 |
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