CN105137454A - Anti-interference algorithm FPGA realization method based on covariance matrix characteristic decomposition and realization device thereof - Google Patents

Abstract

The invention discloses an anti-interference algorithm FPGA realization method based on covariance matrix characteristic decomposition and a realization device thereof, and belongs to the technical field of anti-interference. Intermediate frequency signals inputted by an antenna array are converted into baseband signals by adopting a digital down conversion module; the baseband signals after down conversion of N channels are compensated by a channel consistency monitoring and compensation module; a covariance matrix calculation module calculates the covariance matrix of the compensated signals; characteristic decomposition is performed on the covariance matrix by a covariance matrix characteristic decomposition module so that characteristic values and characteristic vectors are obtained; and weighting is performed by a weighing output module according to the obtained characteristic vectors so that an optimal weight value is obtained, and finally the signals after anti-interference are outputted. Resource occupation is low and weight update speed is high in FPGA realization, and the channel consistency detection and compensation module is additionally arranged before inputting of the signals so that loss of interference suppression capacity caused by channel inconsistency can be reduced and robustness of an anti-interference algorithm can be enhanced.

Description

A kind of FPGA implementation method of Anti-interference algorithm based on covariance matrix feature decomposition and realize device

Technical field

The invention belongs to Anti-Jamming Technique field, and in particular to a kind of FPGA implementation method of Anti-interference algorithm based on covariance matrix feature decomposition and realize device.

Background technology

In the war in Iraq, U.S. army it is unprecedented it is a large amount of used GPS (GlobalPositioningSystem) precision Guidance Technique, and pass through the weapon that GPS technology is guided, hit rate is increased sharply, one of key factor as left and right war situation.With the end of war, people progressively deepen to the understanding of satellite navigation, by the development of decades, there are the satellite navigation system (dipper system for including China) of oneself in many countries, these systems are referred to as GLONASS (GlobalNavigationSatelliteSystem, GNSS), GNSS has played big advantage in military, civil area, it has also become the important infrastructure of information systems.

Due to the intrinsic fragility of aeronautical satellite, by complicated electromagnetic environmental impact in signal communication process, and to the reason such as the anti-interference research of receiver is not deep enough so that satellite navigation system is highly susceptible to various interference consciously or unconsciously and influences its precision or even lose the ability of navigator fix.Therefore, Anti-Jamming Technique is studied, to improving GNSS antijamming capability, accurately utilizing the information of its offer significant.

All kinds of Anti-Jamming Technique theories are mainly for GNSS receiver at present, Anti-Jamming Technique development wherein based on input signal covariance matrix feature decomposition is relatively early, theoretical ripe, the technology is by carrying out feature decomposition to input signal covariance matrix, sort out mutually orthogonal interference and noise subspace, finally using the orthogonality of interference space and spatial noise draw best initial weights be weighted to aerial array realize it is anti-interference；But, because covariance matrix is complex matrix, existing matrix- eigenvector-decomposition is theoretical in complex field and invalid, and matrix decomposition amount of calculation is huge, and these factors are the bottlenecks that FPGA realizes above-mentioned Anti-interference algorithm.2009, Shen justice was waited《The anti-interference pretreatment of uniform circular array DOA estimations》In propose a kind of method that covariance matrix is converted to real number field by complex field, so as to avoid decomposing complex matrix, but this method is only applicable to direction of arrival (DOA) estimation based on spectrum peak search, need to obtain complex-valued weights in the Anti-interference algorithm based on covariance matrix feature decomposition, this method is obviously not suitable for.

The content of the invention

The problem of Anti-interference algorithm FPGA of feature based decomposition of the present invention for mentioning in the prior art realizes difficult, propose a kind of FPGA implementation method of Anti-interference algorithm based on covariance matrix feature decomposition and realize device, the implementation method amount of calculation is small, right value update speed is fast, effectively increases antijamming capability.

Described realizes that device is included in Digital Down Convert (DDC) module set on FPGA, passage consistency monitoring and compensating module, covariance matrix computing module, covariance matrix feature decomposition module and weighting output module.

The intermediate-freuqncy signal that aerial array is inputted is converted to baseband signal by described Digital Down Convert (DDC) module.Including：DDS (DirectDigitalSynthesizer) produces mutually orthogonal sine, cosine signal；By the intermediate-freuqncy signal of input respectively and just, cosine signal be mixed, the signal of mixing is filtered using low pass filter, the in-phase component and quadrature component of baseband signal is obtained.

Described passage consistency monitoring and compensating module, including：Obtain the instantaneous phase and instantaneous amplitude of N (N is anti-interference antenna element number of array) individual passage and be averaged；Other N-1 passages and the average instantaneous amplitude of first passage in addition to first passage are done into division, average instantaneous phase does subtraction, obtains amplitude inconsistency and Sensor gain and phase perturbations of other N-1 passages relative to first passage in addition to first passage；Baseband signal after N number of passage down coversion is compensated.

Described covariance matrix computing module is the covariance matrix for calculating the signal after compensation.

Described covariance matrix feature decomposition module is to carry out feature decomposition to covariance matrix, obtains characteristic value and characteristic vector, and the module is decomposed with the method for iteration to covariance matrix.Including：Initialize, current iteration state is set, enters interative computation, condition judgment.

Described weighting output module is to be weighted to obtain best initial weights w according to the characteristic vector obtained_opt, the signal after final output is anti-interference.Weighted formula is：Y=w_opt ^HX, wherein y are output, the matrix that X constitutes for the signal after compensation.

The present invention has the advantage that to be with good effect：

(1) FPGA realizabilitys：A kind of FPGA implementation method of Anti-interference algorithm based on covariance matrix feature decomposition proposed by the present invention, overcome the anti-interference theory feature decomposition module amount of calculation when FPGA is realized of tradition huge, the problem of realizing difficult, by directly carrying out feature decomposition to covariance matrix using the method for iteration in complex field, realize anti-interference, FPGA realizes that simply resource occupation is few.

(2) right value update speed is fast：A kind of FPGA implementation method of Anti-interference algorithm based on covariance matrix feature decomposition proposed by the present invention, covariance matrix feature decomposition module is carrying out feature decomposition using the method for iteration, convergence rate is very fast, it is time-consuming less than 1 μ s for a complex matrix iteration start to finish, best initial weights are made up of the characteristic vector of covariance matrix, thus best initial weights renewal speed also than very fast.

(3) robustness：A kind of FPGA implementation method of Anti-interference algorithm based on covariance matrix feature decomposition proposed by the present invention, passage consistency detection and compensating module are added before input signal, reduce due to the loss for the interference rejection capability that difference between channels are brought, improve the robustness of Anti-interference algorithm.

Brief description of the drawings

Fig. 1 is a kind of workflow diagram of the FPGA implementation method of Anti-interference algorithm based on covariance matrix feature decomposition of the present invention.

Embodiment

Below in conjunction with accompanying drawing, the present invention is described in further detail.

Present invention firstly provides the FPGA of Anti-interference algorithm based on covariance matrix feature decomposition a kind of realize device, as shown in figure 1, realizing five modules on FPGA：Passage consistency is monitored and compensating module, Digital Down Converter Module, covariance matrix computing module, covariance matrix feature decomposition module and weighting output module.

The intermediate-freuqncy signal of described Digital Down Converter Module receiving antenna array, and intermediate-freuqncy signal is converted into baseband signal is sent to passage consistency monitoring and compensating module, monitored in described passage consistency with being compensated in compensating module to baseband signal；Described covariance matrix computing module is according to the signal of change covariance matrix after compensation；Covariance matrix feature decomposition module carries out feature decomposition using the method for iteration to covariance matrix, obtains characteristic value and characteristic vector, and be weighted output according to described characteristic value and characteristic vector in weighting output module.

Based on above-mentioned device of realizing, the present invention also provides a kind of implementation method for realizing device, comprised the following steps that：

Step 1: the intermediate-freuqncy signal of Digital Down Convert (DDC) module receiving antenna array；

The intermediate-freuqncy signal that aerial array is inputted is converted to baseband signal by Digital Down Converter Module, and exports the in-phase component and quadrature component of baseband signal, is specially：

(1.1) DDS (DirectDigitalSynthesizer, Direct Digital Synthesizer) is produced, DDS clock settings are sample rate, and DDS exports mutually orthogonal sinusoidal signal sin (w by data transfer rate of sample rate₀T) with cosine signal cos (w₀t)。

(1.2) intermediate-freuqncy signal of the cosine and sine signal for producing DDS respectively with input is mixed, and has been achieved in that symbol fixed-point multiplication device, and the intermediate-freuqncy signal of input is multiplied with sinusoidal signal, and obtain is to include high fdrequency component and baseband signal ddc_q, the intermediate-freuqncy signal of input is multiplied with cosine signal, and that obtain is the ddc comprising high fdrequency component and baseband signal_i。

(1.3) to ddc_iAnd ddc_qIt is filtered respectively, wave filter selects two low pass filters, and cut-off frequency is respectively ddc_iAnd ddc_qThe half of signal bandwidth, filters out high fdrequency component, and output is respectively：The in-phase component x of baseband signal_i, the quadrature component x of baseband signal_q, identical processing is done to N number of passage, then the in-phase component of the baseband signal of n-th of passage down conversion module output is x_ni, the quadrature component x of baseband signal_nq。

Step 2: monitoring and the compensation function of difference between channels are realized in passage consistency monitoring with compensating module, it is specially：

(2.1) data of M after down coversion (M ＞ 1024) individual sampled point are gathered respectively to N (N is aerial array moderate resistance potato masher antenna array element number) individual passage, the instantaneous amplitude and instantaneous phase of each sampled point are obtained, calculation formula is：

Wherein A_n(k) be n-th of passage k-th of sampled point instantaneous amplitude, θ_n(k) be n-th of passage, k-th of sampled point instantaneous phase, x_nq(k)、x_ni(k) it is respectively Digital Down Converter Module is exported in step one the quadrature component and in-phase component corresponding to n-th of passage, k-th of sampled point.

(2.2) instantaneous amplitude and instantaneous phase of M sampled point are averaged, obtain the average instantaneous amplitude of N number of passageWith average instantaneous phaseCalculation formula is：

Wherein, M is the number of sampled point；Averaging be in order to ensure each sampled point can obtain ideal compensation so that entire compensation error reduce.

(2.3) other N-1 passage and the average instantaneous amplitude of first passage in addition to first passage are done into division, average instantaneous phase does subtraction, obtains amplitude inconsistency (ratio of average instantaneous amplitude) and Sensor gain and phase perturbations (difference of average instantaneous phase) of the other N-1 passages in addition to first passage relative to first passage；If other N-1 passages in addition to first passage are respectively relative to the amplitude inconsistency and Sensor gain and phase perturbations of first passage:

Then compensation is exactly that the plural number for exporting each passage down coversion with being made up of amplitude inconsistency, Sensor gain and phase perturbations does complex multiplication, and complex multiplication formula is：

X_nin=x_ni+jx_nqFor the baseband signal of the Digital Down Convert output of the n-th passage in step one, x_ni, x_nqThe quadrature component and in-phase component that correspond to n-th of passage that respectively Digital Down Converter Module is exported.

A_ndifferAmplitude inconsistency for the n-th passage relative to first passage, θ_ndifferSensor gain and phase perturbations for the n-th passage relative to first passage.

Step 3: covariance matrix computing module is to calculate the signal X after compensation_noutCovariance matrix, be specially：

(3.1) covariance matrix is calculated using complex multiplier, calculation formula is：R_x=XX^H, H represents conjugate transposition；The matrix that wherein X is made up of the signal after each passage output compensation in step 2, is defined as：

X^H=[X_lout ^*…X_Nout ^*], * represents conjugation.

(3.2) to the R in previous step_xDo cumulative：M is the number of sampled point, cumulative to be realized with adder, cumulative accurate to ensure, the work clock of the adder must not drop below twice of input signal data rate in FPGA.

(3.3) to R_xxIt is averaged, then covariance matrixM is sampled point number, and R is a N row, the matrix of N row, and N is the number of anti-interference antenna array element.

Step 4: covariance matrix feature decomposition module carries out feature decomposition using the method for iteration to covariance matrix R, characteristic value and characteristic vector are obtained, the module is the key that FPGA realizes Anti-interference algorithm, be specially：

(4.1) initialize.Some parameters in iterative process are initialized, these parameters and numerical value are respectively：Matrix E, E are initialized as the unit matrix of N*N members；Current iteration round l=0, iteration round upper limit L, 5≤L≤50；The norm thresholding ε of off diagonal element 2,0≤ε≤10^-5。

(4.2) current iteration state is set.Row, column where the current iteration element to be eliminated exactly is set, the row, column where off diagonal element is set according to the order of matrix element from left to right, from top to bottom.By taking 4*4 matrix Bs as an example, the element to be eliminated is respectively：B (1,2), B (1,3), B (Isosorbide-5-Nitrae), B (2,3), B (2,4), B (3,4), the element of wherein B (1,2) representing matrix B the first row secondary series, by that analogy.

(4.3) interative computation.Interative computation is one orthogonal matrix of construction, a series of orthogonal operations are carried out to covariance matrix and unit matrix, so that covariance matrix turns to approximate diagonal matrix after these conversion, because matrix exgenvalue is constant after orthogonal operations, therefore the element on diagonal matrix diagonal is exactly the characteristic value of covariance matrix.If covariance matrix is changed into R after ith iteration⁽ⁱ⁾, unit matrix is changed into E⁽ⁱ⁾, the orthogonal matrix of i+1 time iteration is P, then,

R⁽ⁱ⁺¹⁾=PR⁽ⁱ⁾P^H

E⁽ⁱ⁺¹⁾=E⁽ⁱ⁾P^H

Wherein,

S^*For S conjugation, P^HFor P conjugate transposition, R⁽ⁱ⁾(m, n) represents the column element of m rows n-th of matrix R in ith iteration.

Interative computation is concretely comprised the following steps：

(4.3.1)：Obtain C, S.Assuming that the iterative state that step 4.2 is set arranges for m rows n-th, and after ith iteration, the value difference x of m rows m row and line n m column elements_mm=R⁽ⁱ⁾(m,m),x_nm=R⁽ⁱ⁾(n,m).Then：

| | represent modulus.

(4.3.2)：Structural matrix P and P^H。

M on the left of matrix, n represent m rows, and line n, downside m, n represents that m is arranged, the n-th row.

(4.3.3)：Interative computation.The computing of i+1 time iteration is：

R⁽ⁱ⁺¹⁾=PR⁽ⁱ⁾P^H

E⁽ⁱ⁺¹⁾=E⁽ⁱ⁾P^H

Wherein, R⁽ⁱ⁾It is the covariance matrix after ith iteration, E⁽ⁱ⁾Represent the unit matrix after ith iteration.

(4.3.4)：Condition judgment.Condition judgment controls whole interative computation to be to continue with or terminate, and the decision logic of condition judgment is：

(a) current iteration round l is calculated.In step (4.2), if all iterative states in state set all live through an iteration, after last iterative state terminates, claim one to take turns iteration and complete, represent experienced the iteration how much taken turns with iteration round l.If the state set in step (4.2) is last state in state set, l=l+1, otherwise return to step (4.2) sets next state according to the state in state set.

(b) after calculating each round iteration is finished, 2 norms of covariance matrix off-diagonal element.Calculation formula is：

Wherein, | | r | |₂Two norms of representing matrix off-diagonal element, R (m, n) the representing matrix R column element of m rows n-th, | | expression takes absolute value.

(c) judge.Decision logic is：If l ＞ L or | | r | |₂(wherein l is the current iteration round calculated in step (a), the iteration round upper limit that L is set when being step (4.1) initialization to ＜ ε；||r||₂2 norms of the matrix off diagonal element calculated in step (b), the norm thresholding of off diagonal element 2 that ε is set when being step (4.1) initialization), then terminate iteration, export this result, as a result for：Now R cornerwise value is exactly the eigenvalue λ of covariance matrix₁,…λ_N, E column vector is exactly the characteristic vector η corresponding to covariance matrix characteristic value₁,…η_N, otherwise return to step (4.2).

Step 5: weighting output.According to the characteristic value and characteristic vector obtained in step 4, to eigenvalue λ₁,…λ_NIt is ranked up, finds out and minimal eigenvalue λ according to order from small to large₁Ratio is less than 4dB further feature value, and these characteristic values are λ₁,…λ_D, D ＜ N, the then corresponding characteristic vector η of these characteristic values₁,…η_DSum is exactly best initial weights w_opt, i.e.,：

w_opt=η₁+…+η_D

Obtain after best initial weights to the output X in step 2_noutIt is weighted, weighted formula is：

Wherein y is output, and X is by signal X_noutThe matrix of composition, w_opt ^HRepresent best initial weights w_optConjugate transposition.

Claims (5)

1. a kind of FPGA implementation method of the Anti-interference algorithm based on covariance matrix feature decomposition, it is characterised in that：Comprise the following steps that,

Step 1: the intermediate-freuqncy signal of Digital Down Converter Module receiving antenna array；

The intermediate-freuqncy signal that aerial array is inputted is converted to baseband signal by Digital Down Converter Module, and exports the in-phase component and quadrature component of baseband signal；

Step 2: monitoring and the compensation function of difference between channels are realized in passage consistency monitoring with compensating module, it is specially：

(2.1) data of M sampled point after Digital Down Convert are gathered respectively to N number of passage in aerial array, the instantaneous amplitude and instantaneous phase of each sampled point is obtained, calculation formula is：

$A_n\left(k\right)=\sqrt{{x_{ni}}^2\left(k\right)+{x_{nq}}^2\left(k\right)},{\mathrm{\θ}}_n\left(k\right)=a\tan \left(\frac{x_{nq}\left(k\right)}{x_{ni}\left(k\right)}\right),k=1...M,n=1...N,---\left(1\right)$

Wherein A_n(k) be n-th of passage k-th of sampled point instantaneous amplitude, θ_n(k) be n-th of passage, k-th of sampled point instantaneous phase, x_nq(k)、x_ni(k) it is respectively Digital Down Converter Module is exported in step one the quadrature component and in-phase component corresponding to n-th of passage, k-th of sampled point, N is aerial array moderate resistance potato masher antenna array element number；

(2.2) instantaneous amplitude and instantaneous phase of M sampled point are averaged, obtain the average instantaneous amplitude of N number of passageWith average instantaneous phaseCalculation formula is：

$\stackrel{\‾}{A_n}=\frac{1}{M}\underset{k=1}{\overset{M}{\Σ}}{A}_n\left(k\right),\stackrel{\‾}{{\mathrm{\θ}}_n}=\frac{1}{M}\underset{k=1}{\overset{M}{\Σ}}{\mathrm{\θ}}_n\left(k\right),n=1...N,---\left(2\right)$

Wherein, M is the number of sampled point；

(2.3) other N-1 passage and the average instantaneous amplitude of first passage in addition to first passage are done into division, average instantaneous phase does subtraction, obtains amplitude inconsistency and Sensor gain and phase perturbations of other N-1 passages relative to first passage in addition to first passage；If other N-1 passages in addition to first passage are respectively relative to the amplitude inconsistency and Sensor gain and phase perturbations of first passage:

$A_{2differ}=\frac{\stackrel{\‾}{A_2}}{\stackrel{\‾}{A_1}},...A_{Ndiffer}=\frac{\stackrel{\‾}{A_N}}{\stackrel{\‾}{A_1}},{\mathrm{\θ}}_{2differ}=\stackrel{\‾}{{\mathrm{\θ}}_2}-\stackrel{\‾}{{\mathrm{\θ}}_1},...,{\mathrm{\θ}}_{Ndiffer}=\stackrel{\‾}{{\mathrm{\θ}}_N}-\stackrel{\‾}{{\mathrm{\θ}}_1}$

Then compensation is exactly that the plural number for exporting each passage Digital Down Converter Module with being made up of amplitude inconsistency, Sensor gain and phase perturbations does complex multiplication, and complex multiplication formula is：

$X_{nout}=X_{nin}\×\frac{1}{A_{ndiffer}}{e}^{-{\mathrm{j\θ}}_{ndiffer}},n=1...N,---\left(3\right)$

$A_{1differ}=\stackrel{\‾}{A_1},{\mathrm{\θ}}_{1differ}=\stackrel{\‾}{{\mathrm{\θ}}_1},$

X_nin=x_ni+jx_nqFor the baseband signal of the Digital Down Convert output of the n-th passage in step one, x_ni, x_nqThe quadrature component and in-phase component that correspond to n-th of passage that respectively Digital Down Converter Module is exported；

Step 3: covariance matrix computing module is to calculate the signal X after compensation_noutCovariance matrix, be specially：

(3.1) covariance matrix is calculated using complex multiplier, calculation formula is：R_x=XX^H, H represents conjugate transposition；The matrix that wherein X is made up of the signal after each passage output compensation in step 2, is defined as：

$X=\left[\begin{array}{c}{X}_{1out}\\ .\\ .\\ .\\ X_{Nout}\end{array}\right],X^H=\[{X_{1out}}^{*}...{X_{Nout}}^{*}\],$ * conjugation is represented；

(3.2) to the R in previous step_xDo cumulative：It is cumulative to be realized with adder；

(3.3) to R_xxIt is averaged, then covariance matrixM is sampled point number, and R is a N row, the matrix of N row, and N is the number of anti-interference antenna array element；

Step 4: covariance matrix feature decomposition module carries out feature decomposition using the method for iteration to covariance matrix R, characteristic value and characteristic vector are obtained, is specially：

(4.1) initialize；

The parameter in iterative process is initialized, these parameters and numerical value are respectively：Matrix E, E are initialized as the unit matrix of N*N members；Current iteration round l=0, iteration round upper limit L, 5≤L≤50；The norm thresholding ε of off diagonal element 2,0≤ε≤10^-5；

(4.2) current iteration state is set；

Row, column where the current iteration element to be eliminated is set, the row, column where off diagonal element is set according to the order of matrix element from left to right, from top to bottom；

(4.3) interative computation；

Interative computation is one orthogonal matrix of construction, a series of orthogonal operations are carried out to covariance matrix and unit matrix, so that covariance matrix turns to approximate diagonal matrix after these conversion, because matrix exgenvalue is constant after orthogonal operations, therefore the element on diagonal matrix diagonal is exactly the characteristic value of covariance matrix；The column vector of unit matrix is exactly the characteristic vector corresponding to the characteristic value of covariance matrix after iteration；

Step 5: weighting output；

According to the characteristic value and characteristic vector obtained in step 4, to eigenvalue λ₁,…λ_NIt is ranked up, finds out and minimal eigenvalue λ according to order from small to large₁Ratio is less than 4dB further feature value, and these characteristic values are λ₁,…λ_D, D ＜ N, the then corresponding characteristic vector η of these characteristic values₁,…η_DSum is exactly best initial weights w_opt, i.e.,：

w_opt=η₁+…+η_D

Obtain after best initial weights to the output X in step 2_noutIt is weighted, weighted formula is：

$y={w_{opt}}^{H}X={w_{opt}}^H\left[\begin{array}{c}{X}_{1out}\\ .\\ .\\ .\\ X_{Nout}\end{array}\right]$

Wherein y is output, and X is by signal X_noutThe matrix of composition, w_opt ^HRepresent best initial weights w_optConjugate transposition.

2. a kind of FPGA implementation method of described Anti-interference algorithm based on covariance matrix feature decomposition according to claim 1, it is characterised in that：Step one concrete methods of realizing is as follows,

(1.1) DDS is produced, DDS clock settings are sample rate, and DDS exports mutually orthogonal sinusoidal signal sin (w by data transfer rate of sample rate₀T) with cosine signal cos (w₀t)；

(1.2) intermediate-freuqncy signal of the positive signal, cosine signal produced DDS respectively with input is mixed, and is achieved in that symbol fixed-point multiplication device, and the intermediate-freuqncy signal of input is multiplied with sinusoidal signal, and obtain is to include high fdrequency component and baseband signal ddc_q, the intermediate-freuqncy signal of input is multiplied with cosine signal, and that obtain is the ddc comprising high fdrequency component and baseband signal_i；

(1.3) to ddc_iAnd ddc_qIt is filtered respectively, wave filter selects two low pass filters, and cut-off frequency is respectively ddc_iAnd ddc_qThe half of signal bandwidth, filters out high fdrequency component, and output is respectively：The in-phase component x of baseband signal_i, the quadrature component x of baseband signal_q, identical processing is done to N number of passage, then the in-phase component for the baseband signal that n-th of passage is exported by Digital Down Converter Module is x_ni, the quadrature component x of baseband signal_nq, n=1,2 ..., N.

3. a kind of FPGA implementation method of described Anti-interference algorithm based on covariance matrix feature decomposition according to claim 1, it is characterised in that：The work clock of the adder is not less than twice of input signal data rate.

4. a kind of FPGA implementation method of described Anti-interference algorithm based on covariance matrix feature decomposition according to claim 1, it is characterised in that：Described interative computation is concretely comprised the following steps,

(4.3.1)：Obtain C, S；

Assuming that the iterative state that step 4.2 is set arranges for m rows n-th, and after ith iteration, the value difference x of m rows m row and line n m column elements_mm=R⁽ⁱ⁾(m,m),x_nm=R⁽ⁱ⁾(n, m), then：

$C=\frac{\left|x_{mm}\right|}{\sqrt{|x_{mm}{|}^2+|x_{nm}{|}^2}}$

$S=\frac{x_{nm}}{x_{mm}}C$

| | represent modulus；

(4.3.2)：Construct orthogonal matrix P and P^H：

M on the left of matrix, n represent m rows, and line n, downside m, n represents that m is arranged, the n-th row；

(4.3.3)：Interative computation：The computing of i+1 time iteration is：

R⁽ⁱ⁺¹⁾=PR⁽ⁱ⁾P^H

E⁽ⁱ⁺¹⁾=E⁽ⁱ⁾P^H

Wherein, R⁽ⁱ⁾It is the covariance matrix after ith iteration, E⁽ⁱ⁾Represent the unit matrix after ith iteration；

(4.3.4)：Condition judgment；

The decision logic of condition judgment is：

(a) current iteration round l is calculated；In step (4.2), if all iterative states in state set all live through an iteration, after last iterative state terminates, claim one to take turns iteration and complete, represent experienced the iteration how much taken turns with iteration round l；If the state set in step (4.2) is last state in state set, l=l+1, otherwise return to step (4.2) sets next state according to the state in state set；

(b) calculate after each round iteration finishes, 2 norms of covariance matrix off-diagonal element, calculation formula is：

$\left|\right|r|{|}_2=\sqrt{\underset{m\≠n}{\Σ}|R(m,n){|}^2}$

Wherein, | | r | |₂Two norms of representing matrix off-diagonal element, R (m, n) the representing matrix R column element of m rows n-th, | | expression takes absolute value；

(c) judge；

Decision logic is：If l ＞ L or | | r | |₂＜ ε, then terminate iteration, exports this result, as a result for：Now R cornerwise value is exactly the eigenvalue λ of covariance matrix₁,…λ_N, E column vector is exactly the characteristic vector η corresponding to covariance matrix characteristic value₁,…η_N, otherwise return to step (4.2).

5. a kind of FPGA of the Anti-interference algorithm based on covariance matrix feature decomposition realizes device, it is characterised in that：Described realizes that device is included in five modules realized on FPGA, is respectively：Passage consistency is monitored and compensating module, Digital Down Converter Module, covariance matrix computing module, covariance matrix feature decomposition module and weighting output module；

The intermediate-freuqncy signal of described Digital Down Converter Module receiving antenna array, and intermediate-freuqncy signal is converted into baseband signal is sent to passage consistency monitoring and compensating module, monitored in described passage consistency with being compensated in compensating module to baseband signal；

Described covariance matrix computing module is according to the signal of change covariance matrix after compensation；Covariance matrix feature decomposition module carries out feature decomposition using the method for iteration to covariance matrix, obtains characteristic value and characteristic vector, and be weighted output according to described characteristic value and characteristic vector in weighting output module.