CN105117548A - Differential routing method suitable for DUAL STRIPLINE design - Google Patents
Differential routing method suitable for DUAL STRIPLINE design Download PDFInfo
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- CN105117548A CN105117548A CN201510524807.XA CN201510524807A CN105117548A CN 105117548 A CN105117548 A CN 105117548A CN 201510524807 A CN201510524807 A CN 201510524807A CN 105117548 A CN105117548 A CN 105117548A
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- 238000000034 method Methods 0.000 title claims abstract description 14
- 230000009977 dual effect Effects 0.000 title description 2
- 238000004088 simulation Methods 0.000 claims abstract description 8
- 238000003475 lamination Methods 0.000 claims description 3
- 230000007812 deficiency Effects 0.000 description 1
- 238000012913 prioritisation Methods 0.000 description 1
- 230000001568 sexual effect Effects 0.000 description 1
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Abstract
The invention provides a differential routing method suitable for DUALSTRIPLINE design, which has the technical scheme that: three kinds of common situations of the design are walked to layout, carry out the analysis, increase and walk the line aspect: two adjacent signal layers adopt a parallel wiring mode; two adjacent signal layers adopt a cross wiring mode; only one signal layer is used for walking differential lines, and the adjacent layer has no high-speed line; under the environment that the length of the laminated layer, the medium and the trace are the same, the simulation tool adopts SigritySpeed2000 to perform time domain crosstalk simulation analysis. Compared with the prior art, the differential routing method suitable for the Dualstripline design is provided.
Description
Technical field
The present invention relates to server master board R & D design field, specifically a kind of difference Wiring method being applicable to DUALSTRIPLINE design.
Background technology
Along with the arrival of cloud computing, the development of server emerges rapidly, and in the design of server, signal rate is more and more higher, high speed signal to the spatial design demand of mainboard and cost also in continuous lifting.Therefore, in stack-design, dualstripline pattern enjoys designer to favor.
The stack-design of dualstripline pattern designs different from normal stack, the feature of this stack-design is that two-layer signals layer is designed to adjacent bed, normal stack designs: 12 laminate 6 layers routing layer, 16 laminate 8 layers routing layer, have GND layer to shield crosstalk between signals layer and signals layer, dualstripline designs: without GND layer between signals layer and signals layer, 12 laminates can have 8 layers of routing layer, this design increases the routing layer design space of signal, reduces R&D costs.But shortcoming is: compared with designing with normal stack, do not have GND planar isolated between signals layer, high-speed line crosstalk is increased, signal quality declines.
Therefore, dualstripline pattern can increase signal lead aspect, increases signal lead design space, reduces R&D costs.But when adopting dualstripline pattern, how to reduce the crosstalk between signal, meeting signal integrity sexual demand, SI designer is also pursuing the assessment of signal integrity prioritization scheme always.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of difference Wiring method being applicable to DUALSTRIPLINE design is provided.
Technical scheme of the present invention realizes in the following manner, and its scheme is as follows:
For three kinds of common situations of layout cabling design, analyze, increase cabling aspect:
(1): two-layer adjacent signal layers adopts parallel cabling mode;
(2): two-layer adjacent signal layers adopts cross wiring mode;
(3): only have one deck signals layer to walk differential lines, adjacent layer is without high-speed line;
Under the environment that lamination, medium are identical with track lengths, emulation tool adopts SigritySpeed2000 to carry out time domain crosstalk simulation analysis;
When design allows, non-conterminous layer will walk high-speed line simultaneously, and individual layer wiring can avoid crosstalk;
Two-layer adjacent signal layers all will connect up, and for parallel cabling and cross wiring two kinds of situations, adopts cross wiring pattern.
Advantage of the present invention is:
Of the present invention a kind of be applicable to DUALSTRIPLINE design difference Wiring method compared to the prior art, a kind of difference Wiring method being applicable to dualstripline design is proposed, notable feature is when designer adopts dualstripline pattern to connect up for reducing R&D costs, several layout methods that simulation comparison is common, obtain the good a kind of wire laying mode of signal integrity.Object is: reducing R&D costs while, improve signal quality, realize the object of signal integrity.
Embodiment
Below the difference Wiring method of a kind of DUALSTRIPLINE of being applicable to design of the present invention is described in detail below.
A kind of difference Wiring method being applicable to DUALSTRIPLINE design of the present invention, scheme is as follows:
For three kinds of common situations of layout cabling design, carry out simulation analysis: case1: two-layer adjacent signal layers adopts parallel cabling mode; Case2: two-layer adjacent signal layers adopts cross wiring mode; Case3: only have one deck signals layer to walk differential lines, adjacent layer is without high-speed line.
Under the environment that lamination, medium are identical with track lengths, emulation tool adopts SigritySpeed2000 to carry out time domain crosstalk simulation analysis.
Simulation result shows: case3 is because adjacent layer is without crosstalk, and signal cross-talk is minimum; Case1 and case2 result is obviously worse than case3, and the crosstalk of case2 is less than case1.
1) for dualstripline design, if design allows, advise that non-conterminous layer will walk high-speed line simultaneously, individual layer wiring can avoid crosstalk;
2) if two-layer adjacent signal layers all will connect up, for parallel cabling and cross wiring two kinds of situations, suggestion adopts cross wiring pattern.
Of the present invention a kind of be applicable to DUALSTRIPLINE design its processing and fabricating of difference Wiring method very simple and convenient, to specifications shown in can process.
Except the technical characteristic described in instructions, be the known technology of those skilled in the art.
Claims (1)
1. be applicable to a difference Wiring method for DUALSTRIPLINE design, it is characterized in that technical scheme is as follows:
For three kinds of common situations of layout cabling design, analyze, increase cabling aspect:
(1): two-layer adjacent signal layers adopts parallel cabling mode;
(2): two-layer adjacent signal layers adopts cross wiring mode;
(3): only have one deck signals layer to walk differential lines, adjacent layer is without high-speed line;
Under the environment that lamination, medium are identical with track lengths, emulation tool adopts SigritySpeed2000 to carry out time domain crosstalk simulation analysis;
When design allows, non-conterminous layer will walk high-speed line simultaneously, and individual layer wiring can avoid crosstalk;
Two-layer adjacent signal layers all will connect up, and for parallel cabling and cross wiring two kinds of situations, adopts cross wiring pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510524807.XA CN105117548A (en) | 2015-08-25 | 2015-08-25 | Differential routing method suitable for DUAL STRIPLINE design |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510524807.XA CN105117548A (en) | 2015-08-25 | 2015-08-25 | Differential routing method suitable for DUAL STRIPLINE design |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105117548A true CN105117548A (en) | 2015-12-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510524807.XA Pending CN105117548A (en) | 2015-08-25 | 2015-08-25 | Differential routing method suitable for DUAL STRIPLINE design |
Country Status (1)
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| CN (1) | CN105117548A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106777669A (en) * | 2016-12-13 | 2017-05-31 | 郑州云海信息技术有限公司 | A kind of circuit dispositions method and device |
| CN107809838A (en) * | 2017-09-29 | 2018-03-16 | 曙光信息产业(北京)有限公司 | Mainboard and server |
| CN110398681A (en) * | 2019-07-26 | 2019-11-01 | 苏州浪潮智能科技有限公司 | A kind of biobelt Check Methods and relevant apparatus |
| CN112464313A (en) * | 2020-11-30 | 2021-03-09 | 苏州浪潮智能科技有限公司 | Method for processing differential routing through hole of server wiring |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104102787A (en) * | 2014-07-23 | 2014-10-15 | 浪潮电子信息产业股份有限公司 | Design method for reducing crosstalk effect of Dual Stripline type wiring |
| CN104102797A (en) * | 2014-08-08 | 2014-10-15 | 浪潮电子信息产业股份有限公司 | PCB (printed circuit board) layout design method reducing differential crosstalk |
-
2015
- 2015-08-25 CN CN201510524807.XA patent/CN105117548A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104102787A (en) * | 2014-07-23 | 2014-10-15 | 浪潮电子信息产业股份有限公司 | Design method for reducing crosstalk effect of Dual Stripline type wiring |
| CN104102797A (en) * | 2014-08-08 | 2014-10-15 | 浪潮电子信息产业股份有限公司 | PCB (printed circuit board) layout design method reducing differential crosstalk |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106777669A (en) * | 2016-12-13 | 2017-05-31 | 郑州云海信息技术有限公司 | A kind of circuit dispositions method and device |
| CN106777669B (en) * | 2016-12-13 | 2020-07-21 | 苏州浪潮智能科技有限公司 | Line deployment method and device |
| CN107809838A (en) * | 2017-09-29 | 2018-03-16 | 曙光信息产业(北京)有限公司 | Mainboard and server |
| CN110398681A (en) * | 2019-07-26 | 2019-11-01 | 苏州浪潮智能科技有限公司 | A kind of biobelt Check Methods and relevant apparatus |
| CN112464313A (en) * | 2020-11-30 | 2021-03-09 | 苏州浪潮智能科技有限公司 | Method for processing differential routing through hole of server wiring |
| CN112464313B (en) * | 2020-11-30 | 2022-06-03 | 苏州浪潮智能科技有限公司 | Method for processing differential routing through hole of server wiring |
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| RJ01 | Rejection of invention patent application after publication | ||
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Application publication date: 20151202 |