CN105070795B - A kind of preparation method of vertical stratification iii-nitride light emitting devices - Google Patents
A kind of preparation method of vertical stratification iii-nitride light emitting devices Download PDFInfo
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- 238000013517 stratification Methods 0.000 title claims abstract description 23
- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 238000003672 processing method Methods 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims description 40
- 229910002601 GaN Inorganic materials 0.000 claims description 28
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 14
- 150000004767 nitrides Chemical class 0.000 claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 229910052594 sapphire Inorganic materials 0.000 claims description 10
- 239000010980 sapphire Substances 0.000 claims description 10
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052733 gallium Inorganic materials 0.000 claims description 9
- 238000012545 processing Methods 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 8
- 206010040844 Skin exfoliation Diseases 0.000 claims description 6
- 230000004087 circulation Effects 0.000 claims description 6
- 230000035618 desquamation Effects 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 229910017083 AlN Inorganic materials 0.000 claims description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 238000005566 electron beam evaporation Methods 0.000 claims description 2
- 229910052732 germanium Inorganic materials 0.000 claims description 2
- 239000001257 hydrogen Substances 0.000 claims description 2
- 229910052739 hydrogen Inorganic materials 0.000 claims description 2
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 1
- 238000000151 deposition Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
- 125000004429 atom Chemical group 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000013507 mapping Methods 0.000 description 3
- 229910003465 moissanite Inorganic materials 0.000 description 2
- YZCKVEUIGOORGS-IGMARMGPSA-N Protium Chemical compound [1H] YZCKVEUIGOORGS-IGMARMGPSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000001657 homoepitaxy Methods 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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Abstract
The invention discloses a kind of preparation method of vertical stratification iii-nitride light emitting devices, utilize polarity processing method, the contact layer for the Ga polarity dangling bonds that full wafer is evenly distributed is formed, low-voltage and the uniform vertical stratification iii-nitride light emitting devices of voltage's distribiuting can be formed after the Ga polarity contact layers plate N electrode.
Description
Technical field
The present invention relates to the making side in semiconductor photoelectric device field, particularly vertical stratification iii-nitride light emitting devices
Method.
Background technology
Now, light emitting diode（Abbreviation LED）, particularly iii-nitride light emitting devices because of its higher luminous efficiency,
General lighting field, which has been obtained, to be widely applied.But, because the homoepitaxy substrate of iii-nitride light emitting devices is expensive
And difficulty is prepared, abnormal epitaxial growth is typically carried out using substrates such as sapphire, silicon, SIC.Outside especially with Sapphire Substrate
The iii-nitride light emitting devices of epitaxial growth, because sapphire is insulator and heat conductivility is poor, when Injection Current is larger, luminous two
The temperature that pole pipe PN junction is produced is difficult to effectively disperse, and causes device to be easily burned, limits powerful light emitting diode
Application.In order to solve the problem of Sapphire Substrate radiating is difficult, p-type gallium nitride is bonded in by general seed collecting substrate desquamation technology
In the metal substrates such as silicon, then Sapphire Substrate is peeled off again, the light emitting diode of vertical stratification is made, utilizes the metal liners such as silicon
The good heat dispersion in bottom, can make high-power light emitting diode.But because of the extension since the substrates such as sapphire, silicon, SiC
When, the interface of substrate and gallium nitride formation is generally N polar surfaces, therefore, easily produced after substrate desquamation N polarity contact surface or
The mixing polar surface that person Ga polarity is mixed with N polarity, in addition, contact surface after substrate desquamation is in ingress of air, Ga polarity it is outstanding
Hang key and also easily combine to form Ga-O keys with the O of air, cause to plate metal electrode and easily produce that voltage is higher or voltage's distribiuting
The voltage of uneven situation, N polarity and Ga-O key ranges is higher, causes chip voltage higher, the problems such as yield is relatively low.
In view of the presence voltage of the vertical stratification iii-nitride light emitting devices of prior art is higher and voltage's distribiuting is uneven
The problem of, therefore have the preparation method that must go out a kind of new vertical stratification iii-nitride light emitting devices.
The content of the invention
It is an object of the invention to：A kind of preparation method of the iii-nitride light emitting devices of vertical stratification is provided, pole is utilized
Property processing method, the contact layer of Ga polarity dangling bonds that full wafer is evenly distributed is formed, after the Ga polarity contact layers plate N electrode
Low-voltage and the uniform vertical stratification iii-nitride light emitting devices of voltage's distribiuting can be formed.
The preparation method for the vertical stratification iii-nitride light emitting devices that the present invention is provided, includes following processing step：
（1）The epitaxial structure of growth nitride light-emitting diode on temporary substrates, the epitaxial structure includes nitride
Cushion, n type gallium nitride, luminescent layer and p-type gallium nitride；
（2）P-type gallium nitride is bonded in permanent substrate, and plates in permanent substrate P electrode；
（3）Temporary substrates are peeled off using lift-off technology, the contact surface of nitride buffer layer is exposed, or, then will stripping
From the epitaxial structure after temporary substrates using dry etching to n type gallium nitride, the contact surface of n type gallium nitride is formed；
（4）The O of the Ga-O keys of exposed contact surface is removed using polarity processing method, gallium is then led to by high/low temperature pulse
Method, N polarity dangling bonds and Ga are bonded and closed, and are formed full wafer and are evenly distributed the contact layers of Ga polarity dangling bonds；
（5）Ensure that sample in the environment that no oxygen is contacted, deposits N electrode, prevents that Ga keys from combining to form with the O in air
Ga-O keys.
Further, the temporary substrates are the suitable extension life such as sapphire, carborundum, silicon, gallium nitride, aluminium nitride, ZnO
Long substrate.
Further, the step（2）It is each for GaAs, Si, Ge, Cu etc. that p-type gallium nitride is bonded in the material of permanent substrate
Plant the metal or Semiconductor substrate for being adapted to bonding, preferably silicon substrate.
Further, the step（3）Laser lift-off technique is selected using substrate desquamation mode.
Further, the step（4）The O of Ga-O keys is removed using polarity processing method, reaction chamber temperature is risen to
800 ~ 2000 degrees Celsius, preferably 1100 degrees Celsius, then the slm of hydrogen 1 ~ 200 is passed through, preferably 10 slm remove the O of Ga-O keys,
Ga polarity dangling bonds are formed, the slm of nitrogen 1 ~ 200, preferably 20 slm are then passed through again, by the foreign gas formed in reative cell
Blow off reative cell, constantly repeats the circulation of the above, and circulating cycle issue is N（N>=1）, preferably 2 times circulations, by the Ga-O of contact surface
Key is removed completely.
Further, the step（4）Gallium method is led to by high/low temperature pulse, N polarity dangling bonds combined with Ga atoms, shape
The contact layer of Ga keys is all into contact surface.First, 500 ~ 800 degrees Celsius of low temperature will be down at a temperature of reative cell, preferably 600 take the photograph
Family name's degree, then, by the TMGA or sccm of TEGA 1 ~ 1000, preferably 50 sccm, makes contact surface deposit one layer of gallium atom, thickness
For 1 ~ 500 nm, preferably 10 nm, then reaction chamber temperature risen to 800 ~ 2000 degrees Celsius, preferably 1100 degrees Celsius, make Ga atoms
GaN is combined to form with the N dangling bonds of contact surface, then, circulation M times above is constantly repeated（M>=1）, preferably M=3 ultimately forms
Full wafer is evenly distributed the contact layers of Ga polarity dangling bonds.
Further, the step（5）It is electron beam evaporation, PECVD, magnetron sputtering etc. to deposit the method for N electrode.
Conventional vertical stratification iii-nitride light emitting devices make the nitride contact of N electrode after laser lift-off substrate
Nitrogen polarity or mixing polar surface is easily presented in face, meanwhile, under air, Ga polarity is hung the nitride contact face exposure after stripping
Key can combine to form Ga-O keys with oxygen atom, cause to occur after the N electrode after having plated that voltage is higher and the uneven shape of voltage
The voltage of condition, N polarity dangling bonds and Ga-O key positions is higher, causes chip yield relatively low.And it is proposed by the present invention a kind of vertical
The preparation method of structure iii-nitride light emitting devices, by polarity processing method, forms the Ga polarity suspension that full wafer is evenly distributed
The contact layer of key, can make low-voltage and the uniform light emitting diode with vertical structure of full wafer voltage's distribiuting.
Brief description of the drawings
Fig. 1 is the epitaxial structure schematic diagram of the present embodiment iii-nitride light emitting devices.
Fig. 2 is the schematic diagram that the present embodiment iii-nitride light emitting devices are bonded P electrode and laser lift-off.
Easily there is the principle schematic of N polar surfaces after laser lift-off for the present embodiment iii-nitride light emitting devices in Fig. 3.
Fig. 4 is the buffer layer contacts face schematic diagram of the present embodiment iii-nitride light emitting devices after laser lift-off.
Fig. 5 is the schematic diagram of the polarity processing method of the present embodiment.
Fig. 6 is that the present embodiment iii-nitride light emitting devices handle the schematic diagram of Ga-O keys in polarity in buffer layer contacts face.
Fig. 7 is schematic diagram of the present embodiment iii-nitride light emitting devices in buffer layer contacts face after polarity processing.
Fig. 8 is that embodiment of the present invention iii-nitride light emitting devices plate N electrode in buffer layer contacts face after polarity processing
Schematic diagram.
Fig. 9 is the vertical stratification iii-nitride light emitting devices voltage Mapping figures of the non-polarity processing of the present embodiment.
Figure 10 is that the vertical stratification iii-nitride light emitting devices voltage Mapping that the present embodiment is handled through polarity schemes.
Illustrate：100：Temporary substrates, 101a：Nitride buffer layer, 101b：Gallium nitride contact after laser lift-off
Layer, 101c：Gallium nitride contact layer after the processing of Ga-O keys, 101d：The contact layer of Ga polarity dangling bonds, 102：N type gallium nitride,
104：MQW MQW luminescent layer, 105：P-type gallium nitride.
Embodiment
The epitaxial structure of the light emitting diode for the vertical stratification that the present embodiment is proposed is as shown in figure 1,100：Temporary substrates,
101a：Nitride buffer layer, 102：N type gallium nitride, 104：MQW MQW luminescent layer, 105：P-type gallium nitride.First, exist
The epitaxial structure of iii-nitride light emitting devices needed for the growth of MOCVD reative cells, then, is bonded in silicon permanent by p-type gallium nitride
On substrate, P electrode is plated, then is peeled off sapphire temporary substrates using laser lift-off technique, exposes nitride buffer layer
The 101a contact layer with N polarity or mixing polarity, as shown in Figure 2.
The outer delay since the substrates such as sapphire, silicon, SiC, its substrate and the interface of nitride buffer layer formation are generally N
Polar surface, as shown in Figure 3.Therefore, substrate easily produces the contact surface or Ga polarity and N polarity of N polarity after laser lift-off
The mixing polar surface of mixing, comes and ingress of air in addition, the gallium nitride contact layer 101b after substrate desquamation is exposed, Ga polarity
Dangling bonds also easily combine to form Ga-O keys with the O of air, as shown in figure 4, causing to plate metal electrode, easily to produce voltage inclined
The voltage of the high or uneven situation of voltage's distribiuting, N polarity and Ga-O key ranges is higher, causes chip voltage higher, yield is inclined
Low problem.
Therefore, the present invention is by polarity processing method, as shown in figure 5, first, the temperature of reative cell is risen into 800 ~ 2000
Degree Celsius, preferably 1100 degrees Celsius, then it is passed through hydrogen H21 ~ 200 slm, preferably 10slm, by the O removals of Ga-O keys, the time is
1 ~ 60 minute, preferably 5 minutes, Ga polarity dangling bonds are formed, 1 ~ 200slm of nitrogen is then passed through again, preferably 20slm is by reative cell
The foreign gas of middle formation is blown off reative cell, then, constantly repeats the circulation of the above, and circulating cycle issue is N（N>=1）, preferably 2
Secondary circulation, the Ga-O keys in nitride contact face are removed completely, so that the gallium nitride contact layer 101c after the processing of Ga-O keys is formed,
As shown in Figure 6.
Then, gallium method is led to by high/low temperature pulse, N polarity dangling bonds is combined with Ga atoms, formed contact surface and be all Ga
The contact layer of key.Specifically include technique：It will be down to 500 ~ 800 degrees Celsius of low temperature at a temperature of reative cell, preferably 600 degrees Celsius,
Then, by TMGA or TEGA 1 ~ 1000 sccm, preferably 50sccm, nitride contact face is made to deposit one layer of gallium atom, thickness
For 1 ~ 500nm, preferably 10nm, then reaction chamber temperature risen to 800 ~ 2000 degrees Celsius, preferably 1100 degrees Celsius, make Ga atoms with
The N dangling bonds of contact surface combine to form GaN, constantly repeat action M times above（M>=1）, preferably M=3 times, ultimately form full wafer point
The contact layer 101d of the uniform Ga polarity dangling bonds of cloth, as shown in Figure 7.
Finally, in the environment that no oxygen is contacted, N electrode is deposited, prevents that Ga keys from combining to form Ga-O with the O in air
Key, the final contact layer 101d using the equally distributed Ga polarity dangling bonds of full wafer is fabricated to low-voltage and voltage's distribiuting is uniform
N electrode, as shown in Figure 8.
The voltage Mapping figures of the vertical structure LED of nonpolarity processing as shown in Figure 9, due to there is Ga polarity and N poles
Property mixing mixing polar surface and Ga-O keys, cause the voltage of whole LED wafer higher, the electricity of N polarity and Ga-O key positions
Pressure is especially high, causes the voltage's distribiuting of whole chip uneven；And use the voltage's distribiuting of the vertical structure LED after polarity processing
As shown in Figure 10, the voltage of whole LED wafer is relatively low and voltage's distribiuting is uniform.
Embodiment of above is merely to illustrate the present invention, and is not intended to limit the present invention, those skilled in the art,
In the case of not departing from the spirit and scope of the present invention, various modifications and variation can be made to the present invention, thus it is all equivalent
Technical scheme fall within scope of the invention, scope of patent protection of the invention should regard Claims scope and limit.
Claims (8)
1. a kind of preparation method of vertical stratification iii-nitride light emitting devices, includes following processing step：
（1）The epitaxial structure of growth nitride light-emitting diode on temporary substrates, the epitaxial structure is buffered including nitride
Layer, n type gallium nitride, luminescent layer and p-type gallium nitride；
（2）P-type gallium nitride is bonded in permanent substrate, and plates in permanent substrate P electrode；
（3）Temporary substrates are peeled off using lift-off technology, the contact surface of nitride buffer layer is exposed, or, then stripping is faced
When substrate after epitaxial structure using dry etching to n type gallium nitride, form the contact surface of n type gallium nitride；
（4）The O of the Ga-O keys of exposed contact surface is removed using polarity processing method, gallium method is then led to by high/low temperature pulse,
N polarity dangling bonds and Ga are bonded and closed, full wafer is formed and is evenly distributed the contact layers of Ga polarity dangling bonds；
（5）In the environment that no oxygen is contacted, N electrode is deposited, prevents that Ga keys from combining to form Ga-O keys with the O in air.
2. a kind of preparation method of vertical stratification iii-nitride light emitting devices according to claim 1, it is characterised in that：Institute
State the substrate that temporary substrates are adapted to epitaxial growth for sapphire, carborundum, silicon, gallium nitride, aluminium nitride, ZnO.
3. a kind of preparation method of vertical stratification iii-nitride light emitting devices according to claim 1, it is characterised in that：Institute
State step（2）P-type gallium nitride is bonded in the metal or semiconductor lining that the material of permanent substrate is adapted to bonding for GaAs, Si, Ge, Cu
Bottom.
4. a kind of preparation method of vertical stratification iii-nitride light emitting devices according to claim 1, it is characterised in that：Institute
State step（3）Laser lift-off technique is selected using substrate desquamation mode.
5. a kind of preparation method of vertical stratification iii-nitride light emitting devices according to claim 1, it is characterised in that：Institute
State step（4）The O of Ga-O keys is removed using polarity processing method, reaction chamber temperature 800 ~ 2000 degrees Celsius are risen to, then lead to
Enter hydrogen to remove the O of Ga-O keys, form Ga dangling bonds, nitrogen is then passed through again the foreign gas formed in reative cell is blown off
Reative cell, repeats the circulation of the above, and circulating cycle issue is N（N>=1）, the Ga-O keys of contact surface are removed completely.
6. a kind of preparation method of vertical stratification iii-nitride light emitting devices according to claim 1, it is characterised in that：Institute
State step（4）Gallium method is led to by high/low temperature pulse, N polarity dangling bonds are combined with Ga atoms, contact surface is formed and is all Ga keys
Contact layer.
7. a kind of preparation method of vertical stratification iii-nitride light emitting devices according to claim 6, it is characterised in that：Institute
Stating the logical gallium method of high/low temperature pulse includes：First, 500 ~ 800 degrees Celsius of low temperature will be down at a temperature of reative cell, then, is passed through
TMGA or TEGA, makes contact surface deposit one layer of gallium atom, thickness is 1 ~ 500 nm, then reaction chamber temperature is risen into 800 ~ 2000 taken the photograph
Family name's degree, makes the N dangling bonds of Ga atoms and contact surface combine to form GaN, ultimately forms full wafer and is evenly distributed Ga polarity dangling bonds
Contact layer.
8. a kind of preparation method of vertical stratification iii-nitride light emitting devices according to claim 1, it is characterised in that：Institute
State step（5）The method for depositing N electrode is electron beam evaporation, PECVD, the method for magnetron sputtering plated electrode.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1363730A (en) * | 2001-12-13 | 2002-08-14 | 南京大学 | Process for controlling polarity of GaN |
| CN1832112A (en) * | 2006-02-24 | 2006-09-13 | 中国科学院上海微***与信息技术研究所 | Method for changing polar of gallium nitride epitaxial layer grown by hydride vapour phase epitaxy method |
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| KR100706952B1 (en) * | 2005-07-22 | 2007-04-12 | 삼성전기주식회사 | VERTICALLY STRUCTURED GaN TYPE LED DEVICE AND METHOD OF MANUFACTURING THE SAME |
| JP2009099798A (en) * | 2007-10-17 | 2009-05-07 | Toshiba Corp | Nitride-based semiconductor, and its manufacturing method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1363730A (en) * | 2001-12-13 | 2002-08-14 | 南京大学 | Process for controlling polarity of GaN |
| CN1832112A (en) * | 2006-02-24 | 2006-09-13 | 中国科学院上海微***与信息技术研究所 | Method for changing polar of gallium nitride epitaxial layer grown by hydride vapour phase epitaxy method |
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