CN105047610B - 一种阵列基板及其制作方法、显示装置 - Google Patents
一种阵列基板及其制作方法、显示装置 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 70
- 238000002360 preparation method Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 claims abstract description 45
- 229910052751 metal Inorganic materials 0.000 claims abstract description 45
- 239000002184 metal Substances 0.000 claims abstract description 45
- 238000000059 patterning Methods 0.000 claims abstract description 18
- 239000010410 layer Substances 0.000 claims description 148
- 229920002120 photoresistant polymer Polymers 0.000 claims description 64
- 239000000203 mixture Substances 0.000 claims description 18
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 12
- 239000011241 protective layer Substances 0.000 claims description 8
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 6
- 238000004380 ashing Methods 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 6
- 229910052738 indium Inorganic materials 0.000 claims description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 6
- 239000011787 zinc oxide Substances 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 5
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims description 3
- 229910001195 gallium oxide Inorganic materials 0.000 claims description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 claims description 3
- 238000009434 installation Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 238000000151 deposition Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000011651 chromium Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- BNEMLSQAJOPTGK-UHFFFAOYSA-N zinc;dioxido(oxo)tin Chemical compound [Zn+2].[O-][Sn]([O-])=O BNEMLSQAJOPTGK-UHFFFAOYSA-N 0.000 description 1
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Abstract
本发明实施例提供了一种阵列基板及其制作方法、显示装置,用以减少阵列基板的构图工艺数量,从而降低阵列基板的生产成本,提高生产效率和设备利用率。所述阵列基板的制作方法包括:在衬底基板上依次形成第一透明导电层和金属层;采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极。
Description
技术领域
本发明涉及显示面板***领域,尤其涉及一种阵列基板及其制作方法、显示装置。
背景技术
平板显示器(Flat Panel Display,FPD)或薄膜太阳能电池等近年来所制造的电气产品都在基板上配置有薄膜晶体管,薄膜晶体管(Thin Film Transistor,TFT)是液晶显示器的关键器件,对显示器件的工作性能具有十分重要的作用。液晶显示器上的每一液晶像素点都是由集成在其后的TFT来驱动,从而可以做到高速度、高亮度、高对比度显示屏幕信息。
近年来低温多晶硅液晶显示技术因多晶硅迁移率高、TFT尺寸可以做小以提高开口率、可驱动集成等优势,被广泛应用,但HADS背板制造工艺通常需要9-13构图工艺,构图工艺数量多,生产成本高。
综上所述,现有技术中的阵列基板的构图工艺数量较多,造成阵列基板的生产效率低,且浪费成本,降低了设备利用率。
发明内容
本发明实施例提供了一种阵列基板及其制作方法、显示装置,用以减少阵列基板的构图工艺数量,从而降低阵列基板的生产成本,提高生产效率和设备利用率。
本发明实施例提供了一种阵列基板的制作方法,该方法包括:
在衬底基板上依次形成第一透明导电层和金属层;
采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极。
通过本发明实施例提供的阵列基板的制作方法,首先在衬底基板上依次形成第一透明导电层,然后在所述第一透明导电层上形成金属层,最后采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极,使得在一次构图工艺中形成栅电极,源电极、漏电极和第一透明电极,因此减少了阵列基板中的构图工艺数量,从而降低阵列基板的生产成本,提高生产效率和设备利用率。
较佳地,所述采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极,包括:
在所述金属层上形成光刻胶层;
对所述光刻胶进行曝光工艺,形成光刻胶不保留区域、光刻胶部分保留区域和光刻胶完全保留区域;
去除不保留区域的光刻胶、金属层和第一透明导电层;
采用灰化工艺去除部分保留区域的光刻胶;
去除部分保留区域的金属层;
去除完全保留区域的光刻胶,形成栅电极、源电极、漏电极和第一透明电极。
较佳地,采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极的同时,还形成了公共电极线。
较佳地,所述在衬底基板上形成第一透明导电层和金属层之前,该方法还包括:
在衬底基板上依次形成有源层和栅绝缘层。
较佳地,所述在形成栅电极、源电极、漏电极和第一透明电极之后,该方法还包括:
形成保护层,其中,所述有源层包括掺杂区域,在所述保护层上与所述有源层掺杂区域、源电极和漏电极对应的位置形成漏出源电极、漏电极和有源层掺杂区域的过孔;
形成第二透明导电层,采用构图工艺形成第二透明电极、源电极与所述有源层掺杂区域的第一连接电极和漏电极与所述有源层掺杂区域的第二连接电极,所述第一连接电极和第二连接电极位于所述过孔中。
较佳地,所述有源层为低温多晶硅,所述掺杂区域为N型掺杂。
较佳地,所述第二透明电极为狭缝状电极。
较佳地,所述第一透明电极和/或所述第二透明电极的材料为铟锡氧化物、铟锡氧化物、铟镓锌氧化物、铟锡锌氧化物、锡锌氧化物、镓锌氧化物、铟镓氧化物。
本发明实施例提供了一种阵列基板,采用本发明提供的阵列基板的制作方法形成。
本发明实施例提供了一种显示装置,包括本发明提供的阵列基板。
附图说明
图1为本发明实施例提供的阵列基板的制作方法的流程示意图;
图2为本发明实施例提供的阵列基板的制作方法的结构示意图之一;
图3为本发明实施例提供的阵列基板的制作方法的结构示意图之二;
图4为本发明实施例提供的阵列基板的制作方法的结构示意图之三;
图5为本发明实施例提供的阵列基板的制作方法的结构示意图之四;
图6为本发明实施例提供的阵列基板的制作方法的结构示意图之五;
图7为本发明实施例提供的阵列基板的制作方法的结构示意图之六;
图8为本发明实施例提供的阵列基板的制作方法的结构示意图之七;
图9为本发明实施例提供的阵列基板的制作方法的结构示意图之八;
图10为本发明实施例提供的阵列基板的制作方法的结构示意图之九。
具体实施方式
为了使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明作进一步地详细描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
本发明实施例提供了一种阵列基板及其制作方法、显示装置,用以减少阵列基板的构图工艺数量,从而降低阵列基板的生产成本,提高生产效率和设备利用率。
下面结合附图,对本发明实施例提供的阵列基板及其制作方法、显示装置的具体实施方式进行详细地说明。
附图中各膜层的厚度和区域的大小形状不反映阵列基板各部件的真实比例,目的只是示意说明本发明内容。
实施例1
参见图1,本发明实施例提供的一种阵列基板的制作方法,该方法包括:
S101、在衬底基板上依次形成第一透明导电层和金属层;
S102、采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极。
需要说明的是第一透明电极为公共电极。本发明实施例中的构图工艺包括步骤:曝光、显影。
其中,在步骤S101中,在衬底基板上依次形成第一透明导电层和金属层之前,该方法还包括:
在衬底基板上依次形成有源层和栅绝缘层。
也就是说,在衬底基板上依次形成有源层、栅绝缘层、第一透明导电层和金属层。
其中,在步骤S102中,采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极,具体包括:
在金属层上形成光刻胶层;
对该光刻胶层进行曝光工艺,形成光刻胶不保留区域、光刻胶部分保留区域和光刻胶完全保留区域;
去除不保留区域的光刻胶、金属层和第一透明导电层;
采用灰化工艺去除部分保留区域的光刻胶;
去除部分保留区域的金属层;
去除完全保留区域的光刻胶,形成栅电极、源电极、漏电极和第一透明电极。
其中,在形成栅电极、源电极、漏电极和第一透明电极之后,该方法还包括:
形成保护层,其中有源层包括掺杂区域,在保护层上与有源层掺杂区域、源电极和漏电极对应的位置分别形成露出有源层掺杂区域、源电极和漏电极过孔;
形成第二透明导电层,采用构图工艺形成第二透明电极、源电极与有源层掺杂区域的第一连接电极、和漏电极与有源层掺杂区域的第二连接电极,第一连接电极和第二连接电极位于过孔中。
需要说明的是,在保护层上形成与有源层掺杂区域对应位置露出有源层掺杂区域的第一过孔,同时形成与源电极对应的位置露出源电极的第二过孔,形成漏电极对应的位置露出漏电极的第二过孔;在第二透明导电层中通过第一过孔和第二过孔对应的位置处形成源电极与有源层掺杂区域的第一连接电极,通过第一过孔和第三过孔对应的位置处形成漏电极与有源层掺杂区域的第二连接电极。所以,有源层掺杂区域通过第一连接电极与源极相连,通过第二连接电极与漏极相连。
其中,有源层为低温多晶硅P-si,掺杂区域为N型掺杂。
其中,第二透明电极为狭缝状电极。
其中,去除完全保留区域的光刻胶,形成栅电极、源电极、漏电极和第一透明电极,具体包括:
在完全保留区域中,首先去除用于形成源电极和漏电极金属层上的的光刻胶,使漏极层、源极层露出,形成漏电极和源电极;
其次,去除用于形成栅电极金属层上的光刻胶,使栅极层露出,形成栅电极;
最后去除用于形成第一透明电极的光刻胶,使完全保留区域中的所有金属均露出,形成第一透明电极;或者,
在完全保留区域中,首先去除用于形成栅电极金属层上的光刻胶,使栅极层露出,形成栅电极;
其次,去除用于形成源电极和漏电极金属层上的的光刻胶,使漏极层、源极层露出,形成漏电极和源电极;
最后去除用于形成第一透明电极的光刻胶,使完全保留区域中的所有金属均露出,形成第一透明电极;或者,
在完全保留区域中,首先去除用于形成第一透明电极的光刻胶,形成第一透明电极;
其次,去除用于形成源电极和漏电极金属层上的的光刻胶,使漏极层、源极层露出,形成漏电极和源电极;
最后,去除用于形成栅电极金属层上的光刻胶,使栅极层露出,形成栅电极。
需要说明的是,在去除完全保留区域中的光刻胶时,先去除覆盖用于形成漏电极和源电极的金属层上的光刻胶,使漏极层和源极层先露出;或者,先去除覆盖在用于形成栅电极的金属层上的光刻胶,使栅极层先露出;或者先去除覆盖在用于形成第一透明电极的第一透明导电层上的金属层的光刻胶,使金属层露出。从而形成栅电极、漏电极、源电极和第一透明电极。因此降低了阵列基板的生产成本,提高了生产效率。
需要强调的是,若根据工艺需要,也可以将栅电极、源、漏电极、以及用于形成第一透明电极的第一透明导电层上的金属层同时露出。
其中,第一透明电极和/或第二透明电极包含如下材料之一或组合:铟锌氧化物IZO、铟锡氧化物ITO、铟镓锌氧化物IGZO、铟锡锌氧化物ITZO、锡锌氧化物TZO、镓锌氧化物GZO、铟镓氧化物IGO。
需要说明的是,本发明实施例提供的第一透明电极和第二透明电极,可以为上述氧化物中的一种,或者为上述氧化物中的任意几种的混合物。本发明实施例不做具体限定。本发明实施例中的金属层的材料包含如下材料之一或组合:钼Mo、铬Cr、钛Ti、钽Ta、铜Cu、金Au、铝Al、银Ag、钨W。
需要说明的是,本发明实施例中提供的金属材料可以为上述材料中的一种,或者为由其中的几种组成的混合物,本发明实施例不做具体限定。
其中,可以通过双色调掩膜或三色调掩膜,以及涂布、曝光、显影制作覆盖栅电极、源电极、漏电极以及第一透明导电层层上的金属层上的光刻胶。
为了更加清楚明了地介绍该阵列基板的制作方法,可以结合附图进行详细说明。
本发明实施例提供的阵列基板的制作方法,包括:
步骤一,参见图2,在衬底基板21以及该衬底基板的遮光层211上沉积一层缓冲层22,且在该缓冲层22上沉积一层有源层23,在有源层23上沉积一层栅绝缘层24;
步骤二,参见图3,在图2的栅绝缘层24上沉积一层第一透明导电层(TCO)25,其中该第一透明导电层25包括:位于衬底基板21透明区域用于形成公共电极层251的透明导电层;
步骤三,参见图4,在图3中的第一透明导电层25上沉积金属层26;
步骤四,参见图5,在图4中的金属层26上形成光刻胶层27,并对该光刻胶层进行曝光工艺,形成光刻胶不保留区域271、光刻胶部分保留区域272和光刻胶完全保留区域273;
步骤五,参见图6,去除不保留区域271的光刻胶,和该不保留区域271的光刻胶下面的金属层和第一透明导电层,同时重掺杂有源层23形成掺杂区域231;
步骤六,参见图7,采用灰化工艺去除部分保留区域272的光刻胶,以及该部分保留区域272的金属层;
步骤七,参见图8,去除完全保留区域273的光刻胶,形成栅电极261、源电极262、漏电极263和第一透明电极251。
步骤八,参见图9,形成保护层28,同时形成连接有源层掺杂区域231与源电极262的过孔281,以及形成用以连接有源层的掺杂区域231与漏电极263的过孔282;其中,过孔281包括位于源电极262上方的第二过孔2811,和位于掺杂区域231上方的第一过孔2812,过孔282包括位于漏电极263上方的第三过孔2821,和位于掺杂区域231上方的第四过孔2822;
步骤九,参见图10,形成第二透明导电层,采用构图工艺形成第二透明电极291、源电极与有源层掺杂区域231的第一连接电极292、和漏电极与有源层掺杂区域231的第二连接电极293。
综上,通过本发明实施例提供的阵列基板的制作方法,首先第一构图工艺为有源层和栅绝缘层,第二构图工艺为:在栅绝缘层上形成一层第一透明导电层TCO;然后在该第一透明导电层上形成金属层;在该金属层上形成光刻胶层,然后对该光刻胶层进行曝光工艺,形成光刻胶不保留区域、光刻胶部分保留区域和光刻胶完全保留区域;去除不保留区域的光刻胶、金属层和第一透明导电层;采用灰化工艺去除部分保留区域的光刻胶和金属层,其次去除完全保留区域的光刻胶,形成栅电极、源电极、漏电极和第一透明电极,从而在一次构图工艺中形成了栅电极、源电极、漏电极和公共电极层,第三构图工艺为:在该第二构图工艺上形成的保护层,第四构图工艺为在该第三构图工艺上形成的第二透明电极和连接电极。从而使得本发明实施例提供的阵列基板共有四层构图工艺,从而减少了阵列基板的构图工艺数量,并且降低了阵列基板的生产成本,提高了生产效率,以及设备利用率。
本发明实施例提供了一种阵列基板,采用本发明实施例提供的阵列基板的制作方法形成。
本发明实施例提供了一种显示装置,包括本发明实施例提供的阵列基板。
综上所述,本发明实施例提供的阵列基板的制作方法,在栅绝缘层上形成一层第一透明导电层TCO;然后在该第一透明导电层上形成金属层;在该金属层上形成光刻胶层,然后对该光刻胶层进行曝光工艺,形成光刻胶不保留区域、光刻胶部分保留区域和光刻胶完全保留区域;去除不保留区域的光刻胶、金属层和第一透明导电层;采用灰化工艺去除部分保留区域的光刻胶和金属层,其次去除完全保留区域的光刻胶,形成栅电极、源电极、漏电极和第一透明电极,从而使得在一次构图工艺中形成了栅电极、源电极、漏电极和第一透明电极。因此,通过本发明实施例提供的阵列基板的制作方法,减少了阵列基板的构图工艺数量,降低了阵列基板的生产成本,提高了生产效率,以及设备利用率。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (8)
1.一种阵列基板的制作方法,其特征在于,该方法包括:
在衬底基板上依次形成第一透明导电层和金属层;
采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极;
其中,所述第一透明电极为公共电极;
其中,所述在衬底基板上形成第一透明导电层和金属层之前,该方法还包括:
在衬底基板上依次形成有源层和栅绝缘层;
在形成栅电极、源电极、漏电极和第一透明电极之后,该方法还包括:
形成保护层,其中,所述有源层包括掺杂区域,在所述保护层上与所述有源层掺杂区域、源电极和漏电极对应的位置形成露出有源层掺杂区域、源电极和漏电极的过孔;
形成第二透明导电层,采用构图工艺形成第二透明电极、源电极与所述有源层掺杂区域的第一连接电极、和漏电极与所述有源层掺杂区域的第二连接电极,所述第一连接电极和第二连接电极位于所述过孔中。
2.根据权利要求1所述的制作方法,其特征在于,所述采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极,包括:
在所述金属层上形成光刻胶层;
对所述光刻胶层进行曝光工艺,形成光刻胶不保留区域、光刻胶部分保留区域和光刻胶完全保留区域;
去除不保留区域的光刻胶、金属层和第一透明导电层;
采用灰化工艺去除部分保留区域的光刻胶;
去除部分保留区域的金属层;
去除完全保留区域的光刻胶,形成栅电极、源电极、漏电极和第一透明电极。
3.根据权利要求1所述的制作方法,其特征在于,采用一次构图工艺形成栅电极、源电极、漏电极和第一透明电极的同时,还形成了公共电极线。
4.根据权利要求1所述的制作方法,其特征在于,所述有源层为低温多晶硅,所述掺杂区域为N型掺杂。
5.根据权利要求1所述的制作方法,其特征在于,所述第二透明电极为狭缝状电极。
6.根据权利要求1所述的制作方法,其特征在于,所述第一透明电极和/或所述第二透明电极的材料为铟锡氧化物、铟镓锌氧化物、铟锡锌氧化物、锡锌氧化物、镓锌氧化物、铟镓氧化物。
7.一种阵列基板,其特征在于,采用权利要求1-6任一项所述的制作方法形成。
8.一种显示装置,其特征在于,包括权利要求7所述的阵列基板。
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2015
- 2015-09-07 CN CN201510564851.3A patent/CN105047610B/zh active Active
-
2016
- 2016-02-24 US US15/306,550 patent/US10181482B2/en not_active Expired - Fee Related
- 2016-02-24 EP EP16784366.3A patent/EP3349242B1/en active Active
- 2016-02-24 WO PCT/CN2016/074427 patent/WO2017041447A1/zh active Application Filing
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CN104637955A (zh) * | 2015-01-30 | 2015-05-20 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
Also Published As
Publication number | Publication date |
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CN105047610A (zh) | 2015-11-11 |
US10181482B2 (en) | 2019-01-15 |
EP3349242A1 (en) | 2018-07-18 |
EP3349242A4 (en) | 2019-04-24 |
US20170271373A1 (en) | 2017-09-21 |
EP3349242B1 (en) | 2021-10-27 |
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