CN104994390A - Embedded video processor, embedded video processing system and embedded video processor construction method - Google Patents
Embedded video processor, embedded video processing system and embedded video processor construction method Download PDFInfo
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- CN104994390A CN104994390A CN201510372238.1A CN201510372238A CN104994390A CN 104994390 A CN104994390 A CN 104994390A CN 201510372238 A CN201510372238 A CN 201510372238A CN 104994390 A CN104994390 A CN 104994390A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/80—Generation or processing of content or additional data by content creator independently of the distribution process; Content per se
- H04N21/81—Monomedia components thereof
- H04N21/8166—Monomedia components thereof involving executable data, e.g. software
- H04N21/8193—Monomedia components thereof involving executable data, e.g. software dedicated tools, e.g. video decoder software or IPMP tool
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Abstract
The application discloses an embedded video processor, an embedded video processing system and an embedded video processor construction method. The construction method comprises the following steps: redefining a hardware codec with a target description way to obtain a customized video codec; and registering the customized video codec into FFmepg (Fast Forward Mpeg) with an encoder registration tool to obtain the embedded video processor. Through the application, a process of organically integrating the hardware codec into the FFmpeg is finished, so that the hardware codec integrated into the FFmpeg can acquire video data transmitted by the FFmepg and perform hardware encoding processing on the video data when the FFmepg receive the video data. When the hardware codec is used for performing video encoding, operation resources inside the hardware codec are mainly consumed, so that CPU (Central Processing Unit) operation resource consumption caused by video data encoding processing is lowered.
Description
Technical field
The present invention relates to multi-media processing technical field, particularly a kind of embedded video processor, system and construction method.
Background technology
Current, when carrying out the exploitation of video items in embedded-development environment, FFmpeg (FFmpeg, i.e. Fast Forward Mpeg) can be adopted original coding video data, to realize the compression to video data.
Existing FFmpeg, when to coding video data, needs to utilize the calculation resources of CPU to encode.But, due in embedded-development environment, the calculation resources of CPU is very limited, so, FFmpeg is when carrying out the video data encoding process that need consume a large amount of budget resources, most CPU calculation resources in embedded-development environment can be taken, thus have impact on the performance of other functional modules in embedded-development environment.
Can find out in sum, when carrying out the coded treatment of video data in embedded-development environment, how reducing the CPU calculation resources consumption caused due to video data encoding process is current problem demanding prompt solution.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of embedded video processor, system and construction method, when achieving the coded treatment carrying out video data in embedded-development environment, reduce the object that the CPU calculation resources that causes due to video data encoding process consumes.Its concrete scheme is as follows:
A construction method for embedded video processor, comprising:
Utilize goal description mode, hardware compression device is redefined, obtain self-defining Video Codec; Wherein, described goal description mode is, the describing mode consistent with the description of FFmpeg to codec;
Utilize encoder registration tool, described self-defining Video Codec is registered in described FFmpeg, to obtain described embedded video processor;
Wherein, described the process that described self-defining Video Codec is registered in described FFmpeg to be comprised, described self-defining Video Codec is added in the Video Codec chain of described FFmpeg.
Preferably, describedly utilize goal description mode, redefine hardware compression device, the process obtaining self-defining Video Codec comprises:
Utilize described goal description mode, VPU hardware compression device is redefined, obtain described self-defining Video Codec.
Preferably, describedly utilize encoder registration tool, the process that described self-defining Video Codec is registered in described FFmpeg comprised:
Utilize REGISTER_ENCDEC (X, x) function, described self-defining Video Codec is registered in described FFmpeg.
The invention also discloses a kind of embedded video processor, by utilizing described construction method to build, being applied to embedded video treatment system, comprising:
For obtaining the FFmpeg of the video data that video collector collects;
For obtaining the described video data that described FFmpeg sends, hardware encoding process being carried out to described video data, obtains corresponding video codeword data stream, and described video codeword data stream is sent to the hardware compression device of described FFmpeg.
Preferably, described video collector is the video collector of building based on V4L2 framework.
Preferably, described hardware compression device is VPU hardware compression device.
Preferably, the video format of described video codeword data stream is H.264 form.
The invention also discloses a kind of embedded video treatment system, comprise described embedded video processor, also comprise:
For generating the client of Streaming Media request;
For obtaining the described video codeword data stream that described FFmpeg sends, and after the described Streaming Media request receiving the transmission of described client, described video codeword data stream is sent to the FFserver of described client.
Preferably, described client is VLC client.
Preferably, described system also comprises:
For obtaining and storing the data buffer of described video codeword data stream that described FFserver sends.
In the present invention, by redefining hardware compression device, obtain self-defining Video Codec, make the describing mode of this Video Codec be consistent with the describing mode of FFmpeg to codec, this has laid crucial basis for follow-up being added to by self-defining Video Codec in the Video Codec chain of FFmpeg; Then encoder registration tool is utilized, above-mentioned self-defining Video Codec is registered in FFmpeg, also add in the Video Codec chain of FFmpeg by self-defining Video Codec, this completes process hardware compression device being organically integrated into FFmpeg.Like this, when FFmpeg receives video data, the hardware compression device being integrated into FFmpeg just can obtain the video data of FFmpeg transmission, then hardware encoding process is carried out to this video data, due to hardware compression device when carrying out Video coding, main consumption be the calculation resources of hardware compression device inside, thus reduce the CPU calculation resources consumption because video data encoding process causes.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments of the invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to the accompanying drawing provided.
The construction method flow chart of Fig. 1 a kind of embedded video processor disclosed in the embodiment of the present invention;
Fig. 2 is a kind of embedded video processor structure schematic diagram disclosed in the embodiment of the present invention;
Fig. 3 is a kind of embedded video treatment system structural representation disclosed in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the invention discloses a kind of construction method of embedded video processor, shown in Figure 1, the method comprises:
Step S101: utilize goal description mode, redefines hardware compression device, obtains self-defining Video Codec; Wherein, goal description mode is, the describing mode consistent with the description of FFmpeg to codec.
Concrete, above-mentionedly utilize goal description mode, hardware compression device is redefined, the process obtaining self-defining Video Codec can comprise, utilize goal description mode, to VPU hardware compression device (VPU, i.e. Video Processing Unit, video processing unit) redefine, obtain self-defining Video Codec.
Step S102: utilize encoder registration tool, is registered in FFmpeg by self-defining Video Codec, to obtain embedded video processor; Wherein, the process that self-defining Video Codec is registered in FFmpeg is comprised, self-defining Video Codec is added in the Video Codec chain of FFmpeg.
Concrete, above-mentionedly utilize encoder registration tool, the process be registered to by self-defining Video Codec in FFmpeg can comprise, utilize REGISTER_ENCDEC (X, x) function, self-defining Video Codec is registered in FFmpeg, that is to say and self-defining Video Codec is added in the Video Codec chain of FFmpeg, thus complete process hardware compression device being organically integrated into FFmpeg.
In the embodiment of the present invention, by redefining hardware compression device, obtain self-defining Video Codec, make the describing mode of this Video Codec be consistent with the describing mode of FFmpeg to codec, this has laid crucial basis for follow-up being added to by self-defining Video Codec in the Video Codec chain of FFmpeg; Then encoder registration tool is utilized, above-mentioned self-defining Video Codec is registered in FFmpeg, also add in the Video Codec chain of FFmpeg by self-defining Video Codec, this completes process hardware compression device being organically integrated into FFmpeg.Like this, when FFmpeg receives video data, the hardware compression device being integrated into FFmpeg just can obtain the video data of FFmpeg transmission, then hardware encoding process is carried out to this video data, due to hardware compression device when carrying out Video coding, main consumption be the calculation resources of hardware compression device inside, thus reduce the CPU calculation resources consumption because video data encoding process causes.
The embodiment of the invention also discloses a kind of embedded video processor, this processor is undertaken building by the construction method in a upper embodiment, and be applied to embedded video treatment system, shown in Figure 2, this processor comprises:
For obtaining the FFmpeg11 of the video data that video collector collects;
For obtaining the video data that FFmpeg11 sends, hardware encoding process being carried out to video data, obtains corresponding video codeword data stream, and video codeword data stream being sent to the hardware compression device 12 of FFmpeg11.
Wherein, preferred video collector is the video collector of building based on V4L2 framework (V4L2, i.e. Video 4Linux 2), can realize the collection to video data, and V4L2 is a kind of programming framework being applied to linux system.In addition, preferred hardware compression device 12 is VPU hardware compression device, and wherein, video data encoding can be become the bit stream data of H.246 form by VPU hardware compression device, and is H.264 a kind of compression of digital video form that can realize high compression.Accordingly, the video format of above-mentioned video codeword data stream is H.264 form.
In the embodiment of the present invention, when FFmpeg11 receives video data, the hardware compression device 12 being integrated into FFmpeg11 just can obtain the video data of FFmpeg11 transmission, then hardware encoding process is carried out to this video data, due to hardware compression device 12 when carrying out Video coding, main consumption be the calculation resources of hardware compression device 12 inside, thus reduce the CPU calculation resources consumption because video data encoding process causes.
The embodiment of the invention also discloses a kind of embedded video treatment system, shown in Figure 3, this system comprises:
For obtaining the FFmpeg11 of the video data that video collector collects;
For obtaining the video data that FFmpeg11 sends, hardware encoding process being carried out to video data, obtains corresponding video codeword data stream, and video codeword data stream being sent to the hardware compression device 12 of FFmpeg11;
For generating the client 13 of Streaming Media request;
For obtaining the video codeword data stream that FFmpeg11 sends, and after the Streaming Media request receiving client 13 transmission, video codeword data stream is sent to the FFserver14 of client 13.
Wherein, FFserver14 is that one can respond in streaming media request, and video codeword data stream is sent to the server of client 13.
In the present embodiment, preferred video collector is the video collector of building based on V4L2 framework, can realize the collection to video data.In addition, preferred hardware compression device 12 is VPU hardware compression device, and wherein, video data encoding can be become the bit stream data of H.246 form by VPU hardware compression device.Accordingly, the video format of above-mentioned video codeword data stream is H.264 form.
Preferred client 13 is VLC client (VLC, i.e. Video Lan Client, VideoLAN Client), VLC client can send Streaming Media request to FFserver14, as RTSP asks (RTSP, i.e. Real Time Streaming Protocol, real time streaming transport protocol), to obtain the video codeword data stream that FFserver14 returns.
Said system can also comprise, for obtaining and storing the data buffer of video codeword data stream that FFserver14 sends.Preserve a cache file in this data buffer, realize the storage to video codeword data stream by this cache file.Under normal circumstances, if client 13 does not initiate Streaming Media request to FFserver14, FFserver14 can be cached to the video codeword data stream that FFmpeg11 sends in above-mentioned cache file.
In the embodiment of the present invention, when FFmpeg receives video data, the hardware compression device being integrated into FFmpeg just can obtain the video data of FFmpeg transmission, then hardware encoding process is carried out to this video data, due to hardware compression device when carrying out Video coding, main consumption be the calculation resources of hardware compression device inside, thus reduce the CPU calculation resources consumption because video data encoding process causes.
Finally, also it should be noted that, in this article, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment comprising described key element and also there is other identical element.
Above a kind of embedded video processor provided by the present invention, system and construction method are described in detail, apply specific case herein to set forth principle of the present invention and execution mode, the explanation of above embodiment just understands method of the present invention and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (10)
1. a construction method for embedded video processor, is characterized in that, comprising:
Utilize goal description mode, hardware compression device is redefined, obtain self-defining Video Codec; Wherein, described goal description mode is, the describing mode consistent with the description of FFmpeg to codec;
Utilize encoder registration tool, described self-defining Video Codec is registered in described FFmpeg, to obtain described embedded video processor;
Wherein, described the process that described self-defining Video Codec is registered in described FFmpeg to be comprised, described self-defining Video Codec is added in the Video Codec chain of described FFmpeg.
2. the construction method of embedded video processor according to claim 1, is characterized in that, describedly utilizes goal description mode, and redefine hardware compression device, the process obtaining self-defining Video Codec comprises:
Utilize described goal description mode, VPU hardware compression device is redefined, obtain described self-defining Video Codec.
3. the construction method of embedded video processor according to claim 2, is characterized in that, describedly utilizes encoder registration tool, the process that described self-defining Video Codec is registered in described FFmpeg is comprised:
Utilize REGISTER_ENCDEC (X, x) function, described self-defining Video Codec is registered in described FFmpeg.
4. an embedded video processor, is characterized in that, by utilizing the construction method as described in any one of claims 1 to 3 to build, being applied to embedded video treatment system, comprising:
For obtaining the FFmpeg of the video data that video collector collects;
For obtaining the described video data that described FFmpeg sends, hardware encoding process being carried out to described video data, obtains corresponding video codeword data stream, and described video codeword data stream is sent to the hardware compression device of described FFmpeg.
5. embedded video processor according to claim 4, is characterized in that, described video collector is the video collector of building based on V4L2 framework.
6. embedded video processor according to claim 5, is characterized in that, described hardware compression device is VPU hardware compression device.
7. embedded video processor according to claim 6, is characterized in that, the video format of described video codeword data stream is H.264 form.
8. an embedded video treatment system, is characterized in that, comprises the embedded video processor as described in any one of claim 4 to 7, also comprises:
For generating the client of Streaming Media request;
For obtaining the described video codeword data stream that described FFmpeg sends, and after the described Streaming Media request receiving the transmission of described client, described video codeword data stream is sent to the FFserver of described client.
9. embedded video treatment system according to claim 8, is characterized in that, described client is VLC client.
10. embedded video treatment system according to claim 9, is characterized in that, also comprise:
For obtaining and storing the data buffer of described video codeword data stream that described FFserver sends.
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| CN116828243A (en) * | 2023-06-05 | 2023-09-29 | 启朔(深圳)科技有限公司 | Hardware encoding and decoding method, mobile terminal, computer device and storage medium |
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| CN109274973A (en) * | 2018-09-26 | 2019-01-25 | 江苏航天大为科技股份有限公司 | Fast video coding/decoding method on embedded-type ARM platform |
| CN116828243A (en) * | 2023-06-05 | 2023-09-29 | 启朔(深圳)科技有限公司 | Hardware encoding and decoding method, mobile terminal, computer device and storage medium |
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