CN104992947B - 一种氧化物半导体tft阵列基板及其制备方法 - Google Patents
一种氧化物半导体tft阵列基板及其制备方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 107
- 239000000758 substrate Substances 0.000 title claims abstract description 43
- 238000002360 preparation method Methods 0.000 title claims abstract description 38
- 238000000034 method Methods 0.000 claims abstract description 53
- 238000000059 patterning Methods 0.000 claims abstract description 38
- 238000004062 sedimentation Methods 0.000 claims abstract description 22
- 239000002184 metal Substances 0.000 claims description 61
- 238000005530 etching Methods 0.000 claims description 37
- 229920002120 photoresistant polymer Polymers 0.000 claims description 17
- 230000004888 barrier function Effects 0.000 claims description 9
- 238000004380 ashing Methods 0.000 claims description 4
- 238000003384 imaging method Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 10
- 230000015572 biosynthetic process Effects 0.000 abstract description 7
- 238000009413 insulation Methods 0.000 description 11
- 239000004020 conductor Substances 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 230000000717 retained effect Effects 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 150000002927 oxygen compounds Chemical class 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000009738 saturating Methods 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
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Abstract
本发明涉及显示器设计领域,公开了一种氧化物半导体TFT阵列基板及其制备方法。该方法包括:在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层,和通过一次构图工艺形成有源层图形和透明导电层的图形。该方法避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信赖度下降,且透明导电层与氧化物半导体有源层直接接触,降低了接触电阻,从而提高了氧化物半导体有源层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
Description
技术领域
本发明涉及显示器设计领域,特别涉及一种氧化物半导体TFT阵列基板及其制备方法。
背景技术
TFT(Thin-Film-Transistor,薄膜晶体管)是液晶显示装置中的重要组成部分。目前,在TFT技术中,有源层多采用非晶硅(a-Si)和多晶硅(p-Si)等半导体材料。随着显示技术的发展,对显示面板的大尺寸化和高分辨率的要求越来越高。非晶硅材料由于其迁移率较低(0.5~0.8cm2/V·s),在大尺寸、高分辨率、高响应速度的面板上使用时越来越受到限制。多晶硅材料虽然迁移率很高(>10cm2/V·s),但是由于多晶硅制造显示面板工艺复杂,且制造大尺寸面板工艺不成熟,限制了其在大尺寸、高分辨率显示面板中的使用。氧化物半导体迁移率较高(>10cm2/V·s),且适合制造大尺寸显示面板,具有良好的应用发展前景。
现有的氧化物半导体TFT阵列基板在制造中,因受现有工艺影响,氧化物半导体层会长时间暴露在环境中,降低了其导电性能,且氧化物半导体层与源漏极之间的接触电阻较大,导致其显示装置的驱动电压较高、功耗较高,同时降低了产品的使用稳定性。
发明内容
本发明提供了一种氧化物半导体TFT阵列基板及其制备方法,该制备方法避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信耐度下降,且降低了氧化物半导体层与源漏极之间的接触电阻,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
为实现上述目的,本发明提供如下的技术方案:
一种氧化物半导体TFT阵列基板的制备方法,包括:
在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层;
通过一次构图工艺形成有源层图形和透明导电层的图形。
采用上述制备方法制备氧化物半导体TFT阵列基板时,氧化物半导体有源层和透明导电层在不破坏真空条件下依次形成,因此,透明导电层能够对氧化物半导体有源层进行保护,避免了氧化物半导体长时间暴露在环境中导致的器件信耐度下降,且透明导电层与氧化物半导体有源层直接接触,降低了接触电阻,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
优选地,在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层之前还包括:
在衬底基板上形成栅金属层,并通过一次构图工艺形成栅极的图形。
优选地,在通过一次构图工艺形成有源层图形和透明导电层的图形之后还包括:
形成栅金属层,并通过一次构图工艺形成栅极的图形。
优选地,在不破真空条件下连续沉积氧化物半导体有源层及透明导电层之后、且在通过一次构图工艺形成有源层图形和透明导电层的图形之前还包括:
在透明导电层上形成源漏金属层;
优选地,通过一次构图工艺形成有源层图形和透明导电层的图形具体包括:
通过一次构图工艺形成源漏电极的图形、透明导电层的图形以及有源层的图形。
优选地,上述通过一次构图工艺形成源漏电极的图形、透明导电层的图形以及有源层的图形,具体包括:
在源漏金属层上形成光刻胶层;
采用半色调掩膜板对光刻胶层进行曝光并显影;
通过刻蚀工艺保留源漏金属层用于形成源漏电极的区域和源漏金属层处于像素单元有效显示区域内的部位;
对曝光显影后剩余的光刻胶层进行灰化工艺,以露出源漏金属层中用于形成沟道的区域;
采用刻蚀工艺对源漏金属层露出的部位进行刻蚀,形成沟道;
并沿所述透明导电层的厚度方向对沟道区域内的透明导电层进行部分刻蚀;
对剩余的光刻胶层进行二次灰化,将源漏金属层中处于用于与数据线连接的漏电极的部位以外的区域露出;
采用刻蚀工艺去除源漏金属层中用于与数据线连接的漏电极的部位以外的区域;
采用刻蚀工艺将沟道内剩余的透明导电层刻蚀去除。
优选地,在通过一次构图工艺形成有源层图形和透明导电层的图形之后还包括:
在透明导电层上形成源漏金属层;
通过一次构图工艺形成源漏电极的图形。
优选地,在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层之前,还包括:
在衬底基板上形成源漏金属层;
通过一次构图工艺形成源漏电极的图形。
本发明还提供了一种通过上述技术方案中提供的制备方法制备的氧化物半导体TFT阵列基板,该氧化物半导体TFT阵列基板包括衬底基板、氧化物半导体有源层、用于形成像素电极的透明导电层,其中,所述氧化物半导体有源层和所述透明导电层为在不破坏真空条件下连续沉积形成的氧化物半导体有源层和透明导电层。
该氧化物半导体TFT阵列基板中像素电极由透明导电层形成,且与氧化物半导体有源层直接接触,降低了氧化物半导体有源层与像素电极之间的接触电阻,从而提高了氧化物半导体层的导通电流;且由于省去了原源电极区域的不透光金属层,增加了像素单元的开口率,从而提高了该阵列基板的显示面板的显示亮度,进而降低了其显示装置的驱动电压和功耗、提高了产品使用稳定性。
附图说明
图1是本发明提供的氧化物半导体TFT阵列基板的制备方法;
图2是本发明第一种优选实施方式中实施方式一的氧化物半导体TFT阵列基板的制备方法流程图;
图2a是在衬底基板上形成栅极图形后沉积栅绝缘层、氧化物半导体有源层、透明导电层、源漏金属层后的阵列基板结构截面示意图;
图2b通过刻蚀工艺保留源漏金属层用于形成源漏电极的区域和源漏金属层处于像素单元有效显示区域内的部位后的阵列基板结构截面示意图;
图2c是采用刻蚀工艺对源漏金属层中用于形成沟道的部位进行刻蚀后的阵列基板结构截面示意图;
图2d是沿透明导电层的厚度方向对沟道区域内的透明导电层进行部分刻蚀后的阵列基板结构截面示意图;
图2e是采用刻蚀工艺去除源漏金属层中用于与数据线连接的漏电极的部位以外的区域后的阵列基板结构截面示意图;
图2f是采用刻蚀工艺将沟道内剩余的透明导电层刻蚀去除后的阵列基板结构截面示意图;
图3是本发明第一种优选实施方式中实施方式二的氧化物半导体TFT阵列基板的制备方法流程图;
图3a是在衬底基板上形成栅极图形后沉积栅绝缘层、氧化物半导体有源层、透明导电层后的阵列基板结构截面示意图;
图3b是通过一次构图工艺形成有源层图形和透明导电层的图形后的阵列基板结构截面示意图;
图3c是在透明导电层上形成源漏金属层并通过一次构图工艺形成源漏电极的图形后的阵列基板结构截面示意图;
图4是本发明第二种优选实施方式中实施方式一的氧化物半导体TFT阵列基板的制备方法流程图;
图5是本发明第二种优选实施方式中实施方式二的氧化物半导体TFT阵列基板的制备方法流程图;
图6是本发明第二种优选实施方式中实施方式二的一种优选实施方式中的氧化物半导体TFT阵列基板的制备方法流程图。
附图标记:
101,衬底基板; 102,栅极; 103,栅绝缘层;
104,氧化物半导体有源层; 105,透明导电层; 106,源漏金属层;
107,光刻胶层。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
如图1所示,本发明提供的氧化物半导体TFT阵列基板的制备方法包括:
步骤S101,在不破真空条件下连续沉积氧化物半导体有源层及透明导电层;
步骤S102,通过一次构图工艺形成有源层图形和透明导电层的图形。
采用上述制备方法制备氧化物半导体TFT阵列基板时,氧化物半导体有源层和透明导电层在不破坏真空条件下依次形成,因此,透明导电层能够至少在步骤S101与步骤S102之间的工序中对氧化物半导体有源层进行保护,该方法避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信耐度下降,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
通过上述制备方法获得的氧化物半导体TFT阵列基板中的薄膜晶体管可以为顶栅型结构和底栅型结构,其中:
一种优选实施方式中,当氧化物半导体TFT阵列基板中的薄膜晶体管为底栅型时,上述制备方法可以由多种方式实现,如:
方式一,如图2所示,上述制备方法可以包括:
步骤S201,在衬底基板101上形成栅金属层,并通过一次构图工艺形成栅极102的图形,并沉积栅绝缘层103;
步骤S202,在不破坏真空条件下连续沉积氧化物半导体有源层104及透明导电层105;
步骤S203,在所述透明导电层105上形成源漏金属层106;
步骤S204,在源漏金属层106上形成光刻胶层107,形成的阵列基板结构截面示意图如图2a所示;
步骤S205,采用半色调掩膜板对光刻胶层107进行曝光并显影;
步骤S206,如图2b所示,通过刻蚀工艺保留源漏金属层用于形成源漏电极的区域和源漏金属层处于像素单元有效显示区域内的部位;
步骤S207,对曝光显影后剩余的光刻胶层107进行灰化工艺、露出源漏金属层106中用于形成沟道的区域;
步骤S208,如图2c所示,采用刻蚀工艺对源漏金属层106露出的部位进行刻蚀,形成沟道;
步骤S209,如图2d所示,沿透明导电层105的厚度方向对沟道区域内的透明导电层105进行部分刻蚀;
步骤S2010,对剩余的光刻胶层107进行二次灰化,将源漏金属层106中处于用于与数据线连接的漏电极的部位以外的区域露出;
步骤S2011,如图2e所示,采用刻蚀工艺去除源漏金属层106中用于与数据线连接的漏电极的部位以外的区域;
步骤S2012,如图2f所示,采用刻蚀工艺将沟道内剩余的透明导电层105去除。
采用上述方式一进行氧化物半导体TFT阵列基板的制备时,因在不破坏真空条件下连续沉积氧化物半导体有源层104及透明导电层105,且对沟道区域内的透明导电层105分两次进行刻蚀,避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信耐度下降,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
采用上述方式一制备的阵列基板中,像素电极由透明导电层形成,且与氧化物半导体有源层直接接触,降低了氧化物半导体有源层与像素电极之间的接触电阻,从而提高了氧化物半导体层的导通电流;且由于省去了原源电极区域的不透光金属层,增加了像素单元的开口率,从而提高了该阵列基板的显示面板的显示亮度,进而降低了其显示装置的驱动电压和功耗、提高了产品使用稳定性。
具体地,当透明导电层位于像素单元显示区域内的部位形成的图形具有梳状结构时,上述步骤S2012中,采用刻蚀工艺将沟道内剩余的透明导电层去除的同时,还将透明导电层位于像素单元显示区域内的部位形成具有梳状结构的图形。
方式二,如图3所示,上述制备方法可以包括:
步骤S301,在衬底基板101上形成栅金属层,并通过一次构图工艺形成栅极102的图形,并沉积栅绝缘层103;
步骤S302,在不破真空条件下连续沉积氧化物半导体有源层104及透明导电层105,形成的阵列基板结构截面示意图如图3a所示;
步骤S303,如图3b所示,通过一次构图工艺形成氧化物半导体有源层104图形和透明导电层105的图形;
步骤S304,在透明导电层105上形成源漏金属层106;
步骤S305,通过一次构图工艺形成源漏电极的图形,形成的阵列基板结构截面示意图如图3c所示。
采用上述方式二进行氧化物半导体TFT阵列基板的制备时,同样可以在不破坏真空条件下连续沉积氧化物半导体有源层104及透明导电层105,避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信耐度下降,且透明导电层与氧化物半导体层直接接触,降低了接触电阻,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
一种优选实施方式中,最终获得的源漏电极图形中仅包括用于与数据线连接的漏电极的图形,且透明导电层中与有源层连接的部位和处于像素单元有效显示区域内的部位直接电连接。采用该优选实施方式制备的阵列基板中,像素电极由透明导电层形成,且与氧化物半导体有源层直接接触,降低了氧化物半导体有源层与像素电极之间的接触电阻,从而提高了氧化物半导体层的导通电流;且由于省去了原源电极区域的不透光金属层,增加了像素单元的开口率,从而提高了该阵列基板的显示面板的显示亮度,进而降低了其显示装置的驱动电压和功耗、提高了产品使用稳定性。
具体地,当透明导电层位于像素单元显示区域内的部位形成的图形具有梳状结构时,上述步骤S303中通过一次构图工艺形成氧化物半导体有源层104图形和透明导电层105的图形时,获得的透明导电层的图形中包括透明导电层位于像素单元显示区域内的部位形成的具有梳状结构的图形。
当然,另一种优选实施方式中,当上述氧化物半导体TFT阵列基板中的薄膜晶体管为顶栅型结构时,该制备方法可以为:
方式一,如图4所示,上述制备方法可以包括:
步骤S401,在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层;
步骤S402,在所述透明导电层上形成源漏金属层;
步骤S403,在源漏金属层上形成光刻胶层;
步骤S404,采用半色调掩膜板对光刻胶层进行曝光并显影;
步骤S405,通过刻蚀工艺保留源漏金属层用于形成源漏电极的区域和源漏金属层处于像素单元有效显示区域内的部位;
步骤S406,对曝光显影后剩余的光刻胶层进行灰化工艺、以露出源漏金属层中用于形成沟道的区域;
步骤S407,采用刻蚀工艺对源漏金属层露出的部位进行刻蚀,形成沟道;
步骤S408,沿透明导电层的厚度方向对沟道区域内的透明导电层进行部分刻蚀;
步骤S409,对剩余的光刻胶层进行二次灰化,将源漏金属层中处于用于与数据线连接的漏电极的部位以外的区域露出;
步骤S4010,采用刻蚀工艺去除源漏金属层中用于与数据线连接的漏电极的部位以外的区域;
步骤S4011,采用刻蚀工艺将沟道内剩余的透明导电层去除;
步骤S4012,沉积栅绝缘层;
步骤S4013,在栅绝缘层上形成栅金属层,并通过一次构图工艺形成栅极的图形。
采用上述方式一进行氧化物半导体TFT阵列基板的制备时,因在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层,且对沟道区域内的透明导电层分两次进行刻蚀,避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信耐度下降,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
采用上述方式一制备的阵列基板中,像素电极由透明导电层形成,且与氧化物半导体有源层直接接触,降低了氧化物半导体有源层与像素电极之间的接触电阻,从而提高了氧化物半导体层的导通电流;且由于省去了原源电极区域的不透光金属层,增加了像素单元的开口率,从而提高了该阵列基板的显示面板的显示亮度,进而降低了其显示装置的驱动电压和功耗、提高了产品使用稳定性。
具体地,当透明导电层位于像素单元显示区域内的部位形成的图形具有梳状结构时,上述步骤S4011中,采用刻蚀工艺将沟道内剩余的透明导电层去除的同时,还将透明导电层位于像素单元显示区域内的部位形成具有梳状结构的图形。
方式二,如图5所示,上述制备方法可以包括:
步骤S501,在不破真空条件下连续沉积氧化物半导体有源层及透明导电层;
步骤S502,通过一次构图工艺形成有源层图形和透明导电层的图形;
步骤S503,在透明导电层上形成源漏金属层;
步骤S504,通过一次构图工艺形成源漏电极的图形;
步骤S505,沉积栅绝缘层;
步骤S506,在栅绝缘层上形成栅金属层,并通过一次构图工艺形成栅极的图形。
采用上述方式二进行氧化物半导体TFT阵列基板的制备时,同样可以在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层,避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信耐度下降,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
一种优选实施方式中,最终获得的源漏电极图形中仅包括用于与数据线连接的漏电极的图形,且透明导电层中与有源层连接的部位和处于像素单元有效显示区域内的部位直接电连接。采用该优选实施方式制备的阵列基板中,像素电极由透明导电层形成,且与氧化物半导体有源层直接接触,降低了氧化物半导体有源层与像素电极之间的接触电阻,从而提高了氧化物半导体层的导通电流;且由于省去了原源电极区域的不透光金属层,增加了像素单元的开口率,从而提高了该阵列基板的显示面板的显示亮度,进而降低了其显示装置的驱动电压和功耗、提高了产品使用稳定性。
具体地,当透明导电层位于像素单元显示区域内的部位形成的图形具有梳状结构时,上述步骤S502中通过一次构图工艺形成有源层图形和透明导电层的图形时,获得的透明导电层的图形中包括透明导电层位于像素单元显示区域内的部位形成的具有梳状结构的图形。
另一种优选实施方式中,如图6所示,上述制备方法可以包括:
步骤S601,在衬底基板上形成源漏金属层;
步骤S602,通过一次构图工艺形成源漏电极的图形;
步骤S603,在不破真空条件下连续沉积氧化物半导体有源层及透明导电层;
步骤S604,通过一次构图工艺形成有源层图形和透明导电层的图形;
步骤S605,在透明导电层上沉积栅绝缘层;
步骤S606,在栅绝缘层上形成栅金属层,并通过一次构图工艺形成栅极的图形。
采用上述优选实施方式进行氧化物半导体TFT阵列基板的制备时,同样可以在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层,避免了在制造过程中氧化物半导体长时间暴露在环境中导致的器件信耐度下降,从而提高了氧化物半导体层的导通电流,进而降低了其显示装置的驱动电压和功耗,并提高了产品的使用稳定性。
具体地,当透明导电层位于像素单元显示区域内的部位形成的图形具有梳状结构时,上述步骤S604中通过一次构图工艺形成有源层图形和透明导电层的图形时,获得的透明导电层的图形中包括透明导电层位于像素单元显示区域内的部位形成的具有梳状结构的图形。
另外,本发明实施例还提供了一种采用上述实施例中提供的任意一种制备方法制备的氧化物半导体TFT阵列基板,该氧化物半导体TFT阵列基板包括衬底基板、氧化物半导体有源层、形成有像素电极图形的透明导电层,其中,氧化物半导体有源层和透明导电层为在不破坏真空条件下连续沉积形成的氧化物半导体有源层和透明导电层。
该氧化物半导体TFT阵列基板中像素电极由透明导电层形成,且与氧化物半导体有源层直接接触,降低了氧化物半导体有源层与像素电极之间的接触电阻,从而提高了氧化物半导体层的导通电流;且由于省去了原源电极区域的不透光金属层,增加了像素单元的开口率,从而提高了该阵列基板的显示面板的显示亮度,进而降低了其显示装置的驱动电压和功耗、提高了产品使用稳定性。
显然,本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (6)
1.一种氧化物半导体TFT阵列基板的制备方法,其特征在于,包括:
在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层;
在所述透明导电层上形成源漏金属层;
通过一次构图工艺形成有源层图形和透明导电层的图形;其中,所述通过一次构图工艺形成有源层图形和透明导电层的图形具体包括:通过一次构图工艺形成源漏电极的图形、透明导电层的图形以及有源层的图形;
所述通过一次构图工艺形成源漏电极的图形、透明导电层的图形以及有源层的图形,具体包括:
在所述源漏金属层上形成光刻胶层;
采用半色调掩膜板对所述光刻胶层进行曝光并显影;
通过刻蚀工艺保留所述源漏金属层用于形成源漏电极的区域和所述源漏金属层处于像素单元有效显示区域内的部位;
对曝光显影后剩余的所述光刻胶层进行灰化工艺,以露出所述源漏金属层中用于形成沟道的区域;
采用刻蚀工艺对所述源漏金属层露出的部位进行刻蚀,形成沟道;
并沿所述透明导电层的厚度方向对所述沟道区域内的所述透明导电层进行部分刻蚀;
对剩余的所述光刻胶层进行二次灰化,将所述源漏金属层中处于用于与数据线连接的漏电极的部位以外的区域露出;
采用刻蚀工艺去除所述源漏金属层中用于与数据线连接的漏电极的部位以外的区域;
采用刻蚀工艺将所述沟道内剩余的所述透明导电层刻蚀去除。
2.根据权利要求1所述的制备方法,其特征在于,在所述在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层之前还包括:
在衬底基板上形成栅金属层,并通过一次构图工艺形成栅极的图形。
3.根据权利要求1所述的制备方法,其特征在于,在所述通过一次构图工艺形成有源层图形和透明导电层的图形之后还包括:
形成栅金属层,并通过一次构图工艺形成栅极的图形。
4.根据权利要求1-3任一项所述的制备方法,其特征在于,在所述通过一次构图工艺形成有源层图形和透明导电层的图形之后还包括:
在所述透明导电层上形成源漏金属层;
通过一次构图工艺形成源漏电极的图形。
5.根据权利要求3所述的制备方法,其特征在于,在不破坏真空条件下连续沉积氧化物半导体有源层及透明导电层之前,还包括:
在衬底基板上形成源漏金属层;
通过一次构图工艺形成源漏电极的图形。
6.一种采用权利要求1-5任一项所述的制备方法制备的阵列基板,其特征在于,包括衬底基板、氧化物半导体有源层、用于形成像素电极的透明导电层,其中,所述氧化物半导体有源层和所述透明导电层为在不破坏真空条件下连续沉积形成的氧化物半导体有源层和透明导电层。
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