CN104967580A - Method used for sending ethernet message and device used for sending ethernet message - Google Patents
Method used for sending ethernet message and device used for sending ethernet message Download PDFInfo
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Abstract
The present invention discloses a method used for sending an ethernet message and a device used for sending the ethernet message. The method comprises the steps of generating a frame message after a frame interrupt signal is received; writing the frame message in an integrated circuit chip; starting the integrated circuit chip to send the frame message. For the conditions of needing to send the responded ethernet message timely after interruption, such as the timing 4.615 ms frame interruption, the emergent random interruption, the interruption or events of other timing rates, etc., the sending timeliness of the ethernet message can be guaranteed, and the business stability is guaranteed.
Description
Technical field
The present invention relates to Embedded System Design field, particularly for realizing method and the device of the transmission of Ethernet message.
Background technology
Change in the base station of framework in full Internet protocol (Internet Protocol, IP), each inner veneer communicates with Ethernet data message mode.With global system for mobile communications (Global Systemfor Mobile Communications, GSM) base station is example, up signaling data or speech data are encapsulated as Ethernet data message and send from LTE Baseband Processing Unit, and descending signaling voice data are also encapsulated as Ethernet data message is sent to LTE Baseband Processing Unit.Frame interrupts, and base station up-downgoing data are transmitted in a frame format between base station single-board.Every 4.615ms CPU (Central ProcessingUnit, CPU) all can receive a frame and interrupt.
Embedded OS, is widely used in the design of communication, electronic equipment.It is the multiple task/process of maintenance schedule simultaneously, and task/process is run to obtain CPU time sheet according to certain priority policy.Use the base station of embedded OS, frame interrupts interim, and refer to Fig. 1, common way is, sends a message and sends message to network processing tasks, after network processing tasks receives message, wait for that oneself task scheduling is ready in frame interrupts.If current task does not obtain CPU time sheet, wait for.When after task ready, application buffer memory, the system resources such as mutex amount, if temporarily do not have idling-resource, wait for.After obtaining resource, check that whether CPU network interface hardware is idle and determine whether send.Wherein, a kind of common way is: network device driver layer adopts buffer description (BufferDescriptor, BD) structure, realize Ethernet message data receive and send control, wherein, BD is the descriptor pointer pointing to buffer memory (Buffer), deposits the message or message payload that will to send in buffer.To strengthen reduced instruction set computer performance optimization computer (Performance Optimized WithEnhanced Reduced Instruction Set Computer, POWER PC) be example, need to see Communications Processor Module (Communicate Process Module, or communication processing engine (QUICC Engine CPM), QE) whether message queue content is above sent completely, only has and just send when CPU network interface hardware is idle.This each step all likely brings larger time delay, and message is sent not in time; When time delay is larger, the promptness of up-downgoing data processing can be reduced, affect service feature.
Summary of the invention
The object of the present invention is to provide the method for realizing the transmission of Ethernet message and device, ensureing the promptness that Ethernet message sends.
The invention provides a kind of for realizing the method that Ethernet message sends, the method comprises:
After receiving frame interrupt signal, delta frame message;
By described frame message write integrated circuit (IC) chip;
Start described integrated circuit (IC) chip transmission frame message.
The present invention also provides a kind of for realizing the device that Ethernet message sends, and this device comprises:
Generation module, after receiving frame interrupt signal, delta frame message;
Writing module, for writing integrated circuit (IC) chip by described frame message;
Start module, for starting described integrated circuit (IC) chip transmission frame message.
Adopt provided by the invention for realizing method that Ethernet message sends and device, frame interrupts interim, is different from prior art, and no longer send message to network task, the process of message is not also carried out in network task, but directly in interruption, generates message.After delta frame message, write direct in integrated circuit (IC) chip, be different from prior art from flow process, do not go to give network task and send, therefore, can not wait for that network task scheduling is ready, it also avoid this and wait for time delay; Meanwhile, do not need network to send task transmission frame message, so exempted to the process of system application resource, transmission can not be incured loss through delay because of application less than semaphore or buffer memory so yet.After frame message write integrated circuit (IC) chip, directly send in IE integrated circuit (IC) chip, transmission frame message is carried out by the Ethernet sending module of integrated circuit (IC) chip, prior art is different from from hardware device, message is not sent by CPU network interface hardware, need not waiting for CPU hardware idle, directly can send message.Have no progeny with regard to the situation of the Ethernet message of needs transmission response in time in occurring, the random interruption that the 4.615ms frame of such as timing interrupts, happen suddenly, the interruption of other timing rates or event etc., the promptness that Ethernet message sends can be ensured, ensure the stability of business.
Accompanying drawing explanation
The schematic diagram that when Fig. 1 illustrates that in prior art, frame interrupts, Ethernet message sends;
Fig. 2 illustrates in the embodiment of the present invention for realizing the structural representation of the device that Ethernet message sends;
The schematic diagram that when Fig. 3 illustrates that in the embodiment of the present invention, frame interrupts, Ethernet message sends.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is elaborated.Have no progeny with regard to the situation of the Ethernet message of needs transmission response in time in occurring, the random interruption that the 4.615ms frame of such as timing interrupts, happen suddenly, the interruption of other timing rates or event etc., the Ethernet message needing network task to dispatch relative to prior art sends, the present invention proposes the device and method sent for realizing Ethernet message, can frame interrupt in transmission frame message, solve when frame interrupts the moment occurs, send the signaling data Ethernet message moment of interrupting generation according to frame to CPU, there is the problem of uncertain time delays.Meanwhile, be also applicable to the operational capability of CPU own less demanding, but the system design scheme higher to CPU traffic capacity requirement.At this moment, application the present invention, can reduce the traffic handling capability requirement to CPU, the convenient CPU selecting lower cost, thus reduces the total cost of system.
Fig. 2 illustrates in the embodiment of the present invention for realizing the structural representation of the device that Ethernet message sends.This device can be arranged in a free-standing, also can be integrated in CPU.Integrated circuit (IC) chip involved below can include but not limited to need and dedicated IC chip (the Application Specific Intergrated Circuits of customization based on embedded system development, ASIC), such as field programmable gate array (Field Programmable Gate Array, or CPLD (Complex Programmable Logic Device, CPLD) etc. FPGA).
Refer to Fig. 2, this device comprises:
Generation module 201, after receiving frame interrupt signal, delta frame message;
Writing module 202, for writing integrated circuit (IC) chip by frame message;
Start module 203, for starting integrated circuit (IC) chip transmission frame message.
Further, generation module can comprise:
Preliminary treatment submodule, for before receiving frame interrupt signal, anticipates the content of frame message;
Reprocessing submodule, for after receiving frame interrupt signal, carries out the residue process of frame message in frame interrupt routine.
Further, writing module can comprise:
First write submodule, for writing integrated circuit (IC) chip in universal sheet choosing mechanism (General-Purpose Chip-selectMachine, GPCM) mode by frame message;
Or the second write submodule, for writing integrated circuit (IC) chip in user program mechanism (User-ProgrammableMachines, UPM) mode by frame message;
Or the 3rd write submodule, for adopting direct memory access (DMA) passage by frame message write integrated circuit (IC) chip.
Further, this device can also comprise:
Whether enquiry module, send frame message for inquiring about integrated circuit (IC) chip.
Further, enquiry module can comprise:
Whether inquiry submodule, reset certainly for the relevant bits of inquiring about the Ethernet transmitter register of integrated circuit (IC) chip;
Judge submodule, for the Query Result according to inquiry submodule, if certainly reset, then frame message is sent completely; Otherwise frame message is not sent completely.
Or further, enquiry module can comprise:
Receive submodule, for the interruption from integrated circuit (IC) chip;
Judge submodule, for the reception result according to reception submodule, if received, then frame message is sent completely; Otherwise frame message is not sent completely.
, be integrated in CPU with this device below, integrated circuit (IC) chip is FPGA is example, and the transmission how realizing Ethernet message is described.Refer to Fig. 3:
Step 1, frame interrupt arrive the moment, enter interrupt service routine, response frame interrupt, but do not go after frame interrupt response send out frame message send message to network task.When message is not activated transmission, interruption can not be exited.
Network task process is not handed in process and the generation of step 2, frame message.Frame Message processing finally completes with being created in interruption.The processing mode of frame message can be divided into two kinds: 1, Message processing operand is smaller, takies CPU overhead very little, or under CPU disposal ability condition, relative overhead is less, can process completely in interruption.2, Message processing amount is comparatively large, needs to split the computing of frame Message processing.In common task, the content of frame message can be anticipated, generate the payload of next frame message data in advance, the residue process of frame message is carried out in frame interrupts, such as add heading (ethernet format, comprise object media access control address, source media access control address, type of message (designated frame message belongs to any Ethernet type of message), such as historic user datagram protocol (UserDatagram Protocol, UDP) message, transmission control protocol (Transmission Control Protocol, TCP) message, broadcasting packet and/or multicast message etc., self-defining data field flag bit (data length field is set, Custom tags territory--marking this message is the Ethernet message that frame interrupts sending, other distinctive mark territories etc.), according to field condition, calculate and rewrite related data in message payload as required.
Network task process is not handed in the transmission of step 3, frame message.Transmission is completed in frame interrupt service routine.This step comprises following two notable features: 1, frame message sends and do not give network processing tasks and come.Transmission frame message does not go to wait for that network processing tasks scheduling is ready.Avoid the message forward delay interval brought during scheduler task.2, the action sending message is interrupted causing in interrupt service routine completing at frame, does not depart from this and interrupts, namely come namely to send out, and ensures the promptness that message sends.
When step 4, frame message send, need the Ethernet sending module by FPGA, start and send.Interrupt service routine reduces consuming time as far as possible.Here the short time consumption one that frame interrupt service routine is main is the frame Message processing time, solves in preceding step 2.Two is consuming time in carrying frame message data to FPGA.Following approach can be had to complete message data: when 1, FPGA carrying data are carried out in a usual manner, for PowerPC 8313, bus clock is 41.25M, once access 4 clock cycle, highway width is 4 byte (32), 4 clock cycle of each access time interval, Yi Changbao (1588 byte), carrying (1588/4) * (4+4) consuming time individual clock cycle altogether, about 80us.When 2, carrying out in user program mechanism (User-Programmable Machines, UPM) mode, edit CPU in advance and read and write FPGA timing waveform and be configured to sheet and select in sequencing control.The same example, bus clock is constant with other clocks, and 16 modes of bursting continuously are accessed, and between bursting for twice, the time interval ignores.Then carry data time and need (1588/4) * 4 clock cycle, be approximately 40 us.3, adopt direct memory access (Direct Memory Access, DMA) passage carrying frame message data, the destination address of DMA passage is the buffer memory of storage frame message in FPGA sheet.Source address is the buffer address of storage frame message in internal memory.Carrying internal memory length is the length of frame message.
After step 5, write frame message data to FPGA buffer memory, start FPGA Ethernet message and send.Send by writing the startup of a certain position of a FPGA Ethernet transmitter register " 1 ".After transmission terminates, this position is reset by FPGA internal logic.If this position is " 1 ", then previous frame message does not distribute, and current frame message can not write FPGA buffer memory and send.
Sending message is that FPGA carries out parallel-serial conversion the data in buffer memory, and is the process of bottom physical signalling according to real network rate adapted.Speed is chosen as 10M, 100M, 1000M etc.The SGMII that the driving of Ethernet physical signalling can use FPGA itself to carry, the interface modules such as GMII, MII complete, and also can use external physical layer (Phy) driving chip and physical level conversion driver.
After step 6, startup message send, two kinds of modes are had to exit frame interrupt service routine.One is after write FPGA Ethernet transmitter register relevant bits (bit), directly exits interrupt service routine.Whether certainly reset in the relevant bits of external inquiry transmitter register.Or to send after frame message to CPU mono-interruption by FPGA, indicate current frame message and be sent completely.Another kind of mode does not first exit interruption after starting message transmission, and the relevant bits of the transmitter register of inquiry FPGA, if relevant bits is reset certainly, then thinks that message is sent completely, exit interruption.
The above is only the specific embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (14)
1., for realizing the method that Ethernet message sends, it is characterized in that, the method comprises:
After receiving frame interrupt signal, enter following frame interrupt processing process, described frame interrupts for CPU interrupts:
Delta frame message;
By described frame message write integrated circuit (IC) chip in frame interrupt routine;
Start described integrated circuit (IC) chip transmission frame message.
2. method according to claim 1, is characterized in that, described in receive frame interrupt signal after, delta frame message comprises:
Before receiving described frame interrupt signal, anticipate the content of described frame message;
After receiving described frame interrupt signal, in frame interrupt routine, carry out the residue process of described frame message.
3. method according to claim 1, is characterized in that, describedly described frame message write integrated circuit (IC) chip is comprised:
Select mechanism form by described frame message write integrated circuit (IC) chip with universal sheet;
Or, with user program mechanism form by described frame message write integrated circuit (IC) chip;
Or, adopt direct memory access passage by described frame message write integrated circuit (IC) chip.
4. method according to claim 1, is characterized in that, described startup described integrated circuit (IC) chip transmission frame message comprises:
Ethernet transmitter register write to described integrated circuit (IC) chip sends instruction.
5. method according to claim 1, is characterized in that, the method also comprises:
Inquire about described integrated circuit (IC) chip and whether send described frame message.
6. method according to claim 5, is characterized in that, whether the described integrated circuit (IC) chip of described inquiry sends described frame message comprises:
Whether the relevant bits of inquiring about the Ethernet transmitter register of described integrated circuit (IC) chip is reset certainly, if certainly reset, then described frame message is sent completely; Otherwise described frame message is not sent completely;
Or whether receive the interruption from described integrated circuit (IC) chip, if received, then described frame message is sent completely; Otherwise described frame message is not sent completely.
7. the method according to any one of claim 1 to 6, is characterized in that, described integrated circuit (IC) chip comprises: field programmable gate array and/or CPLD.
8., for realizing the device that Ethernet message sends, it is characterized in that, this device comprises:
Generation module, after receiving frame interrupt signal, delta frame message in frame interrupt processing process, described frame interrupts for CPU interrupts;
Writing module, for writing integrated circuit (IC) chip by described frame message in the frame interrupt routine in described frame interrupt processing process;
Start module, for starting described integrated circuit (IC) chip transmission frame message in described frame interrupt processing process.
9. device according to claim 8, is characterized in that, described generation module comprises:
Preliminary treatment submodule, for before receiving described frame interrupt signal, anticipates the content of described frame message;
Reprocessing submodule, for after receiving described frame interrupt signal, carries out the residue process of described frame message in frame interrupt routine.
10. device according to claim 8, is characterized in that, said write module comprises:
First write submodule, for selecting mechanism form by described frame message write integrated circuit (IC) chip with universal sheet;
Or the second write submodule, for writing integrated circuit (IC) chip with user program mechanism form by described frame message;
Or the 3rd write submodule, for adopting direct memory access passage by described frame message write integrated circuit (IC) chip.
11. devices according to claim 8, is characterized in that, this device also comprises:
Whether enquiry module, send described frame message for inquiring about described integrated circuit (IC) chip.
12. devices according to claim 11, is characterized in that, described enquiry module comprises:
Whether inquiry submodule, reset certainly for the relevant bits of inquiring about the Ethernet transmitter register of described integrated circuit (IC) chip;
Judge submodule, for the Query Result according to described inquiry submodule, if certainly reset, then described frame message is sent completely; Otherwise described frame message is not sent completely.
13. devices according to claim 11, is characterized in that, described enquiry module comprises:
Receive submodule, for the interruption from described integrated circuit (IC) chip;
Judge submodule, for the reception result according to described reception submodule, if received, then described frame message is sent completely; Otherwise described frame message is not sent completely.
Device described in 14. any one of according to Claim 8 to 13, is characterized in that: this device is integrated in CPU.
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| CN201510192346.0A CN104967580B (en) | 2009-09-27 | 2009-09-27 | The method and device sent for realizing ether network packet |
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| CN200910190750A CN101695045A (en) | 2009-09-27 | 2009-09-27 | Method and device for realizing Ethernet messaging |
| CN201510192346.0A CN104967580B (en) | 2009-09-27 | 2009-09-27 | The method and device sent for realizing ether network packet |
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| CN200910190750A Division CN101695045A (en) | 2009-09-27 | 2009-09-27 | Method and device for realizing Ethernet messaging |
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| CN102695305B (en) * | 2011-03-23 | 2015-08-12 | 中兴通讯股份有限公司 | baseband processing unit, base station and data transmission method |
| CN102647344B (en) * | 2012-03-30 | 2014-12-10 | 迈普通信技术股份有限公司 | Message sending method in embedded and distributed system |
| CN102664777B (en) * | 2012-05-07 | 2014-12-10 | 大唐移动通信设备有限公司 | Ethernet frame processing method and device |
| CN104080200B (en) * | 2013-03-26 | 2017-11-14 | 成都鼎桥通信技术有限公司 | The data transmission method of base station |
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| CN101695045A (en) | 2010-04-14 |
| CN104967580B (en) | 2019-01-11 |
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