CN104934429B - A kind of flush memory device and preparation method thereof - Google Patents

A kind of flush memory device and preparation method thereof Download PDF

Info

Publication number
CN104934429B
CN104934429B CN201410105950.0A CN201410105950A CN104934429B CN 104934429 B CN104934429 B CN 104934429B CN 201410105950 A CN201410105950 A CN 201410105950A CN 104934429 B CN104934429 B CN 104934429B
Authority
CN
China
Prior art keywords
pad
nitration case
oxide
memory device
pad oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201410105950.0A
Other languages
Chinese (zh)
Other versions
CN104934429A (en
Inventor
李敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN201410105950.0A priority Critical patent/CN104934429B/en
Publication of CN104934429A publication Critical patent/CN104934429A/en
Application granted granted Critical
Publication of CN104934429B publication Critical patent/CN104934429B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

The present invention provides a kind of flush memory device and preparation method thereof, including step:The first pad oxide, the first pad nitration case, the second pad oxide, the second pad nitration case are formed on the semiconductor substrate;Etching forms groove to define active area;Lining oxide layer is grown, and fills up insulating dielectric materials in the trench and forms isolation structure of shallow trench;The second pad nitration case, the second pad oxide are removed, carries out ion implanting;The first pad nitration case, the first pad oxide are removed, tunnel oxide is deposited and floating boom, the width of the floating boom of acquisition is identical with surfaces of active regions width.The present invention is by making two layers of pad oxide and two layers of pad nitration case; and first the pad of removal second nitration case, the second pad oxide remove the first pad nitration case, the first pad oxide again in process; utilize the position at close surfaces of active regions turning in the first pad nitration case protection isolation structure of shallow trench; the position is avoided to form pit; the generation of leakage current in isolation structure of shallow trench is effectively prevented, improves device performance.

Description

A kind of flush memory device and preparation method thereof
Technical field
The present invention relates to field of semiconductor technology, more particularly to a kind of flush memory device and preparation method thereof.
Background technology
With the increasingly increase in various mobile devices to call data storage, to can still preserve number under powering-off state According to non-volatile semiconductor memory (nonvolatile memory) demand it is increasing.Flash memory (Flash Memory, abbreviation flash memory) it is a kind of non-volatile semiconductor memory that have developed rapidly, it both there is semiconductor memory to read The advantages of speed is fast, memory capacity is big, overcome again DRAM and SRAM cut off the electricity supply like that just lose stored data the defects of.It Can be rewritten with as EPROM, EEPROM, again than they it is easy rewriting and price it is relatively cheap.Flash memory is since 1988 Year taken the lead in by Intel after release, be used in thousands of products, including mobile phone, notebook computer, In the mobile device such as palm PC and USB flash disk and network router and cabin in industrial products as recorder.It is hard with computer Disk compares, and it is not only accessed soon, and a small amount of light, the power consumption bottoms of body, is also less prone to damage.Therefore, flash memory has other wide Wealthy application field, still retain a variety of fields such as information suitable for high integration, high-performance, data acquisition and secrecy and power-off Close.
Popular flash array is mainly with NOR (nor gate) type array structures and NAND (NAND gate) type battle array in the market Array structure is main flow, wherein, NOR flash memory memory (NOR Flash) in storage format and read-write mode all with it is conventional in Deposit it is close, support random read-write, there is higher speed.
Flash memory adds a floating boom (Floating Gate) and one layer of tunnel on the basis of traditional mos transistor structure Oxide layer (Tunnel Oxide) is worn, and electric charge is stored using floating boom, realizes the non-volatile of storage content.
The step of preparing floating boom in the prior art be:
Step 1, as shown in Figure 1A, there is provided Semiconductor substrate 1A, pad oxidation is sequentially formed on the Semiconductor substrate 1A Layer (Pad oxide) 2A and pad nitration case (Pad nitride) 3A;
Step 2, as shown in Figure 1B, the pad oxide 2A, pad nitration case 3A and Semiconductor substrate 1A are etched, forms ditch Groove 4A grows lining oxide layer (Lining oxide) 5A to define active area 9A in flute surfaces;
Step 3, as shown in Figure 1 C, full insulating dielectric materials, the insulating dielectric materials surface is filled in the trench Flushed with pad nitration case 3A surfaces, form isolation structure of shallow trench (STI) 6A;
Step 4, as shown in figure iD, the pad nitration case 3A, pad oxide 2A, dew are removed using the method for wet etching Go out the active area 9A surfaces, and ion implanting is carried out to active area 9A;
Step 5, as referring to figure 1E, tunnel oxide 7A and floating boom 8A are sequentially depositing on the active area 9A surfaces.
Because the technique for removing the pad nitration case and pad oxide is generally adopted by wet-etching technology, and subsequently Wet-treating mode can be repeatedly used in technique, therefore both sides can lose under etchant solution erosion at the top of isolation structure of shallow trench Fall a part, formed with pit (Divot).The effect of isolation structure of shallow trench is isolation, typically to isolation structure of shallow trench Electric leakage requires very high, and the easy stored charge of both sides pits and forms the electric field of comparatively dense at the top of isolation structure of shallow trench, leads Cause to leak electricity at this, isolation effect is deteriorated.
In addition, the presence of pit goes out floating boom both sides of the subsequent deposition between isolation structure of shallow trench in surfaces of active regions Existing bag-shaped profile (Bag Profile), the width of floating boom is set to be more than the width of surfaces of active regions, so, to a certain extent The dosage of active area ion implanting in subsequent technique is prevented, influences ion implanting effect.Also, the floating boom of bag-shaped profile can also Subsequent technique is influenceed, causes the etching residue of side wall bottom polysilicon.
Therefore it provides a kind of improved preparation method for flash memory is the problem that those skilled in the art's needs solve.
The content of the invention
In view of the above the shortcomings that prior art, it is an object of the invention to provide a kind of flush memory device and its preparation side Method, for solving, there is pit in both sides at the top of isolation structure of shallow trench in the prior art, asking for bag-shaped profile occur in floating boom both sides Topic.
In order to achieve the above objects and other related objects, the present invention provides a kind of preparation method of flush memory device, the sudden strain of a muscle The preparation method of memory device comprises at least step:
1) Semiconductor substrate is provided, sequentially forms the first pad oxide, first from bottom to top on the semiconductor substrate Pad nitration case, the second pad oxide and the second pad nitration case;
2) first pad oxide, the first pad nitration case, the second pad oxide, the second pad nitration case and semiconductor are etched Substrate, groove is formed to define active area;
3) lining oxide layer is grown in described flute surfaces, and fills up insulating dielectric materials in the trench, the insulation is situated between Material surface flushes with the second pad nitridation layer surface, so as to form isolation structure of shallow trench;
4) the second pad nitration case, the second pad oxide are removed, and ion implanting is carried out to the active area;
5) the first pad nitration case, the first pad oxide are removed, exposes the surfaces of active regions, in surfaces of active regions certainly Tunnel oxide and floating boom are sequentially depositing on down, the width of the floating boom of acquisition is identical with surfaces of active regions width.
Preferably, prepare to form the first pad oxidation using low-pressure chemical vapor deposition, thermal oxide or molecular beam epitaxy Layer, the first pad nitration case, the second pad oxide and the second pad nitration case.
Preferably, the thickness range of the first pad nitration case is 50~200 angstroms, the thickness model of the second pad nitration case Enclose for 500~2000 angstroms.
Preferably, first pad oxide and the second pad oxide are respectively silica, the first pad nitration case It is respectively silicon nitride with the described second pad nitration case.
Preferably, the groove is obtained using the method for two steps etching in step 2), concretely comprised the following steps:First, described Spin coating photoresist on second pad nitration case, forms the mask pattern with opening after patterning photoresist layer, utilizes mask pattern As mask the first pad oxide, first pad nitration case, the second pad oxide, second pad nitration case in dry etching go out it is rectangular The top channel of shape;Then dry etching is recycled, the Semiconductor substrate is performed etching along top channel, obtains inverted trapezoidal The undercut of shape.
Preferably, lining oxide layer, the lining oxygen are grown using the method flute surfaces in the semiconductor substrate of thermal oxide Change layer is silica.
Preferably, wet etching method is respectively adopted and removes the second pad nitration case, the second pad oxide, the first pad nitrogen Change layer and the first pad oxide.
Preferably, after in the step 4) to carrying out ion implanting, in addition to wet-cleaning is carried out to resulting structure And heat treatment.
The present invention also provides a kind of flush memory device, and the flush memory device comprises at least:
Semiconductor substrate;
Active area, ion implanting are formed in the Semiconductor substrate;
Groove, between the active area;
Lining oxide layer, it is grown on the flute surfaces;
Tunnel oxide, it is deposited on the surfaces of active regions;
Floating boom, is deposited on the tunnel oxide layer surface, and the width of the floating boom of acquisition is identical with surfaces of active regions width;
Isolation structure of shallow trench, fill in the trench and between the floating boom.
As described above, a kind of flush memory device of the present invention and preparation method thereof, including step:Semiconductor substrate is provided, The first pad oxide, the first pad nitration case, the second pad oxide, the second pad are sequentially formed in the Semiconductor substrate from bottom to top Nitration case;Etch first pad oxide, the first pad nitration case, the second pad oxide, the second pad nitration case and semiconductor lining Bottom, groove is formed to define active area;Flute surfaces growth lining oxide layer in Semiconductor substrate, and fill up in the trench Insulating dielectric materials, the insulating dielectric materials surface flushes with the second pad nitridation layer surface, so as to form shallow trench isolation knot Structure;The second pad nitration case, the second pad oxide are removed, and ion implanting is carried out to the active area;Remove described first Nitration case, the first pad oxide are padded, exposes the surfaces of active regions, tunnel oxide is sequentially depositing from bottom to top in surfaces of active regions Layer and floating boom, the width of the floating boom of acquisition are identical with surfaces of active regions width.The present invention is by making two layers of pad oxide and two Layer pad nitration case, and first the pad of removal second nitration case, the second pad oxide remove the first pad nitration case, the first pad again in process Oxide layer, using the position at close surfaces of active regions turning in the first pad nitration case protection isolation structure of shallow trench, avoid the position Put to form pit, effectively prevent the generation of leakage current in isolation structure of shallow trench, and bag is also not present in the floating boom formed later The profile of shape, the transverse width of floating boom is equal with surfaces of active regions width, to the effect of active area ion implanting in subsequent technique It will not impact, improve device performance.
Brief description of the drawings
Figure 1A~Fig. 1 E are the preparation structure schematic diagram of existing flush memory device.
Fig. 2 is flush memory device preparation flow figure of the present invention.
The structural representation that Fig. 2A is presented by the preparation method step 1) of flush memory device of the present invention.
Preparation method steps 2) and the 3) structural representation that presents of Fig. 2 B~Fig. 2 C by flush memory device of the present invention.
The structural representation that Fig. 2 D~Fig. 2 E are presented by the preparation method step 4) of flush memory device of the present invention.
The structural representation that Fig. 2 F~Fig. 2 G are presented by the preparation method step 5) of flush memory device of the present invention.
Component label instructions
1,1A Semiconductor substrates
2,2A pad oxides
21 first pad oxides
22 second pad oxides
3,3A pads nitration case
31 first pad nitration cases
32 second pad nitration cases
4,4A grooves
5,5A lining oxide layers
6,6A isolation structure of shallow trench
7,7A tunnel oxides
8,8A floating booms
9 active areas
Embodiment
Illustrate embodiments of the present invention below by way of specific instantiation, those skilled in the art can be by this specification Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through specific realities different in addition The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from Various modifications or alterations are carried out under the spirit of the present invention.
Refer to accompanying drawing.It should be noted that only explanation is of the invention in a schematic way for the diagram provided in the present embodiment Basic conception, then in schema only display with relevant component in the present invention rather than according to component count during actual implement, shape Shape and size are drawn, and kenel, quantity and the ratio of each component can be a kind of random change during its actual implementation, and its component cloth Office's kenel may also be increasingly complex.
The present invention provides a kind of preparation method of flush memory device, as shown in Fig. 2 the preparation method of the flush memory device is at least Comprise the following steps:
S1, there is provided Semiconductor substrate, sequentially form the first pad oxide, first from bottom to top on the semiconductor substrate Pad nitration case, the second pad oxide and the second pad nitration case;
S2, etch first pad oxide, the first pad nitration case, the second pad oxide, the second pad nitration case and partly lead Body substrate, groove is formed to define active area;
S3, lining oxide layer is grown in the flute surfaces, and fill up insulating dielectric materials in the trench, the dielectric Material surface flushes with the second pad nitridation layer surface, so as to form isolation structure of shallow trench;
S4, the second pad nitration case, the second pad oxide are removed, and ion implanting is carried out to the active area;
S5, the first pad nitration case, the first pad oxide are removed, exposes the surfaces of active regions, in surfaces of active regions Tunnel oxide and floating boom are sequentially depositing from bottom to top, and the width of the floating boom of acquisition is identical with surfaces of active regions width.
The preparation method of the flush memory device of the present invention is specifically described below in conjunction with the accompanying drawings.
Step S1 is first carried out, as shown in Figure 2 A, there is provided Semiconductor substrate 1, in the Semiconductor substrate 1 from bottom to top Sequentially form the first pad oxide 21, first pad nitration case 31, the second pad oxide 22 and the second pad silicon nitride layer 32.
The Semiconductor substrate 1 can be the silicon or SiGe or silicon-on-insulator of monocrystalline, polycrystalline or non crystalline structure SOI.In the present embodiment, the Semiconductor substrate 1 is silicon substrate.Noted on semiconductor substrate 1 by doping process, such as ion Enter technique, form active area.
It can be formed on semiconductor substrate 1 using low-pressure chemical vapor deposition, thermal oxide or molecular beam epitaxial method First pad oxide 21, first pad silicon nitride layer 31, the second pad oxide 22 and the second pad silicon nitride layer 32, certainly, also may be used To be deposited using other suitable techniques.In the present embodiment, prepared using the method for chemical vapor deposition to be formed it is described into One pad oxide 21, first pad silicon nitride layer 31, the second pad oxide 22 and the second pad silicon nitride layer 32.
The pad oxide 22 of first pad oxide 21 and second is including but not limited to silica, in the present embodiment Preferably silica, be advantageous to strengthen interface adhesiveness between layers.The first pad nitration case 31 and second pads nitrogen Change layer 32 and include but is not limited to silicon nitride, be preferably silicon nitride in the present embodiment.The second pad nitration case 32 is as follow-up The stop-layer of glossing.
As an example, the thickness range of the first pad nitration case 31 is 50~200 angstroms, the second pad nitration case 32 Thickness range is 500~2000 angstroms.In the particular embodiment, 31 thickness of the first pad nitration case can be selected as 100 Angstrom, the thickness of the second pad nitration case 32 is chosen as 1000 angstroms.
Then step S2 is performed, as shown in Figure 2 B, first pad oxide 21, first is etched and pads nitration case 31, second Pad oxide 22, second pads nitration case 32 and Semiconductor substrate 1, forms groove 4 to go out to have defined in the Semiconductor substrate Source region 9.
The method of two steps etching can be used to obtain the groove 4, concretely comprised the following steps:First, in the described second pad nitridation Layer 32 on spin coating photoresist layer (not illustrated), pattern photoresist layer after form mask pattern, by the use of mask pattern as Mask dry etching in the first pad oxide 21, first pads nitration case 31, the second pad oxide 22, second pad nitration case 32 goes out Rectangular open top;Then dry etching is recycled, the Semiconductor substrate 1 is performed etching along open top, is obtained The groove of ditch 4 of inverted trapezoidal shape;The photoresist layer is washed after forming the groove 4 of inverted trapezoidal.
The shape of groove 4 of formation includes but is not limited to inverted trapezoidal or rectangle etc., in the present embodiment, the ditch Groove 4 is inverted trapezoidal.
Then step S3 is performed, as illustrated by figures 2 b and 2 c, in the superficial growth lining oxide layer 5 of groove 4, and in groove 4 In fill up insulating dielectric materials, the insulating dielectric materials surface flushes with the second pad nitration case 32 surface, so as to form shallow ridges Road isolation structure 6.
Before depositing insulating dielectric materials in groove 4, first in groove 4 superficial growth, one layer of lining oxide layer 5, for strengthening The adhesion of insulating dielectric materials.The lining oxide layer 5 can be silica.
The filling to the insulating dielectric materials of the groove 4 be silica, but not limited to this, or other insulate Material.
Generally use high density plasma deposition mode fills insulating dielectric materials into groove 4, it is of course also possible to adopt With other method, such as low-pressure chemical vapor deposition (LPCVD) or enhancing plasma activated chemical vapour deposition (PECVD) etc..It is heavy After the completion of product technique, the insulating dielectric materials cover the side wall and bottom and the second pad nitration case 32 of the groove 4 Surface.Further, thrown using CMP process except the insulating dielectric materials on the described second pad nitration case 32 surface Until exposing the top of isolation structure of shallow trench 6, and make the surface planarisation of isolation structure of shallow trench 6, the shallow channel of formation Isolation structure 6 is as shown in Figure 2 C.
Then step S4 is performed, as shown in figures 2d and 2e, removes the second pad nitration case 32, the second pad oxide 22, And ion implanting is carried out to the active area 9.
Wet corrosion technique can be used to remove the second pad nitration case 32, the second pad oxide 22, for example, using dense Spend is 40~90% phosphoric acid solution and 20~50% hydrofluoric acid solution as corrosive liquid.
Impurity ion forms well region in the active area 9 of the Semiconductor substrate 1, is mixed according to different requirement on devices Miscellaneous different types of ion, forms different well regions, such as forms high-pressure N-shaped well region or high-voltage P-type well region etc..Preferably, from Wet clean step is carried out to the Semiconductor substrate 1 after son injection, removes the residue brought by ion implanting.Clean it After the step of can also being heat-treated, heat treatment can activate the foreign ion of doping, and recover institute caused by ion implanting State the damage of lattice in Semiconductor substrate 1.Preferably, the temperature range of the heat treatment is 600~1500 DEG C.
It should be noted that when removing the second pad nitration case 32, the second pad oxide 22, the first pad nitration case 31 and first the side of pad oxide 21 be covered in the isolation structure of shallow trench 6 of the corner of active area 9, corner can be avoided Isolation structure of shallow trench 6 is caused pit by the corrosion of corrosive liquid;And removing the second pad nitration case 32, the second pad oxide In ion implantation process after 22, the first pad pad oxide 21 of nitration case 31 and first both can avoid height as protective layer The surface of ion dam age Semiconductor substrate 1 of energy, but do not interfere with the dosage of ion implanting;Importantly, described first The side of the pad pad oxide 21 of nitration case 31 and first is covered in the isolation structure of shallow trench 6 of the corner of active area 9, ion implanting During the ion of high-energy will not damage the isolation structure of shallow trench 6 of corner, further avoid the formation of pit.
Step S5 is finally performed, as shown in figs. 2 f and 2g, removes the first pad nitration case 31, the first pad oxide 21, Expose the surface of active area 9, be sequentially depositing tunnel oxide 7 and floating boom 8 from bottom to top on the surface of active area 9, acquisition is floated The width of grid 8 is identical with the face width of active area 9.
Wet corrosion technique can be used to remove the first pad nitration case 31, the first pad oxide 21, for example, using dense Spend is 40~90% phosphoric acid solution and 20~50% hydrofluoric acid solution as corrosive liquid.Due to the first pad nitration case 31, the One pad oxide 21 is relatively thin, therefore is easy to the pad of removal first nitration case 31, the first pad oxide 21, corrosion using wet etching Liquid hardly impacts to isolation structure of shallow trench.
The material of floating boom 8 can be polysilicon gate, non-crystalline silicon grid or metal gates.It is described floating in the present embodiment The material of grid 8 is preferably polysilicon gate.
Compared with prior art, the active area corner isolation structure of shallow trench both ends of flush memory device prepared by the present invention are equal Without pit, the floating boom both sides for making to be subsequently formed occur without bag shaped structure, i.e., the width of floating boom is identical with surfaces of active regions width.By In floating boom both sides without bag shaped structure, if subsequently being also needed to carry out ion implanting according to the requirement of device, floating boom will not stop The dosage of ion implanting, ensure the accuracy of ion implanting.
The present invention also provides a kind of flush memory device, and using prepared by above-mentioned preparation method, the structure of the flush memory device is extremely Include less:
Semiconductor substrate;The Semiconductor substrate can be monocrystalline, polycrystalline or non crystalline structure silicon or SiGe or Silicon-on-insulator SOI.In the present embodiment, the Semiconductor substrate is silicon substrate.
Active area, ion implanting are formed in the Semiconductor substrate.
Groove, between the active area;The groove shape of formation includes but is not limited to inverted trapezoidal or rectangular Shape etc., in the present embodiment, the groove is inverted trapezoidal.
Lining oxide layer, it is grown on the flute surfaces;The lining oxide layer can be silica.
Tunnel oxide, it is deposited on the surfaces of active regions;
Floating boom, is deposited on the tunnel oxide layer surface, and the width of the floating boom of acquisition is identical with surfaces of active regions width;
Isolation structure of shallow trench, fill in the trench and between the floating boom.
In summary, the present invention provides a kind of flush memory device and preparation method thereof, including step:Semiconductor lining is provided Bottom, sequentially form from bottom to top on the semiconductor substrate the first pad oxide, first pad nitration case, the second pad oxide, Second pad nitration case;Etch first pad oxide, the first pad nitration case, the second pad oxide, the second pad nitration case and half Conductor substrate, groove is formed to define active area;Flute surfaces growth lining oxide layer in Semiconductor substrate, and in groove In fill up insulating dielectric materials, the insulating dielectric materials surface flushes with the second pad nitridation layer surface, so as to form shallow channel Isolation structure;The second pad nitration case, the second pad oxide are removed, and ion implanting is carried out to the active area;Remove institute The first pad nitration case, the first pad oxide are stated, exposes the surfaces of active regions, tunnel is sequentially depositing from bottom to top in surfaces of active regions Oxide layer and floating boom are worn, the width of the floating boom of acquisition is identical with surfaces of active regions width.The present invention is by making two layers of pad oxidation Layer and two layers of pad nitration case, and nitration case is padded in first removal second in process, the second pad oxide removes the first pad nitration case again, First pad oxide, using the position at close surfaces of active regions turning in the first pad nitration case protection isolation structure of shallow trench, keep away Exempt from the position and form pit, effectively prevent the generation of leakage current in isolation structure of shallow trench, and the floating boom formed later is not yet Bag-shaped profile be present, the transverse width of floating boom is equal with surfaces of active regions width, to active area ion implanting in subsequent technique Effect will not impact, improve device performance.
So the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe Know the personage of this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as Into all equivalent modifications or change, should by the present invention claim be covered.

Claims (8)

1. a kind of preparation method of flush memory device, it is characterised in that the preparation method of the flush memory device comprises at least step:
1) Semiconductor substrate is provided, sequentially forms the first pad oxide, the first pad nitrogen from bottom to top on the semiconductor substrate Change layer, the second pad oxide and the second pad nitration case;
2) first pad oxide, the first pad nitration case, the second pad oxide, the second pad nitration case and semiconductor lining are etched Bottom, groove is formed to define active area in the semiconductor substrate;
3) lining oxide layer is grown in the flute surfaces, and fills up insulating dielectric materials in the trench, the insulating dielectric materials Surface flushes with the second pad nitridation layer surface, so as to form isolation structure of shallow trench;
4) the second pad nitration case, the second pad oxide are removed, and ion implanting is carried out to the active area;
5) the first pad nitration case, the first pad oxide are removed, exposes the surfaces of active regions, surfaces of active regions from lower and On be sequentially depositing tunnel oxide and floating boom, the width of the floating boom of acquisition is identical with surfaces of active regions width.
2. the preparation method of flush memory device according to claim 1, it is characterised in that:Using low-pressure chemical vapor deposition, Thermal oxide or molecular beam epitaxy prepare to form first pad oxide, the first pad nitration case, the second pad oxide and the second pad Nitration case.
3. the preparation method of flush memory device according to claim 1, it is characterised in that:The thickness of the first pad nitration case Scope is 50~200 angstroms, and the thickness range of the second pad nitration case is 500~2000 angstroms.
4. the preparation method of flush memory device according to claim 1, it is characterised in that:First pad oxide and second Pad oxide is respectively silica, and the first pad nitration case is respectively silicon nitride with the described second pad nitration case.
5. the preparation method of flush memory device according to claim 1, it is characterised in that:Using two steps etching in step 2) Method obtains the groove, concretely comprises the following steps:First, the spin coating photoresist on the described second pad nitration case, patterns photoresist The mask pattern with opening is formed after layer, nitration case, the are padded in the first pad oxide, first as mask by the use of mask pattern Dry etching goes out rectangular top channel in two pad oxides, the second pad nitration case;Then dry etching is recycled, along top Groove performs etching to the Semiconductor substrate, obtains the undercut of inverted trapezoidal shape.
6. the preparation method of flush memory device according to claim 1, it is characterised in that:Method using thermal oxide is partly being led Flute surfaces growth lining oxide layer in body substrate, the lining oxide layer is silica.
7. the preparation method of flush memory device according to claim 1, it is characterised in that:Wet etching method is respectively adopted to go Except the described second pad nitration case, the second pad oxide, the first pad nitration case and the first pad oxide.
8. the preparation method of flush memory device according to claim 1, it is characterised in that:To carrying out ion in the step 4) After injection, in addition to the step of wet-cleaning is with being heat-treated is carried out to resulting structure.
CN201410105950.0A 2014-03-20 2014-03-20 A kind of flush memory device and preparation method thereof Active CN104934429B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410105950.0A CN104934429B (en) 2014-03-20 2014-03-20 A kind of flush memory device and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410105950.0A CN104934429B (en) 2014-03-20 2014-03-20 A kind of flush memory device and preparation method thereof

Publications (2)

Publication Number Publication Date
CN104934429A CN104934429A (en) 2015-09-23
CN104934429B true CN104934429B (en) 2018-03-02

Family

ID=54121519

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410105950.0A Active CN104934429B (en) 2014-03-20 2014-03-20 A kind of flush memory device and preparation method thereof

Country Status (1)

Country Link
CN (1) CN104934429B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107946370A (en) * 2017-11-22 2018-04-20 上海华力微电子有限公司 A kind of flash memory unit structure and preparation method with effectively high coupling ratios
CN112750788B (en) * 2021-01-22 2023-11-24 上海华虹宏力半导体制造有限公司 Method for manufacturing flash memory device
CN113192890A (en) * 2021-04-27 2021-07-30 长江存储科技有限责任公司 Method for manufacturing semiconductor device
CN117747535B (en) * 2024-02-21 2024-05-28 合肥晶合集成电路股份有限公司 Shallow trench isolation structure, semiconductor structure and preparation method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101378014A (en) * 2007-08-31 2009-03-04 夏普株式会社 Manufacturing method for semiconductor device
CN102487034A (en) * 2010-12-03 2012-06-06 中芯国际集成电路制造(北京)有限公司 Preparation method of shallow trench isolation structure

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7786016B2 (en) * 2007-01-11 2010-08-31 Micron Technology, Inc. Methods of uniformly removing silicon oxide and a method of removing a sacrificial oxide

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101378014A (en) * 2007-08-31 2009-03-04 夏普株式会社 Manufacturing method for semiconductor device
CN102487034A (en) * 2010-12-03 2012-06-06 中芯国际集成电路制造(北京)有限公司 Preparation method of shallow trench isolation structure

Also Published As

Publication number Publication date
CN104934429A (en) 2015-09-23

Similar Documents

Publication Publication Date Title
CN104752363B (en) The forming method of flash memory
CN105336695B (en) The forming method of semiconductor devices
CN106158757B (en) Flush memory device manufacturing method
CN104934429B (en) A kind of flush memory device and preparation method thereof
CN104425366B (en) The forming method of semiconductor structure
CN104752361B (en) The forming method of semiconductor structure
CN105826273A (en) Flash memory device and manufacturing method thereof
CN104112654A (en) Process method for reducing floating gate holes
CN104425220A (en) Method for forming pattern
CN106129008A (en) The forming method of flash memory
CN104103592A (en) Manufacturing method for flash memory
CN104900594A (en) Nonvolatile memory forming method
CN104051346B (en) A kind of preparation method of flash memories
CN104103586B (en) Method for forming semiconductor device
CN104103593A (en) Manufacturing method for flash memory
CN103367262B (en) The forming method of flash memory cell
CN101399228A (en) Semiconductor devices and method of fabricating the same
CN101685793A (en) Method of manufacturing semiconductor device
CN104867831A (en) Manufacturing method of semiconductor device structure
WO2015149670A1 (en) Manufacturing method for nor flash memory
CN109950207A (en) The manufacturing method of grid
CN104517849B (en) The forming method of flash memory
CN104157615B (en) Preparation method for flash memory
CN109148447A (en) Semiconductor structure and forming method thereof
CN103413777B (en) Deep groove filling structure and manufacturing method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant