CN104901556B - The synchronous rectification control method and synchronous rectifying controller of programmable dead-time - Google Patents
The synchronous rectification control method and synchronous rectifying controller of programmable dead-time Download PDFInfo
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Abstract
The synchronous rectification control method and synchronous rectifying controller of programmable dead-time.Embodiment provides a kind of synchronous rectification control method, includes:A synchronous rectifying controller is provided, it has one first pin;The pin voltage sampled on first pin, to produce a sampled voltage;There is provided a detection electric current after the sampled voltage is produced, from the synchronous rectifying controller, first pin is flowed out;According to the sampled voltage and the pin voltage, several digital dead time control signals are produced, and according to the grade dead time control signal, a rectifier switch are controlled, to determine a dead time of the rectifier switch.
Description
Technical field
The present invention is broadly directed to the control method and controller of the synchronous rectification of power supply unit.
Background technology
Power supply unit is in addition to having required accurately output voltage or output current, energy conversion efficiency (power
Conversion efficiency) it is also often one of specification that industry is lain in very much.
Fig. 1 is a known flyback (flyback) switch type power supplying device 10, is used as switch type power supplying device
One example.When Pwm controller 14 makes the conducting of power switch 20, input power VINMake transformer 18 with input ground 26
Energy storage;When power switch 20 is closed, transformer 18 is released energy by commutation diode 12 to output capacitance 17 with load 16, with
Setting up out-put supply OUT (has output voltage VOUT) with exporting ground 28.Pass through appropriate feedback path, pulse width modulation control
Device 14 processed can adjust the work period (duty cycle) of power switch 20, out-put supply OUT is met desired specification.
All transformers 18 are output to output capacitance 17 and the secondary side current I of load 16SEC, all must pass through rectification two
Pole pipe 12.The forward bias voltage drop of commutation diode 12 is about 1V, regularly consumes energy.In order to reduce the energy of commutation diode 12
Amount consume, increases energy conversion efficiency, so in known technology, as shown in Figure 2, having been developed with a rectifier switch 24
Replace commutation diode 12.Such technology is referred to as synchronous rectification (synchronous rectification, SR).Switching regulator
Rectifier switch 24 in power supply unit 30 needs to be properly controlled, to imitate the action of the commutation diode 12 in Fig. 1.When
Power switch 20 is turned on, 18 energy storage of transformer when, rectifier switch 24 is closed.It is whole when transformer 18 releases energy in discharge condition
The conducting of stream switch 24 allows transformer 18 to charge output capacitance 17 there is provided the discharge path of a low resistance low power consuming.Work as transformation
After the discharge off of device 18, rectifier switch 24 is also required to close, and out-put supply OUT is to the energy storage of transformer 18 for prevention.
In general, before transformer 18 is also without discharge off, rectifier switch 24 is accomplished by closing, and can prevent to fry
Machine.In this description, this period of the complete discharge off of transformer 18, referred to as dead time are arrived after rectifier switch 24 is closed
(dead time)TDEAD.Dead time TDEADNeed the control of extreme care.If dead time is oversize, energy cannot be just reduced
Measure the benefit of consume.If dead time becomes negative value, it is meant that just in case rectifier switch 24 is also in the opening time, power switch
20 just switch to conducting, then switch type power supplying device 30 has the danger of aircraft bombing.As system is different, dead time TDEADNeed
Ask and also tend to difference, therefore, dead time TDEADIt is preferably able to be set by system manufacturer, can programs.
When the synchronous rectifying controller for controlling rectifier switch 24 is presented with integrated circuit, how to make synchronous rectification control
The number of pins of device is minimized, is the problem that industry is made great efforts while providing appropriate programmable dead time.
The content of the invention
Embodiment provides a kind of synchronous rectification control method, includes:A synchronous rectifying controller is provided, it has one the
One pin;The pin voltage sampled on first pin, to produce a sampled voltage;After the sampled voltage is produced, carry
For a detection electric current, from the synchronous rectifying controller, first pin is flowed out;According to the sampled voltage and the pin voltage,
Several digital dead time control signals are produced, and according to the grade dead time control signal, control a rectifier switch, with certainly
One dead time of the fixed rectifier switch.
Embodiment provides a kind of synchronous rectifying controller, to control a rectifier switch.The synchronous rectifying controller is included
There are one first pin, a current source, a sample circuit, an error amplifier and an analog-digital converter.The current source can
The detection electric current of offer one of selectivity, flows out first pin.The sample circuit is connected to first pin, to sample this
A pin voltage on one pin, to produce a sampled voltage.The error amplifier framework come when the detection electric current is provided,
According to the pin voltage and sampled voltage, the error signal of a simulation is produced.The analog-digital converter framework misses this
Difference signal is converted into several digital dead time control signals.The grade dead time control signal may decide that the rectifier switch
A dead time.
Brief description of the drawings
Fig. 1 is a known flyback switch type power supplying device.
Fig. 2 is a known synchronous rectified power supply.
Fig. 3 is a flyback switch type power supplying device of sequentially one embodiment of the invention.
The partial circuit and resistance 90 and 92 in synchronous rectifying controller 42 in Fig. 4 exemplary graphs 3.
Fig. 5 is a signal waveforms, is relevant to some signals in Fig. 4.
The control method that Fig. 6 displays are implemented according to the present invention.
Fig. 7 shows in synchronous rectifying controller 42 that the opening time on rectifier switch 24 controls circuit.
Fig. 8 is some signal timing diagrams in Fig. 7.
【Symbol description】
10 switch type power supplying devices
12 commutation diodes
14 Pwm controllers
16 loads
17 output capacitances
18 transformers
20 power switch
24 rectifier switch
26 input ground
28 output ground
30 switch type power supplying devices
37 body diodes
39 detection resistances
40 switch type power supplying devices
42 synchronous rectifying controllers
44 sequential provide device
46 discharge time loggers
47 updating devices
48a、48bSwitch
50aElectric capacity
50bRecord electric capacity
52 electric capacity
53 switches
56 voltage current adapters
58 starters
60 logic circuits
62 comparators
90th, 92 resistance
102 current sources
104 switches
105 switches
106 sample circuits
108 comparators
110 operational amplifiers
112 analog-digital converters
114 variable resistors
140th, 142,144,146,148,150,152 step
DB0, DB1, DB2 data signal
DRV pins
DTB0, DTB1, DTB2 dead time control signal
EN/DT pins
GND pins
ICHGCharging current
ISECSecondary side current
ISETDetect electric current
OUT out-put supplies
SBIASSignal
SDRVSignal
SEN-BIASEnable signal
SINIInitial signal
SNBAlong bias voltage signal
SSAMPLESignal
SUPDMore new signal
SYN pins
tSTARTTime started
t0、t1、t2、t4、t5、t6Time point
TDEADDead time
TDISDischarge time
TSAMPLESampling periods
TSETSet the period
VCC pins
VDS-NO-SYNCReference signal
VENDTPin voltage
VENDT_SENError signal
VQUESSEstimated time signal
VINInput power
VOUTOutput voltage
VRAISEDVoltage
VREALInstantly time signal
VREFReference voltage
VSECSecondary-side voltage
VSPLSampled voltage
VSYNVoltage
Embodiment
In this manual, there are some identical symbols, it represents there is identical or similar structure, function, principle
Element, and those skilled in the art can deduce according to the teaching of this specification.Consider for the succinct degree of specification, it is identical
The element of symbol will no longer repeat.
Although this specification is using a flyback switch type power supplying device as an embodiment, the present invention is not limited to
This.For example, present invention may also be implemented in decompression (buck) power supply unit, booster power supply (booster) or
Falling-rising voltage source supply (buck-booster).
Fig. 3 is a flyback switch type power supplying device 40 of sequentially one embodiment of the invention, and it is synchronous whole with one
Stream controller 42, controls rectifier switch 24.In this embodiment, synchronous rectifying controller 42 is a packaged integrated circuit,
With pin SYN, DRV, VCC, EN/DT and GND.In the Fig. 3 for being not limited to the present invention, rectifier switch 24 is with posting
The PMOS transistor of a raw body diode (bodydiode) 37 is example.Body diode 37 is connected to the body of rectifier switch 24
Between pole (body) and drain electrode (drain).It is rectified that the pin VCC of synchronous rectifying controller 42 is connected to rectifier switch 24
Out-put supply OUT, be also the source electrode (source) of rectifier switch 24.The pin SYN of synchronous rectifying controller 42, passes through detection
Resistance 39, is connected to the drain electrode (drain) of rectifier switch 24.The source short of rectifier switch 24 is to body pole.Synchronous rectification is controlled
The pin GND of device 42 is connected to output ground 28.
The pin EN/DT of synchronous rectifying controller 42 is a multifunctional pin, can provide enable and dead time sets
Two kinds of fixed functions.Resistance 90 and 92 is connected in series with output voltage VOUTOutput ground 28 between, and pin EN/DT be resistance 90 with
Tie point between 92.The resistance value of appropriate selection resistance 90 and 92, can about set the enable of synchronous rectifying controller 42
Condition and dead time.
The partial circuit and resistance 90 and 92 in synchronous rectifying controller 42 in Fig. 4 exemplary graphs 3.
Comparator 108 compares the pin voltage V on pin EN/DTENDTWith a reference voltage VREF, enable letter is provided according to this
Number SEN-BIAS.As pin voltage VENDTMore than reference signal VREFWhen, enable signal SEN-BIASEnable, synchronous rectifying controller 42 is
Starting to make the circuit work of inside, there is provided appropriate sequential.For example, in enable signal SEN-BIASAfter enable, synchronous rectification control
Device 42 processed first carries out internal dead time TDEADSetting, then just start switch synchronous rectification switch 24.
Current source 102 provides detection electric current ISET.As signal SBIASEnable, when switch 104 is turned on, detects electric current ISETCan
To flow out pin EN/DT, as electric current IB, draw high pin voltage VENDT。
Sample circuit 106 is in signal SBIASForbidden energy, when switch 105 is closed, sampled voltage VSPLCan be pin voltage VENDT
A sampled result.
Operational amplifier 110 and the resistance on periphery may be constructed an error amplifier.Sampled voltage VSPLWith pin electricity
Press VENDT-Difference, the error signal VENDT_SEN of simulation by the amplification of ratio, will be produced.
Analog-digital converter 112 error signal VENDT_SEN can be converted into several data signal DB0, DB1 with
DB2.Several latch cicuits can with latched digital signal DB0, DB1 and DB2, produce numeral dead time control signal DTB0,
DTB1 and DTB2.In one embodiment, after dead time control signal is produced, electric current I is detectedSETIt can stop.Implement one
In example, as internal dead time TDEADSetting after the completion of, dead time, control signal DTB0, DTB1 and DTB2 were to maintain not
Become.
The resistance value of variable resistor 114 is determined by dead time control signal DTB0, DTB1 and DTB2, such as Fig. 4 institutes
Show.
Fig. 5 is a signal waveforms, is relevant to some signals in Fig. 4.
In time started tSTART, with output voltage VOUTRising, pin voltage VENDTMore than reference voltage VREF, so
Enable signal SEN-BIASBecome enable.Synchronous rectifying controller 42 is enabled, so sequentially generating sampling periods TSAMPLEAnd
Set period TSET。
In sampling periods TSAMPLEIn, signal SSAMPLEEnable, signal SBIASForbidden energy, detection electric current ISETPin can not be flowed out
EN/DT.Now, pin voltage VENDTAbout with output voltage VOUTIt is proportional, and sampled voltage VSPL is approximately equal to pin voltage
VENDT.Also therefore, error signal VENDT_SEN is about 0.For example, now pin voltage VENDT=VOUT*R92/(R90+
R92), wherein R90With R92The respectively resistance value of resistance 90 and 92.
In setting period TSETIn, signal SSAMPLEForbidden energy, signal SBIASEnable.Now, detection electric current ISETFlow out pin
EN/DT, so pin voltage VENDTBig appointment is equal to VOUT*R92/(R90+R92)+ISET*(R92||R90), wherein, R92||R90Represent
The resistance value in parallel with 92 of resistance 90.Because signal SSAMPLEForbidden energy, so sampled voltage VSPLIt is substantially constant, equal to VOUT*R92/
(R90+R92).Error signal VENDT_SENBy approximately equal to ISET*(R92||R90) * K, wherein K is operational amplifier 110 and periphery
The voltage gain (voltage gain) of error amplifier that is constituted of resistance.Now data signal DB0, DB1 and DB2 can be anti-
Error signal VENDT_SEN Analog-digital Converter result is mirrored, but because the barrier of latch cicuit, dead time control letter
Number DTB0, DTB1 and DTB2 are maintained with sampling periods TSAMPLEIn the same state.
In setting period TSETAfterwards, signal SSAMPLEEnable, signal SBIASForbidden energy.Therefore, detection electric current ISETStop outflow
Pin EN/DT.Pin voltage VENDTAbout with output voltage VOUTIt is proportional, and sampled voltage VSPLApproximately equal to pin voltage
VENDT.Signal SSAMPLERising edge cause latch circuit latches data signal DB0, DB1 and DB2, produce dead time control
Signal DTB0, DTB1 and DTB2.In one embodiment, after dead time control signal is produced, electric current I is detectedSETIt can stop
Only.As shown in Figure 5.Dead time, control signal DTB0, DTB1 and DTB2 determined the resistance value of variable resistor 114.Setting
Timing section TSETAfterwards, if output voltage VOUTLess than reference signal VREF, comparator 108 just can forbidden energy synchronous rectification according to this
Controller 42.
In setting period TSETAfterwards, synchronous rectifying controller 42 controls synchronous rectification switch 24 according to variable resistor 114.
Variable resistor 114 determines the opening time (On time) of synchronous rectification switch 24, also determines synchronous rectification switch 24 simultaneously
Dead time TDEAD.Therefore, dead time TDEADSubstantially it is associated with ISET*(R92||R90)*K.System manufacturer can select to fit
When resistance 90 and 92, to set dead time TDEAD。
Analysis according to more than understands that pin EN/DT is a multifunctional pin.As long as the appropriate resistance 90 and 92 of selection,
Just it may decide that output voltage VOUTWhen can be with enable synchronous rectifying controller 42, and dead time TDEADDesired value.
The control method that Fig. 6 displays are implemented according to the present invention, it illustrates please refer to Fig. 4 and Fig. 5.
Step 140 confirms pin voltage VENDTMore than reference signal VREF, so enable synchronous rectifying controller 42.
In step 142, pin voltage VENDTIt is sampled, to produces sampled voltage VSPL。
Step 144 provides detection electric current ISET, it is flowed out pin EN/DT.Therefore, pin voltage VENDTIt can be driven high,
Become with sampled voltage VSPLIt is different.
Step 146 is according to pin voltage VENDTWith sampled voltage VSPLDifference, produce error signal VENDT_SEN.Error is believed
Number VENDT_SENDigital conversion results, be latched in step 148, and produce dead time control signal DTB0, DTB1 with
DTB2。
Step 150 makes detection electric current ISETNo longer outflow pin EN/DT.
Step 152 determines the resistance value of variable resistor 114, institute according to dead time control signal DTB0, DTB1 and DTB2
To determine the opening time (On time) of synchronous rectification switch 24, when also determining the stagnation of synchronous rectification switch 24 simultaneously
Between TDEAD。
Fig. 7 shows in synchronous rectifying controller 42 that the opening time on rectifier switch 24 controls circuit, is used as an example
Son, illustrates how variable resistor 114 influences dead time TDEAD。
Sequential provides device 44 according to the output voltage V on pin VCCOUTWith the voltage V on pin SYNSYNThere is provided along partially
Press signal SNB, initial signal SINIAnd more new signal SUPD.Discharge time logger 46 provides time signal V instantlyREAL, its
About represent that body diode 37 is in time during along bias, it is about secondary side current ISECTime more than zero, can also
About discharge time T of the transformer 18 to output capacitance 17DIS.Record electric capacity 50bEstimated time signal V is providedQUESS.Update
Device 47 is in discharge time TDISA preset time (will explain later) afterwards, according to time signal V instantlyREALEstimated to update
Time signal VQUESS, it is approached time signal V instantlyREAL.Comparator 62 can be considered as switch control with logic circuit 60
Device, according to estimated time signal VQUESSAnd voltage VRAISED, signal S is produced in pin DRVDRV, control rectifier switch 24.
Estimated time signal VQUESSRepresent be body diode 37 in this switch periods, discharge time TDISA conjecture
Value.It will explain later, in this embodiment, estimated time signal VQUESSIt can be used for determining the time point that rectifier switch 24 is closed,
And estimated time signal VQUESSCan be with the increase of switch periods, rapidly toward real discharge time TDISApproach.
Fig. 8 is some signal timing diagrams in Fig. 7, to some possible operations in explanation figure 7.Please refer to figure
3 switch type power supplying device 40.
Fig. 8 uppermost waveforms stands output voltage VOUTTo secondary-side voltage VSECVoltage difference.In time point t0, because
Switch to close for the power switch 20 in Fig. 3, secondary-side voltage VSECStart to exceed output voltage VOUT, sequential provide device 44 carry
Initial signal S is used as a pulseINI.As secondary-side voltage VSECMore than output voltage VOUTWhen, body diode 37 is in along partially
Pressure, along bias voltage signal SNBFor 1 in logic;Opposite, when body diode 37 is in reverse blas, along bias voltage signal SNBTo patrol
0 on volume.Along bias voltage signal SNBFor 1 period, discharge time T can be referred to asDIS, as shown in Figure 8.In fig. 8, Yu Shi
Between point t4, body diode 37 is changed into reverse blas, so along bias voltage signal SNBSwitch to 0 in logic, declare discharge time TDISKnot
Beam.In time point t4Time point t afterwards5, sequential provide device 44 provide another pulse as more new signal SUPD。
In time point t0, because initial signal SINIPulse, switch 53 will time signal V instantlyREALReset to 0V.When
Between point t1, initial signal SINIEnd-of-pulsing.Time point t0To t1Between period, be properly termed as a starting time (initial
time)。
In time point t1, voltage current adapter 56 is according to pin voltage VENDT, produce charging current ICHG, by can power transformation
Resistance 114, starts to charge to electric capacity 52, and time signal V instantly is produced in one end of electric capacity 52REAL.Instantly time signal VREALCan be with
Discharge time TDISIncrease and rise, until discharge time TDISTerminate.Therefore, time signal V instantlyREALOne can be considered as oblique
Slope signal.In time point t4Afterwards, time signal V instantlyREALIts peak value is maintained, is switched herein which represent body diode 37
In cycle, in the period along bias state, that is, discharge time TDIS。
As shown in Figure 7, voltage VRAISEDWith time signal V instantlyREAL, the electricity at the two ends of variable resistor 114 is represented respectively
Pressure.Along bias voltage signal SNBFor in logic 1 when because charging current ICHGVariable resistor 114 is flowed through, so voltage VRAISEDMeeting
More than time signal V instantlyREAL, as shown in Figure 8.Relative to time signal V instantlyREAL, voltage VRAISEDIt can be considered a boosting
Signal.Variable resistor 114 can be considered as a bias voltage supplier, and a bias (offset voltage) is provided respectively, is added to instantly
Time signal VREAL, to produce voltage VRAISED.And this bias size, be controlled by dead time control signal DTB0, DTB1 with
DTB2。
In time point t1, due to initial signal SINIEnd-of-pulsing, starter 58 can set (set) logic circuit 60
In set-reset flip-floop, make signal SDRVStart as 1 in logic, as shown in Figure 8.In this embodiment, because rectification is opened
It is a PMOS transistor to close 24, so signal SDRVFor in logic 1 when, signal SDRVFor a relative low-voltage,
Rectifier switch 24 is turned on;As signal SDRVFor in logic 0 when, signal SDRVFor a relative high voltage, rectification is opened
24 are closed to close.The conducting of rectifier switch 24 can make output voltage VOUTTo secondary-side voltage VSECThe reduction of both difference suddenly.Fig. 5
On also show reference signal VDS-NO-SYNC, it represents rectifier switch 24 when being not turned on, it should output voltage VOUTTo secondary
Side voltage VSECBetween difference.
In time point t2, voltage VRAISEDEstimated time signal V is exceededQUESS, patrolled so comparator 62 resets (reset)
The set-reset flip-floop in circuit 60 is collected, makes signal SDRVAs 0 in logic, rectifier switch 24 is closed.Output voltage VOUTIt is right
Secondary-side voltage VSECDifference, now return to reference signal VDS-NO-SYNCEqually.In simple terms, when estimated time signal
VQUESSWith time signal V instantlyREALDifference, during the bias provided less than variable resistor 114, rectifier switch 24 is closed.
Time point t2To t4Between period, be dead time T as Fig. 8 is indicatedDEAD。
In time point t5, more new signal SUPDThe first closing switch 48 of pulsea, then turn on switch 48b.Therefore, switch is worked as
48aDuring closing, electric capacity 50aTime signal V instantly can be remembered in advanceREAL.In switch 48bDuring conducting, because electric capacity 50aWith
50bIt is electrically short-circuited to each other, so there occurs charge share (charge sharing), estimated time signal VQUESSTherefore it is updated.Lift
For example, if electric capacity 50aWith 50bCapacitance it is approximately equivalent.Estimated time signal V after renewalQUESSBig appointment is equal to more
Estimated time signal V before newQUESSWith time signal V instantlyREALBe averaged, as shown in Figure 8.In simple terms, VQUESS=w*
VQUESS+(1-w)*VREAL, wherein w is the ratio value between 0 and 1, by electric capacity 50aWith 50bCapacitance determined.
In time point t6, the power switch 20 in Fig. 3 switchs to close once again, so initial signal SINIPulse occur, it is suitable
Bias voltage signal SNBSwitch to 1 in logic.Time point t0To t6Period before, a switch periods can be considered as.In time point t6
Switch periods afterwards, estimated time signal VQUESSAlso it is updated, continues toward time signal V instantlyREALApproach, such as Fig. 8 institutes
Show.
It was found from the explanation of above circuit operation, often by a switch periods, estimated time signal VQUESSMay be with electricity
The mode that lotus is shared, toward time signal V instantlyREALPeak value approach.Such mode of approaching will quickly make to estimate very much
Time signal VQUESSVery close to time signal V instantlyREAL.The bias that variable resistor 114 is provided, can cause signal
SDRVSynchronous rectification switch 24 is in time shut off before body diode 37 becomes reverse blas, increases the energy conversion of synchronous rectification
Efficiency.Therefore, variable resistor 114 determines the opening time end point of synchronous rectification switch 24, so when also determining stagnation
Between TDEAD.The bias provided using variable resistor 114, is also influenceed than being less affected by the change such as processing procedure, temperature.Can power transformation
The resistance value of resistance 114, as described above, can be programmed by resistance 90 with 92.
At stable state (load 16 is constant for a long time), dead time TDEADLength, be by the electricity of variable resistor 114
Resistance is determined.
The preferred embodiments of the present invention are the foregoing is only, all equivalent changes done according to claims of the present invention are with repairing
Decorations, should all belong to the covering scope of the present invention.
Claims (12)
1. a kind of synchronous rectification control method, includes:
A synchronous rectifying controller is provided, it has one first pin;
The pin voltage sampled on first pin, to produce a sampled voltage;
There is provided a detection electric current after the sampled voltage is produced, from the synchronous rectifying controller, first pin is flowed out;
According to the sampled voltage and the pin voltage, several digital dead time control signals are produced;And
According to the dead time control signal, a rectifier switch is controlled, to determine a dead time of the rectifier switch.
2. synchronous rectification control method as claimed in claim 1, wherein, first pin is a multifunctional pin, the control
Method also includes:
Before the detection electric current is provided, when the pin voltage is more than a reference voltage, the enable synchronous rectifying controller.
3. synchronous rectification control method as claimed in claim 1, includes:
Compare the sampled voltage and the pin voltage, to produce the error signal of a simulation;
The error signal is converted into several data signals;And
The data signal is latched, to produce the dead time control signal.
4. synchronous rectification control method as claimed in claim 1, includes:
According to the dead time control signal, a variable resistor is controlled;
Wherein, the variable resistor is determined the dead time by framework.
5. synchronous rectification control method as claimed in claim 4, includes:
One charging current is provided, the variable resistor is flowed through, an electric capacity is charged, one is produced respectively with the two ends in the variable resistor
Ramp signal and a boost signal;
When the rectifier switch is closed, an estimated time signal is updated with the ramp signal;And
An opening time of the rectifier switch is determined according to the estimated time signal and the boost signal, thus determines that this stops
The stagnant time.
6. synchronous rectification control method as claimed in claim 1, wherein, when the detection electric current stops, the pin voltage with
An output voltage after the rectifier switch rectification is proportional.
7. synchronous rectification control method as claimed in claim 1, wherein, when the digital dead time control signal is produced
Afterwards, the detection electric current is stopped.
8. a kind of synchronous rectifying controller, to control a rectifier switch, includes:
One first pin;
One current source, optionally provides one and detects electric current, flow out first pin;
One sample circuit, is connected to first pin, to the pin voltage sampled on first pin, to produce a sampling
Voltage;
One error amplifier, framework is come when the detection electric current is provided, according to the pin voltage and sampled voltage, produces one
The error signal of simulation;And
The error signal is converted into several digital dead time control signals by one analog-digital converter, framework;
Wherein, the dead time control signal may decide that one of rectifier switch dead time.
9. synchronous rectifying controller as claimed in claim 8, wherein, the error signal is converted into by the analog-digital converter
Several data signals, and the data signal is latched, to produce the dead time control signal.
10. synchronous rectifying controller as claimed in claim 8, order includes:
One variable resistor, is controlled by the dead time control signal.
11. synchronous rectifying controller as claimed in claim 8, includes:
One opening time controller, framework produces a ramp signal and a boost signal, includes a variable resistor, controlled
In the dead time control signal;
Wherein, the variable resistor can determine the difference between the ramp signal and the boost signal.
12. synchronous rectifying controller as claimed in claim 11, wherein, the opening time controller includes:
One charging current source and an electric capacity, the variable resistor are connected between the charging current source and the electric capacity, and this can power transformation
The two ends of resistance provide the ramp signal and the boost signal respectively;
One more novel circuit, when the rectifier switch is closed, an estimated time signal is updated with the ramp signal;And
One comparator, compares the estimated time signal and the ramp signal, to determine an opening time of the rectifier switch, because
And determine the dead time of the rectifier switch.
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US6961256B2 (en) * | 2004-02-13 | 2005-11-01 | Niko Semiconductor Co., Ltd. | Synchronous rectifier with dead time adjusting function |
CN101232248A (en) * | 2007-10-26 | 2008-07-30 | 崇贸科技股份有限公司 | Method, circuit and synchronous rectification device of flexible switching power supply converter |
DE102009001531A1 (en) * | 2008-03-13 | 2009-09-17 | Infineon Technologies Austria Ag | Rectifier circuit |
CN201352771Y (en) * | 2008-11-26 | 2009-11-25 | 天宝电子(惠州)有限公司 | Synchronous rectifier circuit |
CN102342007A (en) * | 2009-01-19 | 2012-02-01 | 伟创力国际美国公司 | Controller for a power converter |
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