CN104900546A - Packaging structure of power module - Google Patents
Packaging structure of power module Download PDFInfo
- Publication number
- CN104900546A CN104900546A CN201510219849.2A CN201510219849A CN104900546A CN 104900546 A CN104900546 A CN 104900546A CN 201510219849 A CN201510219849 A CN 201510219849A CN 104900546 A CN104900546 A CN 104900546A
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- copper
- emitter
- metal block
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- dbc
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83205—Ultrasonic bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Disclosed is a packaging structure of a power module. The packaging structure comprises a copper-clad ceramic substrate welded with an IGBT chip, the front surface of the IGBT chip is provided with a gate electrode and an emitter electrode, the back surface of the IGBT chip is provided with a collector electrode, and the periphery of the gate electrode and the emitter electrode is provided with a protection ring of an insulation structure; the surface of the gate electrode and the surface of the emitter electrode are respectively welded with a gate electrode metal block and an emitter electrode metal block through solder, and the thickness of the gate electrode metal block and the emitter electrode metal block is 0.1 to 1mm; the IGBT chip is welded to the collector electrode copper layer of the copper-clad ceramic substrate through the solder; the gate electrode metal block and the emitter electrode metal block of the IGBT chip are each prepared by use of a weldable metal from copper, silver, gold and nickel; the emitter electrode metal block is connected with an emitter electrode copper layer on the copper-clad ceramic substrate by use of supersonic wave bonding through a copper wire; and the gate electrode metal block is connected with the gate electrode copper layer on the copper-clad ceramic substrate by use of the supersonic wave bonding through a copper wire.
Description
Technical field
What the present invention relates to is a kind of encapsulating structure of power model, belongs to power module design and the encapsulation technology field of power electronics.
Background technology
Because the thermal coefficient of expansion of power semiconductor chip and the thermal coefficient of expansion of bonding line differ comparatively large, the inefficacy that power model the most easily produces in Long-Time Service process is that bonding point and chip surface depart from.The continuous increase of IGBT power chip current density simultaneously, traditional aluminum steel (band) can not meet the requirement of electrical connection.
Commaterial effectively can reduce the generation of intermetallic compound by ultrasonic bonding, thus improves the reliability of solder joint.Copper be all better than aluminium at indices, in all metals, the conductivity of copper is only second to silver, and simultaneously price is relatively cheap.Ultrasonic welding process has been comparatively ripe technology in power semiconductor package industry, but on chip, use the ultrasonic wave of relatively high power to carry out welding and easily cause chip broken.
Summary of the invention
The object of the invention is to the deficiency overcoming prior art existence, and provide a kind of rational in infrastructure, good reliability, can meet the encapsulating structure of the power model of modern electrical connection request.
The object of the invention is to have come by following technical solution, a kind of encapsulating structure of power model, it comprise one soldered have an igbt chip cover copper ceramic substrate, described igbt chip front is gate pole and emitter, the back side is collector electrode, has the guard ring of a circle insulation system in the surrounding of gate pole and emitter; Have gate metal block and emitter metal block on the described surface at gate pole and emitter by solder is soldered respectively, and the thickness of described gate metal block and emitter metal block is at 0.1-1mm; Described igbt chip is welded to by solder and covers in the collector electrode layers of copper of copper ceramic substrate.
Gate metal block and the emitter metal block of described igbt chip respectively can be made up by weld metal of the one in copper, silver, gold, nickel; Described emitter metal block is connected with the emitter layers of copper covered on copper ceramic substrate by copper cash supersonic bonding; Described gate metal block is connected with the gate pole layers of copper covered on copper ceramic substrate by copper cash supersonic bonding; The back side layers of copper covering copper ceramic substrate is welded on heat-radiating substrate by solder; One deck ceramic layer is had between the back side layers of copper covering copper ceramic substrate and the collector electrode layers of copper covering copper ceramic substrate, emitter layers of copper, gate pole layers of copper.
The emitter terminal of described igbt chip, collector terminal, gate terminal injection moulding are in a plastic housing; Described plastic casing and heat-radiating substrate are glued together by fluid sealant; Emitter terminal is connected by the mode of ultrasonic bonding with the emitter layers of copper covering copper ceramic substrate, collector terminal is connected by the mode of ultrasonic bonding with the collector electrode layers of copper covering copper ceramic substrate, and gate terminal is connected by the mode of ultrasonic bonding with the gate pole layers of copper covering copper ceramic substrate.
The present invention mainly welds layer of metal block on chip, also can to differ greatly the impact brought by cushioning semiconductor chip CTE while meeting copper wire bonding; It has rational in infrastructure, good reliability, can meet the features such as modern electrical connection request.
Accompanying drawing explanation
Fig. 1 is the front view of chip structure of the present invention.
Fig. 2 is the end view of chip structure of the present invention.
Fig. 3 is the front view of metal derby of the present invention.
Fig. 4 is the cross-sectional view of module of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention will be described in detail: shown in Fig. 1-4, the encapsulating structure of described a kind of power model, it comprise one soldered have an igbt chip cover copper ceramic substrate, described igbt chip front is gate pole G and emitter E, the back side is collector electrode C, has the guard ring 7 of a circle insulation system in the surrounding of gate pole and emitter; Have gate metal block 4 and emitter metal block 3 on the described surface in gate pole G and emitter E by solder is soldered respectively, and the thickness of described gate metal block 4 and emitter metal block 3 is at 0.1-1mm; Described igbt chip 8 be welded to by solder 9 cover copper ceramic substrate DBC collector electrode layers of copper 10 on.
The gate metal block 4 of described igbt chip and emitter metal block 3 respectively can be made up by weld metal of the one in copper, silver, gold, nickel; Described emitter metal block 3 is connected with the emitter layers of copper 11 covering copper ceramic substrate DBC by copper cash 1 supersonic bonding; Described gate metal block 3 by copper cash 2 with supersonic bonding with cover copper ceramic substrate DBC gate pole layers of copper 12 and be connected; The back side layers of copper 14 covering copper ceramic substrate DBC is welded on heat-radiating substrate 18 by solder 15; One deck ceramic layer 13 is had between the back side layers of copper 14 covering copper ceramic substrate DBC and the collector electrode layers of copper 10 covering copper ceramic substrate DBC, emitter layers of copper 11, gate pole layers of copper 12.
The emitter terminal 19 of described igbt chip, collector terminal 20, gate terminal 21 are injection-moulded in plastic casing 16; Described plastic casing 16 is glued together by fluid sealant 17 with heat-radiating substrate 18; Emitter terminal 19 is connected by the mode of ultrasonic bonding with the emitter layers of copper 8 covering copper ceramic substrate DBC, collector terminal 20 is connected by the mode of ultrasonic bonding with the collector electrode layers of copper 8 covering copper ceramic substrate DBC, and gate terminal 21 is connected by the mode of ultrasonic bonding with the gate pole layers of copper 12 covering copper ceramic substrate DBC.
Embodiment: Fig. 1,2 is depicted as the appearance assumption diagram of existing several igbt chip, and its front is gate pole G and emitter E, and the back side is collector electrode C, has a circle insulation system to be called guard ring 7 in the surrounding of gate pole G and emitter E.The igbt chip used in the present invention needs specific customization, and it is soldered on the surface of gate pole G and emitter E, and have can the metal derby made of weld metal by copper, silver, gold, nickel etc.
Shown in Fig. 2, the present invention manufactures different metal derbies according to the difference of gate pole G position, and separate between gate metal block 4 and emitter metal block 3.
Shown in Fig. 3, igbt chip 8 is welded in DBC collector electrode layers of copper 10 by solder 9.Emitter metal block 3 is welded to IGBT emitter by solder 5, and gate metal block 4 is welded to IGBT gate pole by solder 6, and the guard ring 7 between emitter and gate pole plays welding resistance effect when welding, and prevents the solder UNICOM of different interpolar from causing short circuit.Use supersonic bonding DBC emitter layers of copper 11 to be connected with emitter metal block 3 by copper cash 1, DBC gate pole layers of copper 12 is connected with gate metal block 3 by copper cash 2.DBC back side layers of copper 14 is welded on heat-radiating substrate 18 by solder 15.One deck ceramic layer 13 is had between DBC back side layers of copper 14 and DBC collector electrode layers of copper 10, emitter layers of copper 11, gate pole layers of copper 12.Emitter terminal 19, collector terminal 20, gate terminal 21 are injection-moulded in plastic casing 16.Plastic casing 16 and heat-radiating substrate 18 are glued together by fluid sealant 17.The mode that emitter terminal 19 crosses ultrasonic bonding with DBC emitter layers of copper 8 is connected, and collector terminal 20 is connected by the mode of ultrasonic bonding with the collector electrode layers of copper 8 of DBC, and gate terminal 21 is connected by the mode of ultrasonic bonding with the gate pole layers of copper 12 of DBC.
Claims (3)
1. the encapsulating structure of a power model, it comprise one soldered have an igbt chip cover copper ceramic substrate, it is characterized in that described igbt chip front is gate pole (G) and emitter (E), the back side is collector electrode (C), has the guard ring (7) of a circle insulation system in the surrounding of gate pole and emitter; Have gate metal block (4) and emitter metal block (3) on the described surface at gate pole (G) and emitter (E) by solder is soldered respectively, and the thickness of described gate metal block (4) and emitter metal block (3) is at 0.1-1mm; Described igbt chip (8) is welded to by solder (9) and covers in the collector electrode layers of copper (10) of copper ceramic substrate (DBC).
2. the encapsulating structure of power model according to claim 1, is characterized in that the gate metal block (4) of described igbt chip and emitter metal block (3) respectively can be made up by weld metal of the one in copper, silver, gold, nickel; Described emitter metal block (3) is connected with DBC emitter layers of copper (11) by copper cash (1) supersonic bonding; Described gate metal block (3) is connected with DBC gate pole layers of copper (12) by copper cash (2) supersonic bonding; The back side layers of copper (14) of DBC is welded on heat-radiating substrate (18) by solder (15); One deck ceramic layer (13) is had between DBC back side layers of copper (14) and DBC collector electrode layers of copper (10), emitter layers of copper (11), gate pole layers of copper (12).
3. the encapsulating structure of power model according to claim 1, is characterized in that the emitter terminal (19) of described igbt chip, collector terminal (20), gate terminal (21) are injection-moulded in plastic casing (16); Described plastic casing (16) and heat-radiating substrate (18) are glued together by fluid sealant (17); Emitter terminal (19) is connected by the mode of ultrasonic bonding with DBC emitter layers of copper (8), collector terminal (20) is connected by the mode of ultrasonic bonding with DBC collector electrode layers of copper (8), and gate terminal (21) is connected by the mode of ultrasonic bonding with DBC gate pole layers of copper (12).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510219849.2A CN104900546A (en) | 2015-05-04 | 2015-05-04 | Packaging structure of power module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510219849.2A CN104900546A (en) | 2015-05-04 | 2015-05-04 | Packaging structure of power module |
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| Publication Number | Publication Date |
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| CN104900546A true CN104900546A (en) | 2015-09-09 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510219849.2A Pending CN104900546A (en) | 2015-05-04 | 2015-05-04 | Packaging structure of power module |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105679691A (en) * | 2016-03-10 | 2016-06-15 | 嘉兴斯达半导体股份有限公司 | Detection method for connection quality of power module |
| CN108110459A (en) * | 2017-12-22 | 2018-06-01 | 江苏宏微科技股份有限公司 | A kind of high-power IPM module terminals connection structure |
| CN108292655A (en) * | 2015-11-12 | 2018-07-17 | 三菱电机株式会社 | Power module |
| CN111180404A (en) * | 2020-02-19 | 2020-05-19 | 华芯威半导体科技(北京)有限责任公司 | Power semiconductor module structure and preparation method |
| EP3654371A1 (en) | 2018-11-19 | 2020-05-20 | Delta Electronics (Shanghai) Co., Ltd. | Packaging structure for power module |
| CN111883493A (en) * | 2020-06-23 | 2020-11-03 | 西安理工大学 | IGBT module for electric automobile |
| CN112201628A (en) * | 2020-08-24 | 2021-01-08 | 株洲中车时代半导体有限公司 | Power module packaging structure and preparation method thereof |
| CN113035787A (en) * | 2019-12-25 | 2021-06-25 | 株洲中车时代半导体有限公司 | Reverse conducting type power semiconductor module packaging structure and packaging method thereof |
| CN117637674A (en) * | 2024-01-03 | 2024-03-01 | 广东巨风半导体有限公司 | IGBT module and production method |
| CN111180404B (en) * | 2020-02-19 | 2024-06-07 | 华芯威半导体科技(北京)有限责任公司 | Power semiconductor module structure and preparation method |
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| JP2006253516A (en) * | 2005-03-14 | 2006-09-21 | Hitachi Ltd | Power semiconductor device |
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| CN102881679A (en) * | 2012-09-24 | 2013-01-16 | 株洲南车时代电气股份有限公司 | IGBT (insulated gate bipolar transistor) chip integrating temperature and current sensing function |
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| US6297549B1 (en) * | 1998-05-15 | 2001-10-02 | Kabushiki Kaisha Toshiba | Hermetically sealed semiconductor power module and large scale module comprising the same |
| CN1430791A (en) * | 2000-04-04 | 2003-07-16 | 国际整流器公司 | Chip scale surface mounted device and its process of manufacture |
| JP2006253516A (en) * | 2005-03-14 | 2006-09-21 | Hitachi Ltd | Power semiconductor device |
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Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108292655A (en) * | 2015-11-12 | 2018-07-17 | 三菱电机株式会社 | Power module |
| CN108292655B (en) * | 2015-11-12 | 2021-01-01 | 三菱电机株式会社 | Power module |
| CN105679691A (en) * | 2016-03-10 | 2016-06-15 | 嘉兴斯达半导体股份有限公司 | Detection method for connection quality of power module |
| CN105679691B (en) * | 2016-03-10 | 2018-11-13 | 嘉兴斯达半导体股份有限公司 | A kind of detection method of power module quality of connection |
| CN108110459A (en) * | 2017-12-22 | 2018-06-01 | 江苏宏微科技股份有限公司 | A kind of high-power IPM module terminals connection structure |
| CN108110459B (en) * | 2017-12-22 | 2024-04-30 | 江苏宏微科技股份有限公司 | High-power IPM module terminal connection structure |
| US10818571B2 (en) | 2018-11-19 | 2020-10-27 | Delta Electronics (Shanghai) Co., Ltd. | Packaging structure for power module |
| EP3654371A1 (en) | 2018-11-19 | 2020-05-20 | Delta Electronics (Shanghai) Co., Ltd. | Packaging structure for power module |
| CN113035787A (en) * | 2019-12-25 | 2021-06-25 | 株洲中车时代半导体有限公司 | Reverse conducting type power semiconductor module packaging structure and packaging method thereof |
| CN113035787B (en) * | 2019-12-25 | 2024-04-19 | 株洲中车时代半导体有限公司 | Reverse conducting type power semiconductor module packaging structure and packaging method thereof |
| CN111180404A (en) * | 2020-02-19 | 2020-05-19 | 华芯威半导体科技(北京)有限责任公司 | Power semiconductor module structure and preparation method |
| CN111180404B (en) * | 2020-02-19 | 2024-06-07 | 华芯威半导体科技(北京)有限责任公司 | Power semiconductor module structure and preparation method |
| CN111883493A (en) * | 2020-06-23 | 2020-11-03 | 西安理工大学 | IGBT module for electric automobile |
| CN112201628A (en) * | 2020-08-24 | 2021-01-08 | 株洲中车时代半导体有限公司 | Power module packaging structure and preparation method thereof |
| CN117637674A (en) * | 2024-01-03 | 2024-03-01 | 广东巨风半导体有限公司 | IGBT module and production method |
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Application publication date: 20150909 |