CN104897943A - High-sensitivity low-power current detection circuit - Google Patents
High-sensitivity low-power current detection circuit Download PDFInfo
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- CN104897943A CN104897943A CN201510219151.0A CN201510219151A CN104897943A CN 104897943 A CN104897943 A CN 104897943A CN 201510219151 A CN201510219151 A CN 201510219151A CN 104897943 A CN104897943 A CN 104897943A
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- nmos tube
- pmos
- constant current
- current source
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Abstract
The invention relates to the technical field of a semiconductor integrated circuit, and specifically relates to a high-sensitivity low-power current detection circuit. The high-sensitivity low-power current detection circuit comprises a control switch, a first PMOS tube, a second PMOS tube, a third PMOS tube, a first constant current source, a second constant current source and a resistor. The high-sensitivity low-power current detection circuit realizes a current detection function, is low in overall circuit power consumption, has quite high detection sensitivity and can detect quite small currents, i.e., can allow input voltage signals to be quite close to power supply voltages. Besides, the sensitivity of the current detection circuit can be conveniently adjusted, and the circuit practicality is high.
Description
Technical field
The present invention relates to SIC (semiconductor integrated circuit) technical field, be specifically related to a kind of high sensitivity low-power current detection circuit.
Background technology
Along with the high speed development of Power Electronic Technique and the progress of semiconductor integration technology, various types of electronic product extensively enters daily life.In many power electronic equipment application scenarios, need to detect electric current.Especially sometimes needing the source current by detecting inflow equipment or chip, making corresponding feedback regulation with this.
The method detecting source current as shown in Figure 1, at an indirect small resistor of power supply and chip, realizes the object of current detecting by the change of measuring resistance port voltage.Therefore, the detection that the circuit of an ad hoc structure has come above-mentioned resistive voltage is needed.Traditional testing circuit complex structure, some circuit even needs to introduce amplifier, and power consumption is larger; The sensitivity of some testing circuit is not high, requires that power supply will reach certain resistance to the resistance of chip, directly can affect the efficiency of Power supply thus.。
Summary of the invention
The technical problem to be solved in the present invention is, the shortcoming such as sensitivity not high, efficiency low large for conventional current testing circuit complex structure power consumption, provides a kind of high sensitivity low-power current detection circuit.
In order to solve the problems of the technologies described above, the present invention includes gauge tap, the first PMOS, the second PMOS, the 3rd PMOS, the first constant current source, the second constant current source and resistance, the source electrode of described first PMOS connects input voltage signal, the drain electrode of described first PMOS connects the first end of described first constant current source, the grid of described first PMOS connects the grid of described second PMOS, the grid of described second PMOS connects the drain electrode of described second PMOS and the first end of described second constant current source, the source electrode of described second PMOS connects the second end of described gauge tap and the source electrode of described 3rd PMOS, the breadth length ratio of described second PMOS is greater than the breadth length ratio of described first PMOS, the grid of described 3rd PMOS connects the drain electrode of described first PMOS and the first end of described first constant current source, the first end of the drain electrode connecting resistance of described 3rd PMOS and output voltage signal, second end ground connection of described resistance, second end ground connection of described first constant current source and the second constant current source, first termination power of described gauge tap.
Preferably, described first constant current source and the second constant current source are by constant current source, first NMOS tube, second NMOS tube and the 3rd NMOS tube composition, one termination power of described constant current source, the drain and gate of another termination first NMOS tube, the source ground of the first NMOS tube, the grid of the second NMOS tube connects the grid of the first NMOS tube, the source ground of the second NMOS tube, the drain electrode of the second NMOS tube connects the drain electrode of the first PMOS, the source ground of the 3rd NMOS tube, the grid of the 3rd NMOS tube connects the grid of the first NMOS tube, the drain electrode of the 3rd NMOS tube connects the drain electrode of the second PMOS.
Preferably, described gauge tap is analog switch.
Preferably, described gauge tap is the 4th PMOS, and described 4th PMOS source electrode connects power supply, grounded-grid, and drain electrode connects the source electrode of the 3rd PMOS.
The present invention adopts very simple circuit structure, and achieve the function of current detecting, circuit integrity power consumption is lower, and the present invention has higher detection sensitivity, can detect smaller electric current, also can allow input voltage signal closely supply voltage.In addition, the sensitivity of current detection circuit of the present invention facilitates adjustable, and circuit is practical.
Accompanying drawing explanation
Fig. 1 is the circuit theory diagrams of traditional detection source current;
Fig. 2 is circuit theory diagrams of the present invention;
Fig. 3 is the circuit theory diagrams of the specific embodiment of the invention;
Fig. 4 is the schematic diagram of the current detection circuit flowing into negative supply for detection chip or flow into ground.
Embodiment
Embodiment cited by the present invention; just understand the present invention for helping; should not be construed as limiting the scope of the present invention; for those skilled in the art; without departing from the inventive concept of the premise; can also improve the present invention and modify, these improve and modification also falls in the scope of the claims in the present invention protection.
As shown in Figure 2, gauge tap K, the first PMOS MP1, the second PMOS MP2, the 3rd PMOS MP3, the first constant current source I is comprised
1, the second constant current source I
2with resistance R; The source electrode of described first PMOS MP1 meets input voltage signal V
s, the drain electrode of described first PMOS MP1 meets described first constant current source I
1first end, the grid of described first PMOS MP1 connects the grid of described second PMOS MP2, and the grid of described second PMOS MP2 meets the drain electrode of described second PMOS MP2 and described second constant current source I
2first end, the source electrode of described second PMOS connects the second end of described gauge tap and the source electrode of described 3rd PMOS, the breadth length ratio of described second PMOS MP2 is greater than the breadth length ratio of described first PMOS MP1, and the grid of described 3rd PMOS MP3 meets the drain electrode of described first PMOS MP1 and described first constant current source I
1first end, the first end of the drain electrode connecting resistance R of described 3rd PMOS MP3 and output voltage signal V
o, the second end ground connection of described resistance R, described first constant current source I
1with the second constant current source I
2the second end ground connection, the first termination power vd D of described gauge tap K.
As embodiments of the invention, as shown in Figure 3, described first constant current source I
1with the second constant current source I
2by constant current source I, first NMOS tube MN1, second NMOS tube MN2 and the 3rd NMOS tube MN3 forms, the one termination power vd D of described constant current source I, the drain and gate of another termination first NMOS tube MN1, the source ground of the first NMOS tube MN1, the grid of the second NMOS tube MN2 connects the grid of the first NMOS tube MN1, the source ground of the second NMOS tube MN2, the drain electrode of the second NMOS tube MN2 connects the drain electrode of the first PMOS MP1, the source ground of the 3rd NMOS tube MN3, the grid of the 3rd NMOS tube MN3 connects the grid of the first NMOS tube MN1, the drain electrode of the 3rd NMOS tube MN3 connects the drain electrode of the second PMOS MP2.
Specific works principle of the present invention is as follows:
First NMOS tube MN1, the second NMOS tube MN2 and the 3rd NMOS tube MN3 form current mirror, the circuit flowing through the first PMOS MP1 and the second PMOS MP2 when ensureing circuit stability is constant, 4th PMOS MP4 works in triode region always, and its effect is equivalent to the normal analog switch opened.Assuming that cause input voltage signal Vs to reduce because of the change of sensed current, the grid voltage of the second PMOS MP2 can corresponding reduction, and be the electric current keeping flow through the second PMOS MP2 be constant, the source voltage of the second PMOS MP2 also can reduce, the electric current flowing through the 4th PMOS MP4 thus can increase, thus the electric current pouring into the 3rd PMOS MP4 and resistance R can corresponding increase, output voltage signal can raise.Assuming that the variable quantity of input voltage signal Vs is Δ V, the variable quantity being also then the 3rd PMOS MP3 source voltage according to above analysis the 4th PMOS MP4 drain voltage is also Δ V, but the electric current flowing through the 3rd PMOS MP3 pipe is increase tendency, therefore the variable quantity of the 3rd PMOS MP3 grid voltage can be greater than Δ V, again because the 3rd PMOS MP3 works in saturation region, therefore output voltage Vo can present obvious change.For ensureing that circuit has enough detection sensitivities, the breadth length ratio of the second PMOS MP2 must be larger than the breadth length ratio of the first PMOS MP1.By the resistance of the breadth length ratio and resistance R that increase the second PMOS MP2, the sensitivity of this current detection circuit can be improved.
The present invention also provides a kind of testing circuit flowing into the electric current on negative supply or inflow ground for detection chip, comprises the first constant current source I1, the second constant current source I2, the first NMOS tube MN1, the second NMOS tube MN2, the 3rd NMOS tube MN3, resistance R, analog switch K.Wherein, the source electrode of the first NMOS tube MN1 meets input voltage Vs, the drain electrode of the first NMOS tube MN1 connects the second end of the first constant current source, the grid of the first NMOS tube MN1 connects the grid of the second NMOS tube MN2 and the drain electrode of the second NMOS tube MN2, first termination positive supply VDD of the first constant current source, the drain electrode of the second NMOS tube MN2 connects the second end of the second constant current source, the source electrode of the second NMOS tube MN2 connects the first end of analog switch K, the breadth length ratio of the second NMOS tube MN2 is greater than the first NMOS tube MN1 breadth length ratio, the positive VDD of first termination power of the second constant current source, the second termination negative supply VSS of one analog switch K, the first termination positive supply VDD of resistance R, the drain electrode of the second termination the 3rd NMOS tube MN3 of resistance R and output voltage signal Vo, the grid of the 3rd NMOS tube MN3 connects the drain electrode of the first NMOS tube MN1, the source electrode of the 3rd NMOS tube MN3 connects the first end of analog switch K.
Claims (5)
1. high sensitivity low-power current detection circuit, is characterized in that, comprises gauge tap (K), the first PMOS (MP1), the second PMOS (MP2), the 3rd PMOS (MP3), the first constant current source (I
1), the second constant current source (I
2) and resistance (R); The source electrode of described first PMOS (MP1) meets input voltage signal (V
s), the drain electrode of described first PMOS (MP1) meets described first constant current source (I
1) first end, the grid of described first PMOS (MP1) connects the grid of described second PMOS (MP2), and the grid of described second PMOS (MP2) meets the drain electrode of described second PMOS (MP2) and described second constant current source (I
2) first end, the source electrode of described second PMOS connects the second end of described gauge tap and the source electrode of described 3rd PMOS, the breadth length ratio of described second PMOS (MP2) is greater than the breadth length ratio of described first PMOS (MP1), and the grid of described 3rd PMOS (MP3) meets the drain electrode of described first PMOS (MP1) and described first constant current source (I
1) first end, the first end of the drain electrode connecting resistance (R) of described 3rd PMOS (MP3) and output voltage signal (V
o), the second end ground connection of described resistance (R), described first constant current source (I
1) and the second constant current source (I
2) the second end ground connection, first termination power (VDD) of described gauge tap (K).
2. high sensitivity low-power current detection circuit according to claim 1, is characterized in that, described first constant current source (I
1) and the second constant current source (I
2) by constant current source (I), first NMOS tube (MN1), second NMOS tube (MN2) and the 3rd NMOS tube (MN3) composition, one termination power (VDD) of described constant current source (I), the drain and gate of another termination first NMOS tube (MN1), the source ground of the first NMOS tube (MN1), the grid of the second NMOS tube (MN2) connects the grid of the first NMOS tube (MN1), the source ground of the second NMOS tube (MN2), the drain electrode of the second NMOS tube (MN2) connects the drain electrode of the first PMOS (MP1), the source ground of the 3rd NMOS tube (MN3), the grid of the 3rd NMOS tube (MN3) connects the grid of the first NMOS tube (MN1), the drain electrode of the 3rd NMOS tube (MN3) connects the drain electrode of the second PMOS (MP2).
3. high sensitivity low-power current detection circuit according to claim 1 or 2, is characterized in that, described gauge tap (K) is analog switch.
4. high sensitivity low-power current detection circuit according to claim 1 or 2, it is characterized in that, described gauge tap (K) is the 4th PMOS (MP4), and described 4th PMOS (MP4) source electrode connects power supply (VDD), grounded-grid, drain electrode connects the source electrode of the 3rd PMOS (MP3).
5. detection chip flows into negative supply or flows into the high sensitivity low-power current detection circuit of vagabond current, it is characterized in that, comprises the first constant current source (I
1), the second constant current source (I
2), the first NMOS tube (MN1), the second NMOS tube (MN2), the 3rd NMOS tube (MN3), resistance (R), analog switch (K), the source electrode of described first NMOS tube (MN1) connects input voltage (Vs), and the drain electrode of the first NMOS tube (MN1) meets the first constant current source (I
1) the second end, the grid of the first NMOS tube (MN1) connects the grid of the second NMOS tube (MN2) and the drain electrode of the second NMOS tube (MN2), the first constant current source (I
1) the first termination positive supply (VDD), the drain electrode of the second NMOS tube (MN2) meets the second constant current source (I
2) the second end, the source electrode of the second NMOS tube (MN2) connects the first end of analog switch (K), and the breadth length ratio of the second NMOS tube (MN2) is greater than the first NMOS tube (MN1) breadth length ratio, the second constant current source (I
2) the first termination positive supply (VDD), second termination negative supply (VSS) of analog switch (K), first termination positive supply (VDD) of resistance (R), the drain electrode of second termination the 3rd NMOS tube (MN3) of resistance (R) and output voltage signal (Vo), the grid of the 3rd NMOS tube (MN3) connects the drain electrode of the first NMOS tube (MN1), and the source electrode of the 3rd NMOS tube (MN3) connects the first end of analog switch (K).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510219151.0A CN104897943A (en) | 2015-04-30 | 2015-04-30 | High-sensitivity low-power current detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510219151.0A CN104897943A (en) | 2015-04-30 | 2015-04-30 | High-sensitivity low-power current detection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN104897943A true CN104897943A (en) | 2015-09-09 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510219151.0A Pending CN104897943A (en) | 2015-04-30 | 2015-04-30 | High-sensitivity low-power current detection circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108957100A (en) * | 2018-07-27 | 2018-12-07 | 无锡雷利电子控制技术有限公司 | A kind of current detection means |
| CN109039071A (en) * | 2018-08-20 | 2018-12-18 | 无锡麟力科技有限公司 | A kind of switching-on and switching-off state detection circuit |
| CN115356513A (en) * | 2022-08-09 | 2022-11-18 | 苏州聚元微电子股份有限公司 | Digital detection circuit for power supply fluctuation |
| CN116107946A (en) * | 2023-04-14 | 2023-05-12 | 苏州水芯电子科技有限公司 | USB device insertion detection circuit and USB chip |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101839941A (en) * | 2010-06-02 | 2010-09-22 | 西南交通大学 | Signal sensing amplifier |
| JP2014021090A (en) * | 2012-07-24 | 2014-02-03 | Panasonic Corp | Current detection circuit and ultrasonic diagnostic apparatus using the current detection circuit |
| CN103969494A (en) * | 2014-04-30 | 2014-08-06 | 广州钧衡微电子科技有限公司 | High-precision current detecting circuit and current-limiting device applying same |
-
2015
- 2015-04-30 CN CN201510219151.0A patent/CN104897943A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101839941A (en) * | 2010-06-02 | 2010-09-22 | 西南交通大学 | Signal sensing amplifier |
| JP2014021090A (en) * | 2012-07-24 | 2014-02-03 | Panasonic Corp | Current detection circuit and ultrasonic diagnostic apparatus using the current detection circuit |
| CN103969494A (en) * | 2014-04-30 | 2014-08-06 | 广州钧衡微电子科技有限公司 | High-precision current detecting circuit and current-limiting device applying same |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108957100A (en) * | 2018-07-27 | 2018-12-07 | 无锡雷利电子控制技术有限公司 | A kind of current detection means |
| CN109039071A (en) * | 2018-08-20 | 2018-12-18 | 无锡麟力科技有限公司 | A kind of switching-on and switching-off state detection circuit |
| CN109039071B (en) * | 2018-08-20 | 2023-12-01 | 无锡麟力科技有限公司 | Power switch state detection circuit |
| CN115356513A (en) * | 2022-08-09 | 2022-11-18 | 苏州聚元微电子股份有限公司 | Digital detection circuit for power supply fluctuation |
| CN115356513B (en) * | 2022-08-09 | 2023-09-01 | 苏州聚元微电子股份有限公司 | Digital detection circuit for power supply fluctuation |
| CN116107946A (en) * | 2023-04-14 | 2023-05-12 | 苏州水芯电子科技有限公司 | USB device insertion detection circuit and USB chip |
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Application publication date: 20150909 |
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