CN104881339A - Testing device, testing method and display system - Google Patents
Testing device, testing method and display system Download PDFInfo
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- CN104881339A CN104881339A CN201510253744.9A CN201510253744A CN104881339A CN 104881339 A CN104881339 A CN 104881339A CN 201510253744 A CN201510253744 A CN 201510253744A CN 104881339 A CN104881339 A CN 104881339A
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- 238000012360 testing method Methods 0.000 title claims abstract description 25
- 238000003860 storage Methods 0.000 claims abstract description 17
- 230000015654 memory Effects 0.000 claims description 72
- 238000007906 compression Methods 0.000 claims description 38
- 238000009434 installation Methods 0.000 claims description 36
- 230000006835 compression Effects 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 18
- 238000010998 test method Methods 0.000 claims description 14
- 239000004973 liquid crystal related substance Substances 0.000 claims description 10
- 230000001360 synchronised effect Effects 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 abstract description 3
- 230000014759 maintenance of location Effects 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 241001269238 Data Species 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
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Abstract
The invention discloses a testing device, a testing method and a display system. The testing device comprises a secure digital card, a field-programmable gate array and a storage unit; the secure digital card is used for storing code data; the field-programmable gate array is connected with the secure digital card and used for reading the code data stored in the secure digital card and compressing the code data; the storage unit is connected with the field-programmable gate array and used for caching the code data compressed by the field-programmable gate array, and the storage unit comprises a plurality of storages; the field-programmable gate array is further used for calling the compressed code data cached in the storages, and decompressing and decoding the compressed code data to output test signals. The testing device, display system and testing method use the field-programmable gate array to compress the code data, the data processing and computing speed is fast, and the data transmission efficiency and the processor use ratio are improved.
Description
Technical field
The present invention relates to technical field of liquid crystal display, particularly relate to a kind of proving installation, adopt the display system of described proving installation and a kind of method of testing.
Background technology
Along with developing rapidly of display technique, there is liquid crystal display (Liquid Crystal Display, LCD) technology, the various field and it is widely used, as mobile phone, computer and other various equipment, instruments having display demand.
At present, the liquid crystal module picture display proving installation below existing 2k and 2560*1440 resolution, major part uses advanced reduced instruction set machine (Advanced RISC Machines, ARM) as driving chip.Because ARM chip internal is integrated with the module such as liquid crystal display, picture decode, simplify the complicacy of programming greatly, welcome so use ARM to be subject to most people as liquid crystal module display driver chip.But, the data processing of ARM, arithmetic speed lag far behind field programmable gate array (Field-Programmable Gate Array, FPGA), and use ARM chip for current field of liquid crystal display, its most of function is not used to, and this is also a kind of waste of resource undoubtedly.
Therefore, need to provide a kind of proving installation, this proving installation comprises data processing and the high driving chip of arithmetic speed, and it can solve above-mentioned problems of the prior art.
Summary of the invention
In view of above problem, the invention provides a kind of proving installation, its data processing and arithmetic speed high, the used time is few, and utilization factor is high.
A kind of proving installation provided by the invention, for exporting test signal to display device, to judge whether described display device can normally show, described proving installation comprises safe number card, field programmable gate array and storage unit.Described safe digital card is used for memory encoding data.Described field programmable gate array is connected with described safe digital card, for reading in described safe digital card the described coded data stored, and described coded data is carried out compression process.Described storage unit is connected with described field programmable gate array, and for the coded data after described field programmable gate array compression is carried out buffer memory, and described storage unit comprises multiple storer.Wherein, described field programmable gate array also for call buffer memory in described multiple storer described compression after coded data, and the coded data after described compression is carried out the process that decompresses and decode, to export described test signal.
Further, the coded data after described compression is the positional information of the pixel that the Benchmark brightness value information of pixel and its brightness value are identical with described Benchmark brightness value.
Further, the Benchmark brightness value of described pixel comprises multiple different pixel brightness value.
Further, the number of described multiple storer is two, and described storer is synchronous DRAM.
Further, described proving installation also comprises clock and reseting module, and described clock is connected with reseting module and described safe digital card, described field programmable gate array, described first memory and described second memory and provides the clock signal needed for work.
The present invention also provides a kind of display system, and described display system comprises display module and proving installation as above.The test signal that described display module exports for receiving described field programmable gate array, and output display picture.
Further, described display module is liquid crystal display.
The present invention also provides a kind of method of testing, described method of testing for exporting test signal to display device, to judge whether described display device can normally show, and described method of testing comprises step: by coding after data store; Read coded data, and described coded data is carried out compression process; Coded data after compression is carried out buffer memory; Call the coded data after described compression, and the coded data after described compression is carried out the process that decompresses and decode, to export described test signal.
Further, described coded data is carried out compression process and also comprise step: get the brightness value of a pixel as Benchmark brightness value, and all pixel brightness values absolute value of the GTG difference with described Benchmark brightness value being less than setting value are all set as described Benchmark brightness value, record the positional information of the Benchmark brightness value information of described pixel and its brightness value pixel identical with described Benchmark brightness value.
Further, described Benchmark brightness value comprises multiple different pixel brightness value, and the absolute value of difference between every two adjacent pixel Benchmark brightness values is more than or equal to the value that twice setting value deducts.
Proving installation of the present invention, the display system adopting proving installation and method of testing adopt field programmable gate array as processor, field programmable gate array is utilized to carry out compression process to coded data, and be cached in multiple storer, proving installation data processing and arithmetic speed are improved, improves the efficiency of data transmission and the utilization factor of processor.
Accompanying drawing explanation
Fig. 1 is the module diagram of the proving installation of one embodiment of the invention.
Fig. 2 a-Fig. 2 g is the first memory of the proving installation of one embodiment of the invention and the data access process schematic of second memory.
Fig. 3 is the pixel brightness value schematic diagram of the part display frame of the proving installation of one embodiment of the invention.
Fig. 4 is the module diagram of the display system of one embodiment of the invention.
Fig. 5 is the flow chart of steps of the method for testing of one embodiment of the invention.
Embodiment
For further setting forth the present invention for the technological means reaching predetermined goal of the invention and take and effect, below in conjunction with accompanying drawing and preferred embodiment, to the proving installation proposed according to the present invention, display system and its embodiment of method of testing, method, step, structure, feature and effect, be described in detail as follows.
Aforementioned and other technology contents, feature and effect for the present invention, can clearly present in the detailed description of following cooperation with reference to graphic preferred embodiment.By the explanation of embodiment, when can to the present invention for the technological means reaching predetermined object and take and effect be able to more deeply and concrete understanding, however institute's accompanying drawings be only to provide with reference to and the use of explanation, be not used for being limited the present invention.
Refer to Fig. 1, Fig. 1 is the module diagram of the proving installation of one embodiment of the invention, and as shown in Figure 1, proving installation comprises safe digital card 10, field programmable gate array 12 and storage unit, and wherein storage unit comprises multiple storer.In invention one embodiment, storage unit comprises two storeies, is first memory 14 and second memory 16 respectively.Be understandable that, the number of the storer that storage unit comprises is not limited to two.
Wherein, safe digital card 10, for memory encoding data.Field programmable gate array 12 is connected with safe digital card 10, for reading the coded data stored in safe digital card 10, and coded data is carried out compression process.First memory 14 and second memory 16 are all connected with field programmable gate array 12, carry out buffer memory for the coded data after being compressed by field programmable gate array 12.Further, field programmable gate array 10 also for call buffer memory in first memory 14 and second memory 16 compression after coded data, and the coded data after compression is carried out the process that decompresses and decode, to export test signal.
Wherein, proving installation also comprises clock and reseting module (not shown), clock is connected with reseting module and safe digital card 10, field programmable gate array 12, first memory 14 and second memory 16, and it is safe digital card 10, field programmable gate array 12, first memory 14 and second memory 16 provide clock signal needed for work.In addition, in the present embodiment, coded data is with bitmap (Bitmap, BMP) form exists, BMP format data structure comprises file information head, message bit pattern head, color table and RGB color array, and BMP data are when storing, being by from left to right storing in scan line, is from top to bottom between scan line.
Be the first memory 14 of the proving installation of one embodiment of the invention and the data access process schematic of second memory 16 please refer to Fig. 2 a-Fig. 2 g, Fig. 2 a-Fig. 2 g.As shown in Fig. 2 a-Fig. 2 c, first memory 14 and second memory 16 are synchronous DRAM (SynchronousDynamic Random Access Memory, SDRAM).In the present embodiment, can the coded data after field programmable gate array 12 compresses first be stored in first memory 14, if when the memory space inadequate of first memory 14 is to store all data, the coded data after field programmable gate array 12 compresses can be stored in second memory 16.What certainly it will be appreciated by those skilled in the art that is, also can the coded data after field programmable gate array 12 compresses first be stored in second memory 16, if when the memory space inadequate of second memory 16 is to store all data, the coded data after field programmable gate array 12 compresses can be stored in first memory 14; In addition also the data after field programmable gate array 12 compresses can be stored in simultaneously first memory 14 with second memory 16.
Further, as shown in Fig. 2 d-Fig. 2 g, when field programmable gate array calls the coded data after the compression be stored in first memory 14 and second memory 16, first can call the coded data after the coded data after the compression in first memory 14 or the compression in second memory 16, also can call the coded data after the compression in first memory 14 and second memory 16 simultaneously.It should be noted that, the storage of first memory 14 and second memory 16 pairs of data is carried out with calling simultaneously, such as, when the data in field programmable gate array 12 pairs of first memories 14 are called, also can carry out the storage of data simultaneously, that is, field programmable gate array 12 is by after a part of data call in first memory 14, now, first memory 14 internal memory there is certain clearance spaces, therefore field programmable gate array 12 can store data in first memory 14.Same, when the data in field programmable gate array 12 pairs of second memories 16 are called, also can carry out the storage of data simultaneously, that is, field programmable gate array 12 is by after a part of data call in second memory 16, now, second memory 16 internal memory there is certain clearance spaces, therefore field programmable gate array 12 can store data in second memory 16.
Fig. 3 is the pixel brightness value schematic diagram of the part display frame of the proving installation of one embodiment of the invention, and as shown in Figure 3, the pel array of the 3*3 of part display frame, every a line pel array includes the first pixel 1, second pixel 2 and the 3rd pixel 3.The brightness value of the first pixel 1 of the pel array of the first row is GTG 125, and the brightness value of the second pixel 2 of the pel array of the first row is green 255, and the brightness value of the 3rd pixel 2 of the pel array of the first row is GTG 123.The brightness value of the first pixel 1 of the pel array of the second row is GTG 122, and the brightness value of the second pixel 2 of the pel array of the second row is white 255, and the brightness value of the 3rd pixel 3 of the second row is GTG 125.The brightness value of first pixel 1 of the third line is red 255, and the brightness value of second pixel 2 of the third line is white 255, and the brightness value of the 3rd pixel 3 of the third line is GTG 120.
Wherein, the brightness value of the sub-pixel red, green, blue that what the GTG 125 of the first pixel 1 of the first row represented is in pixel 1 is 125, it can thus be appreciated that, the brightness value of the sub-pixel red, green, blue in the 3rd pixel 3 of the first row is 123, the brightness value of the sub-pixel red, green, blue in the first pixel 1 of the second row is 122, the brightness value of the sub-pixel red, green, blue in the 3rd pixel 3 of the second row is 125, and the brightness value of the sub-pixel red, green, blue in the 3rd pixel 3 of the third line is 120.In addition, the brightness value of the second pixel 2 of the first row be green 255 representatives be that this second pixel 2 only shows green, the brightness value of first pixel 1 of same the third line be red 255 representatives be that this first pixel 1 only shows redness, and the second pixel 2 of the second row and the brightness value of second pixel 2 of the third line are that white 255 what represent is that the brightness value of sub-pixel red, green, blue three kinds of colors of these two pixels is identical and reach maximum, now, picture is shown as complete white picture.Wherein, GTG represents picture by the most secretly to the stratum level of different brightness value the brightest.
In an embodiment of the present invention, field programmable gate array 12 can using the pixel brightness value of in above-mentioned pel array as Benchmark brightness value, such as GTG 120.Certainly, in other embodiments of the present invention, all pixel brightness values that also GTG difference in above-mentioned pel array can be less than setting value (such as setting value is 5) are averaged, and using this mean value as a Benchmark brightness value.In the present embodiment, field programmable gate array 12 using GTG 120 as Benchmark brightness value, and the brightness value being less than other pixels of setting value (such as setting value is 5) with the brightness value absolute value that is the difference of GTG 120 is all set as GTG 120 by field programmable gate array 12, and record the positional information of this Benchmark brightness value information and its brightness value pixel identical with this Benchmark brightness value.That is, field programmable gate array 12 compress after coded data be the positional information of the pixel that the Benchmark brightness value information of pixel and its brightness value are identical with Benchmark brightness value.In the present embodiment, the Benchmark brightness value of pixel comprises multiple different pixel brightness value, and the absolute value of the difference between every two adjacent pixel Benchmark brightness values is more than or equal to the value that twice setting value deducts.Such as, be the next Benchmark brightness value that GTG 120 is adjacent with Benchmark brightness value be GTG 129.
Refer to Fig. 4, Fig. 4 is the module diagram of the display system of one embodiment of the invention, and as shown in Figure 4, display system comprises proving installation as shown in Figure 1 and shows module 18, the test signal that display module 18 exports for receiving field programmable gate array 12, and output display picture.In one embodiment of this invention, show module 18 and can be liquid crystal display.
Refer to Fig. 5, Fig. 5 is the flow chart of steps of the method for testing of one embodiment of the invention, method of testing of the present invention for exporting test signal to display device, to judge whether display device can normally show.Please also refer to Fig. 4 and Fig. 5, method of testing comprises step:
S41: the data after coding are stored; In this step, data after coding are with bitmap (Bitmap, BMP) form is stored in safe digital card 10, BMP format data structure comprises file information head, message bit pattern head, color table and RGB color array, and, BMP data are when storing, and being by from left to right storing in scan line, is from top to bottom between scan line.
S42: read coded data, and coded data is carried out compression process; In this step, field programmable gate array 12 reads the coded data be stored in safe digital card 10, and this coded data is carried out compression process.The specific implementation method that coded data is carried out compressing process with the associated description of Fig. 1 in done detailed announcement, therefore not repeat them here.
S43: the coded data after compression is carried out buffer memory; In this step, field programmable gate array 12 by compression after coded data buffer memory in first memory 14 and second memory 16, because the data of buffer memory in first memory 14 and second memory 16 are the coded data that field programmable gate array 12 compresses after process, therefore can store the coded data after more compression process in first memory 14 and second memory 16, and the data output speed between field programmable gate array 12 and first memory 14 and second memory 16 improves.
S44: call the coded data after compression, and the coded data after compression is carried out the process that decompresses and decode, to export test signal.In this step, field programmable gate array 12 by the coded data after the compression that is stored in first memory 14 and second memory 16, and carries out decompression and decoding process to the coded data after compression.In the present embodiment, coded data after field programmable gate array 12 pairs of decompress(ion)s is decoded, because data are according to BMP said shank, namely mode from left to right, from top to bottom stores, and the data of display are from top to bottom in display module 18, mode from left to right shows, and therefore field programmable gate array 12 needs to decode to the BMP file of coding, to make on its display screen that can be presented at display module 18 normally.
Proving installation of the present invention, the display system adopting proving installation and method of testing adopt field programmable gate array 12 as processor, field programmable gate array 12 pairs of coded datas are utilized to carry out compression process, and be cached in multiple storer, proving installation data processing and arithmetic speed are improved, improves the efficiency of data transmission and the utilization factor of processor.
Apply specific case herein to set forth proving installation of the present invention, display system and method for testing and embodiment, the explanation of above embodiment just understands method of the present invention and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, to sum up, this description should not be construed as limitation of the present invention.
Claims (10)
1. a proving installation, for exporting test signal to display device, to judge whether described display device can normally show, and it is characterized in that, described proving installation comprises:
Safe digital card, described safe digital card is used for memory encoding data;
Field programmable gate array, described field programmable gate array is connected with described safe digital card, for reading in described safe digital card the described coded data stored, and described coded data is carried out compression process; And
Storage unit, is connected with described field programmable gate array, and for the coded data after described field programmable gate array compression is carried out buffer memory, and described storage unit comprises multiple storer:
Wherein, described field programmable gate array also for call buffer memory in described multiple storer described compression after coded data, and the coded data after described compression is carried out the process that decompresses and decode, to export described test signal.
2. proving installation as claimed in claim 1, is characterized in that, the coded data after described compression is the positional information of the pixel that the Benchmark brightness value information of pixel and its brightness value are identical with described Benchmark brightness value.
3. proving installation as claimed in claim 2, it is characterized in that, the Benchmark brightness value of described pixel comprises multiple different pixel brightness value.
4. proving installation as claimed in claim 1, it is characterized in that, the number of described multiple storer is two, and described storer is synchronous DRAM.
5. proving installation as claimed in claim 1, it is characterized in that, described proving installation also comprises clock and reseting module, and described clock is connected with reseting module and described safe digital card, described field programmable gate array, described first memory and described second memory and provides the clock signal needed for work.
6. a display system, is characterized in that, described display system comprises the proving installation as claim 1 to 5 any one, and described display system also comprises:
Display module, for receiving the test signal that described field programmable gate array exports, and output display picture.
7. display system as claimed in claim 6, it is characterized in that, described display module is liquid crystal display.
8. a method of testing, for exporting test signal to display device, to judge whether described display device can normally show, and it is characterized in that, described method of testing comprises step:
Data after coding are stored;
Read coded data, and described coded data is carried out compression process;
Coded data after compression is carried out buffer memory;
Call the coded data after described compression, and the coded data after described compression is carried out the process that decompresses and decode, to export described test signal.
9. method of testing as claimed in claim 8, is characterized in that, described coded data is carried out compression process and comprises step further:
Get the brightness value of a pixel as Benchmark brightness value, and the brightness value absolute value of the GTG difference with described Benchmark brightness value being less than all pixels of setting value is all set as described Benchmark brightness value, record the positional information of the Benchmark brightness value information of described pixel and its brightness value pixel identical with described Benchmark brightness value.
10. method of testing as claimed in claim 9, it is characterized in that, described Benchmark brightness value comprises multiple different pixel brightness value, and the absolute value of difference between every two adjacent pixel Benchmark brightness values is more than or equal to the value that twice setting value deducts.
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