CN104865854B - A kind of chip controls method and device - Google Patents
A kind of chip controls method and device Download PDFInfo
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- CN104865854B CN104865854B CN201510133711.0A CN201510133711A CN104865854B CN 104865854 B CN104865854 B CN 104865854B CN 201510133711 A CN201510133711 A CN 201510133711A CN 104865854 B CN104865854 B CN 104865854B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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Abstract
This application provides a kind of chip controls method and device, it is worth using the very first time, second time value and baseband processing chip are in the foundation that the end period of the first state is switched over as rf chip between each state, and the signal for not using the pin output of baseband processing chip is used as the switching foundation of rf chip, therefore, as long as according to the work schedule setting very first time value of rf chip and the second time value, the rf chip that may be implemented under different operating sequential is cooperated with using the correct of baseband processing chip, so as to realize the purpose of proper communication.
Description
Technical field
The application is related to electronic information field, more particularly to a kind of chip controls method and device.
Background technology
, it is necessary to realize transmitting-receiving and the baseband signal of radiofrequency signal using two pieces of different chips in the small base station designs of LTE
Processing, the most frequently used method be realize radio-frequency receiving-transmitting using rf chip (such as chip AD9361), using base band at
Reason chip (such as chip BSC9132) realizes Base-Band Processing.
When being operated in tdd mode due to rf chip (such as chip AD9361), during the startup of D/A conversion unit
Between need about 18us, so there is the problem of time delay is big, and rf chip (such as chip AD9361) is operated in fdd mode
When, time delay can be substantially reduced.But because baseband processing chip (such as chip BSC9132) is operated in tdd mode, this
In the case of, the work schedules of two chips is different, if directly come the communication for carrying out data, link is by cisco unity malfunction.
It can be seen that, in the case where rf chip is different from the work schedule of baseband processing chip, how to realize both
Proper communication, as current urgent problem to be solved.
The content of the invention
This application provides a kind of control method of chip and chip controls device, it is therefore intended that solves in radio-frequency receiving-transmitting core
In the case that piece is different from the work schedule of baseband processing chip, the problem of how realizing both proper communications.
To achieve these goals, this application provides following technical scheme：
A kind of chip controls method, including：
If rf chip continues in the flush cycles of the second state when the flush cycles of second state
After very first time value, the first control signal is sent to the rf chip, first control signal is used to penetrate described
Frequency transceiving chip is switched to the latent period of first state, when the very first time is worth the work according to the rf chip
Sequence is set；
If the rf chip is after the latent period of the first state continues the second time value, penetrated to described
Frequency transceiving chip sends the second control signal, and second control signal is used to the rf chip being switched to described the
The beginning cycle of one state, second time value is set according to the work schedule of the rf chip；
If the rf chip is in the durations of the first state, when detecting at baseband processing chip
When the end period of the first state, the 3rd control signal, the 3rd control letter are sent to the rf chip
Number it is used to being switched to the rf chip into the end period of the first state.
Alternatively, detecting the method for end period of the baseband processing chip in the first state includes：
When the baseband processing chip is in the durations of the first state, if detecting the Base-Band Processing
The Enable pins of chip are output as rising edge, it is determined that the baseband processing chip is switched to the end of the first state
Cycle.
Alternatively, the method for the end period that the detection baseband processing chip is in the first state is also wrapped
Include：
When the baseband processing chip is waited for, if the Enable for detecting the baseband processing chip draws
Pin is output as rising edge and when TXNRX pins are output as high level, determines that the baseband processing chip is switched to transmission shape
The beginning cycle of state；
When beginning cycle of the baseband processing chip in the transmission state, if detecting next clock cycle
Clock signal, it is determined that the baseband processing chip is switched to the durations of transmission state；
When the baseband processing chip is waited for, if the Enable for detecting the baseband processing chip draws
Pin is output as rising edge and when TXNRX pins are output as low level, determines that the baseband processing chip is switched to reception shape
The beginning cycle of state；
When beginning cycle of the baseband processing chip in the reception state, if detecting next clock cycle
Clock signal, it is determined that the baseband processing chip is switched to the durations of reception state.
Alternatively, methods described also includes：
When the rf chip is in the beginning cycle of the first state, if detecting next clock week
The clock signal of phase, then send the 4th control signal, the 4th control signal is used for will be described to the rf chip
Rf chip is switched to the durations of the first state；
When the rf chip is in the end period of the first state, if detecting next clock week
The clock signal of phase, then send the 5th control signal, the 5th control signal is used for will be described to the rf chip
Rf chip is switched to the flush cycles of the first state.
Alternatively, the first state be transmission state, second state be reception state in the case of, it is described to
The rf chip, which sends the first control signal, to be included：
To the Enable pins output signal 0 of the rf chip, to the TXNRX pins of the rf chip
Output signal 0；
It is described to send the second control signal to the rf chip and include：
To the Enable pins output signal 0 of the rf chip, to the TXNRX pins of the rf chip
Output signal 1；
It is described to send the 3rd control signal to the rf chip and include：
To the Enable pins output signal 0 of the rf chip, to the TXNRX pins of the rf chip
Output signal 1；
It is reception state in the first state, it is described to be penetrated to described in the case that second state is transmission state
Frequency transceiving chip, which sends the first control signal, to be included：
To the Enable pins output signal 0 of the rf chip, to the TXNRX pins of the rf chip
Output signal 0；
It is described to send the second control signal to the rf chip and include：
To the Enable pins output signal 1 of the rf chip, to the TXNRX pins of the rf chip
Output signal 0；
It is described to send the 3rd control signal to the rf chip and include：
To the Enable pins output signal 1 of the rf chip, to the TXNRX pins of the rf chip
Output signal 0；
It is transmission state in the first state, it is described to be penetrated to described in the case that second state is reception state
Frequency transceiving chip, which sends the 4th control signal, to be included：
To the Enable pins output signal 0 of the rf chip, to the TXNRX pins of the rf chip
Output signal 1；
It is described to include to the 5th control signal of rf chip transmission：
To the Enable pins output signal 0 of the rf chip, to the TXNRX pins of the rf chip
Output signal 1；
It is reception state in the first state, it is described to be penetrated to described in the case that second state is transmission state
Frequency transceiving chip, which sends the 4th control signal, to be included：
To the Enable pins output signal 1 of the rf chip, to the TXNRX pins of the rf chip
Output signal 0；
It is described to send the 5th control signal to the rf chip and include：
To the Enable pins output signal 1 of the rf chip, to the TXNRX pins of the rf chip
Output signal 0.
A kind of chip controls, including：
First state machine, if for rf chip in the flush cycles of the second state, when second state
The flush cycles continue after very first time value, send the first control signal to the rf chip, the first control letter
Number it is used to being switched to the rf chip into the latent period of first state, the very first time value is received according to the radio frequency
Send out the work schedule setting of chip 1；If the rf chip is when the latent period of the first state continues second
Between be worth after, send the second control signal to the rf chip, second control signal is used for the radio-frequency receiving-transmitting
Chip is switched to the beginning cycle of the first state, work schedule of second time value according to the rf chip
Setting；If the rf chip is in the durations of the first state when detecting baseband processing chip
During the end period of the first state, the 3rd control signal, the 3rd control signal are sent to the rf chip
End period for the rf chip to be switched to the first state.
Alternatively, described device also includes：
Second state machine, for detecting that the baseband processing chip is in the end period of the first state, the inspection
Surveying the specific method for the end period that the baseband processing chip is in the first state includes：When the baseband processing chip
During durations in the first state, if the Enable pins for detecting the baseband processing chip are output as
Rise edge, it is determined that the baseband processing chip is switched to the end period of the first state.
Alternatively, second state machine is additionally operable to：
When the baseband processing chip is waited for, if the Enable for detecting the baseband processing chip draws
Pin is output as rising edge and when TXNRX pins are output as high level, determines that the baseband processing chip is switched to transmission shape
The beginning cycle of state；When beginning cycle of the baseband processing chip in the transmission state, if detect next
The clock signal in clock cycle, it is determined that the baseband processing chip is switched to the durations of transmission state；At the base band
Reason chip is when being waited for, if the Enable pins for detecting the baseband processing chip be output as rising edge and
When TXNRX pins are output as low level, determine that the baseband processing chip is switched to the beginning cycle of reception state；When described
Baseband processing chip is at the beginning cycle of the reception state, if detecting the clock signal of next clock cycle,
Determine that the baseband processing chip is switched to the durations of reception state.
Alternatively, the first state machine is additionally operable to：
When the rf chip is in the beginning cycle of the first state, if detecting next clock week
The clock signal of phase, then send the 4th control signal, the 4th control signal is used for will be described to the rf chip
Rf chip is switched to the durations of the first state；
When the rf chip is in the end period of the first state, if detecting next clock week
The clock signal of phase, then send the 5th control signal, the 5th control signal is used for will be described to the rf chip
Rf chip is switched to the flush cycles of the first state.
Alternatively, it is transmission state in the first state in the first state machine, second state is reception shape
In the case of state, the first state machine includes for sending the first control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to described
The TXNRX pins output signal 0 of rf chip；
The first state machine is used to described send the second control signal to the rf chip and include：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to described
The TXNRX pins output signal 1 of rf chip；
The first state machine is used to described send the 3rd control signal to the rf chip and include：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to described
The TXNRX pins output signal 1 of rf chip；
It is reception state in the first state, in the case that second state is transmission state, the first state
Machine includes for sending the first control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to described
The TXNRX pins output signal 0 of rf chip；
The first state machine includes for sending the second control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to described
The TXNRX pins output signal 0 of rf chip；
The first state machine includes for sending the 3rd control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to described
The TXNRX pins output signal 0 of rf chip；
It is transmission state in the first state, in the case that second state is reception state, the first state
Machine is used to include to the 4th control signal of rf chip transmission：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to described
The TXNRX pins output signal 1 of rf chip；
The first state machine is used to include to the 5th control signal of rf chip transmission：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to described
The TXNRX pins output signal 1 of rf chip；
It is reception state in the first state, in the case that second state is transmission state, the first state
Machine is used to include to the 4th control signal of rf chip transmission：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to described
The TXNRX pins output signal 0 of rf chip；
The first state machine, which is used for the 5th control signal of rf chip transmission, to be included：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to described
The TXNRX pins output signal 0 of rf chip.
Chip controls method and device described herein, is worth, the second time value and Base-Band Processing using the very first time
Chip is in the foundation that the end period of the first state is switched over as rf chip between each state, and
Do not use baseband processing chip pin output signal as rf chip switching foundation, therefore, as long as foundation
The work schedule setting very first time value of rf chip and the second time value, you can realize penetrating under different operating sequential
Frequency transceiving chip is cooperated with using the correct of baseband processing chip, so as to realize the purpose of proper communication.
Brief description of the drawings
, below will be to embodiment or existing in order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art
There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of application, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the schematic diagram for the fdd mode that rf chip AD9361 is operated in transmitting-receiving independent control；
Fig. 2 is baseband processing chip BSC9132 SECO schematic diagram；
Fig. 3 is a kind of flow chart of chip controls method disclosed in the embodiment of the present application；
Fig. 4 is that the disclosed detection baseband processing chip BSC9132 of the embodiment of the present application is in the first state
The flow chart of the method for end period；
Fig. 5 is the structural representation of chip controls device disclosed in the embodiment of the present application.
Embodiment
Chip controls method disclosed in the embodiment of the present application, using in rf chip and the common structure of baseband processing chip
Into communication system in.Purpose is so that rf chip is operated in the fdd mode of transmitting-receiving independent control, Base-Band Processing core
Piece is operated in ENABLE/TXNRX pins control (ENABLE/TXNRX PIN CONTROL) tdd mode, so as to reduce communication system
The time delay of system.
In embodiments herein, enter by taking rf chip AD9361 and baseband processing chip BSC9132 as an example
Row explanation.It should be noted that rf chip and baseband processing chip that herein described method and device is applicable are simultaneously
Above-mentioned specific chip is not limited to, as long as using the chip of JESD207 interface standards, suitable for method described herein and dress
Put.
In above-mentioned communication system, rf chip AD9361 SECO schematic diagram is as shown in figure 1, Base-Band Processing
Chip BSC9132 SECO schematic diagram is as shown in Figure 2.
Below in conjunction with the accompanying drawing in the embodiment of the present application, the technical scheme in the embodiment of the present application is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only some embodiments of the present application, rather than whole embodiments.It is based on
Embodiment in the application, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of the application protection.
A kind of chip controls method disclosed in the embodiment of the present application, as shown in figure 3, including：
S301：If rf chip AD9361 is in the data buffering period of state of the second state, when described second
The flush cycles of state continue after very first time value, and the first control signal is sent to the rf chip AD9361, described
First control signal is used for the latent period that the rf chip AD9361 is switched to first state；
Wherein, very first time value is set according to the work schedule of the rf chip AD9361, for example, the very first time
Value can be 6 ADC_CLK/64 clock cycle, and wherein ADC_CLK is digital-to-analogue conversion that user sets, being matched with this chip
The sampling clock of unit；
In the present embodiment, first state is transmission state, and the second state is reception state, for convenience of explanation, in Fig. 3,
Emission state is represented using tx, reception state is represented using rx.The flush of reception state is represented using rfic_state_cnt1
Cycle duration, very first time value is represented using rfic_tx_flush_cnt, represents to send shape using rfic_tx_wait
The latent period of state.
, can be with to the rf chip AD9361 specific implementations for sending the first control signal in the present embodiment
For：To the Enable pins output signal 0 of the rf chip AD9361, to the rf chip AD9361's
TXNRX pins output signal 0.
S302：If rf chip AD9361 is when the latent period rfic_tx_wait of the state of transmission continues second
Between after value rfic_tx_switch_cnt, send the second control signal to rf chip AD9361, the second control signal is used
In the beginning cycle rfic_tx_start that rf chip AD9361 is switched to transmission state；
Wherein, the second time value is set according to the work schedule of the rf chip AD9361；
In the present embodiment, the second time value is set according to the work schedule of the rf chip AD9361, can also
For 6 ADC_CLK/64 clock cycle.
In Fig. 3, represent rf chip AD9361 when rfic_tx_wait is lasting using rfic_state_cnt2
Between.
In the present embodiment, can be to the rf chip AD9361 specific implementations for sending the second control signal：
To rf chip AD9361 Enable pins output signal 0, exported to rf chip AD9361 TXNRX pins
Signal 1.
S303：When rf chip AD9361 is in the beginning cycle rfic_tx_start of transmission state, if inspection
The clock signal of next clock cycle is measured, to rf chip AD9361 Enable pins output signal 0, to described
Rf chip AD9361 TXNRX pins output signal 1, for rf chip AD9361 to be switched into transmission state
Durations rfic_tx；
It is same as the prior art in S303, still it is cut using rf chip AD9361 clock cycle
Change control.
S304：If rf chip AD9361 is in the durations rfic_tx of the state of transmission, when detecting base band
When process chip BSC9132 is in the end period of transmission state, the 3rd control signal is sent to rf chip AD9361,
3rd control signal is used for the end period rfic_tx_end that rf chip AD9361 is switched to transmission state；
Wherein, can be to the rf chip AD9361 specific implementations for sending the 3rd control signal：To radio frequency
Transceiving chip AD9361 Enable pins output signal 0, to rf chip AD9361 TXNRX pins output signal 1.
In Fig. 3, the current states of baseband processing chip BSC9132 are represented using aic_state, aic_state_ is used
Tx_end represents the end period of baseband processing chip BSC9132 transmission state.
S305：When rf chip AD9361 is in the end period rfic_tx_end of the first state, if
Detect the clock signal of next clock cycle, then to rf chip AD9361 Enable pins output signal 0, to
Rf chip AD9361 TXNRX pins output signal 1, for rf chip AD9361 to be switched into transmission state
Flush cycles rfic_tx_flush；
Above to be switched to after transmission state, the switching condition and flow in each cycle of state are sent, such as institute in Fig. 1
Show, the switching condition and flow in each cycle under reception state are similar, comprise the following steps：
S306：If rf chip AD9361 works as hair in the flush cycle rfic_tx_flush of the state of transmission
The flush cycles rfic_tx_flush of state is sent to continue after very first time value, the Enable to rf chip AD9361 draws
Pin output signal 0, to the TXNRX pins output signal 0 of the rf chip AD9361, for by rf chip
AD9361 is switched to the latent period rfic_rx_wait of reception state；
S307：If rf chip AD9361 is when the latent period of reception state continues rfic_rx_wait the second
Between be worth after, to rf chip AD9361 Enable pins output signal 1, to the rf chip AD9361's
TXNRX pins output signal 0, the beginning cycle rfic_rx_ for rf chip AD9361 to be switched to reception state
start；
S308：When rf chip AD9361 is in the beginning cycle rfic_rx_start of reception state, if inspection
The clock signal of next clock cycle is measured, to rf chip AD9361 Enable pins output signal 1, to radio frequency
Transceiving chip AD9361 TXNRX pins output signal 0, continues for rf chip AD9361 to be switched into reception state
Cycle rfic_rx；
S309：If rf chip AD9361 is in the durations rfic_rx of reception state, when detecting base band
When process chip BSC9132 is in the end period of reception state, exported to rf chip AD9361 Enable pins
Signal 1, to rf chip AD9361 TXNRX pins output signal 0, for rf chip AD9361 to be switched to
The end period rfic_rx_end of reception state；
S310：When rf chip AD9361 is in the end period rfic_tx_end of reception state, if detection
To the clock signal of next clock cycle, then to rf chip AD9361 Enable pins output signal 1, to radio frequency
Transceiving chip AD9361 TXNRX pins output signal 0, for rf chip AD9361 to be switched into reception state
Flush cycles rfic_rx_flush.
From above-mentioned steps as can be seen that in the present embodiment, be worth using the very first time, the second time value and Base-Band Processing core
The cycle that piece is presently in is foundation, control is switched over to rf chip, thereby it is ensured that being operated in different sequential
Under two chips correct work.So that in a tdd system, rf chip can be operated in fdd mode, favorably
In the reduction of communication delay.
Also, from figure 3, it can be seen that only need to be that can be achieved by ten states using the method described in the present embodiment
Above-mentioned purpose, for the control of existing state machine, the negligible amounts of the state used in the present embodiment are (without waiting for shape
State), thus, it is easy to simple flow.
In the present embodiment, as it was previously stated, baseband processing chip BSC9132 is in the end period conduct of the first state
One of condition of switching is used, and the first state is in the following detailed description of the detection baseband processing chip BSC9132
The method of end period.
As shown in figure 4, methods described includes：
S401：When baseband processing chip BSC9132 is waited for aic_wait, if detecting Base-Band Processing core
Piece BSC9132 Enable pins are output as rising edge and when TXNRX pins are output as high level, determine Base-Band Processing core
Piece BSC9132 is switched to the beginning cycle tx_atart of transmission state；
S402：As beginning cycle tx_atarts of the baseband processing chip BSC9132 in the state of transmission, if detected down
The clock signal of one clock cycle, it is determined that baseband processing chip BSC9132 is switched to the durations aic_ of transmission state
tx；
S403：When baseband processing chip BSC9132 is in the durations aic_tx of transmission state, if detecting base
Tape handling chip BSC9132 Enable pins are output as rising edge, it is determined that the baseband processing chip BSC9132 switchings
To the end period tx_end of the first state；
S404：If detecting the clock signal of next clock cycle, it is determined that baseband processing chip BSC9132 switches
To wait state aic_wait；
S405：When baseband processing chip BSC9132 is waited for aic_wait, if detecting Base-Band Processing core
Piece BSC9132 Enable pins are output as rising edge and when TXNRX pins are output as low level, determine at the base band
Reason chip BSC9132 is switched to the beginning cycle tx_atart of reception state；
S406：As beginning cycle tx_atarts of the baseband processing chip BSC9132 in reception state, if detected down
The clock signal of one clock cycle, it is determined that baseband processing chip BSC9132 is switched to the durations aic_ of reception state
rx；
S407：When baseband processing chip BSC9132 is in the durations aic_rx of reception state, if detecting base
Tape handling chip BSC9132 Enable pins are output as rising edge, it is determined that baseband processing chip BSC9132, which is switched to, to be connect
The end period rx_end of receipts state；
S408：If detecting the clock signal of next clock cycle, it is determined that baseband processing chip BSC9132 switches
To wait state aic_wait.
It can be seen that, in the present embodiment, pass through the Enable pins and TXNRX pins to baseband processing chip BSC9132 first
The signal of output enters row decoding, using decoding result as rf chip AD9361 period of state switching condition,
So as to realize rf chip of the output signal to fdd mode of the baseband processing chip BSC9132 according to tdd mode
AD9361 correct control.
With above method embodiment accordingly, the embodiment of the present application also discloses a kind of chip controls device, such as Fig. 5 institutes
Show, including：The state machine 502 of first state machine 501 and second.
Wherein, first state machine is used for：
If rf chip AD9361 was in the flush cycles of the second state, when flush weeks of second state
Phase continues after very first time value, and the first control signal, first control signal are sent to the rf chip AD9361
Latent period for the rf chip AD9361 to be switched to first state, the very first time value is penetrated according to described in
Frequency transceiving chip AD9361 work schedule setting；
If the rf chip AD9361 is after the latent period of the first state continues the second time value, to
The rf chip AD9361 sends the second control signal, and second control signal is used for the rf chip
AD9361 is switched to the beginning cycle of the first state, and second time value is according to the rf chip AD9361's
Work schedule is set；
If the rf chip AD9361 is in the durations of the first state, when detecting Base-Band Processing
When chip BSC9132 is in the end period of the first state, the 3rd control is sent to the rf chip AD9361
Signal, the 3rd control signal is used for the end week that the rf chip AD9361 is switched to the first state
Phase.
Specifically, first state machine is transmission state in the first state, and second state is the feelings of reception state
Under condition, can be to the rf chip AD9361 specific implementations for sending the first control signal：To the radio frequency
Transceiving chip AD9361 Enable pins output signal 0, exports to the TXNRX pins of the rf chip AD9361 and believes
Number 0；Can be to the rf chip AD9361 specific implementations for sending the second control signal：Received to the radio frequency
Chip AD9361 Enable pins output signal 0 is sent out, to the TXNRX pin output signals of the rf chip AD9361
1；Can be to the rf chip AD9361 specific implementations for sending the 3rd control signal：To the radio-frequency receiving-transmitting
Chip AD9361 Enable pins output signal 0, to the TXNRX pins output signal 1 of the rf chip AD9361；
The first state be reception state, second state be transmission state in the case of, first state machine to
The specific implementation that the rf chip AD9361 sends the first control signal can be：To the rf chip
AD9361 Enable pins output signal 0, to the TXNRX pins output signal 0 of the rf chip AD9361；To institute
Stating rf chip AD9361 and sending the specific implementation of the second control signal to be：To the rf chip
AD9361 Enable pins output signal 1, to the TXNRX pins output signal 0 of the rf chip AD9361；To institute
Stating rf chip AD9361 and sending the specific implementation of the 3rd control signal to be：To the rf chip
AD9361 Enable pins output signal 1, to the TXNRX pins output signal 0 of the rf chip AD9361.
Further, the first state machine can be also used for：
When the rf chip AD9361 is in the beginning cycle of the first state, if detected next
The clock signal of clock cycle, then send the 4th control signal, the 4th control letter to the rf chip AD9361
Number it is used to being switched to the rf chip AD9361 into the durations of the first state；
When the rf chip AD9361 is in the end period of the first state, if detected next
The clock signal of clock cycle, then send the 5th control signal, the 5th control letter to the rf chip AD9361
Number it is used to being switched to the rf chip AD9361 into flush cycles of the first state.
Specifically, it is transmission state in the first state, in the case that second state is reception state, the first shape
State machine to the rf chip AD9361 send the 4th control signal specific implementation can be：Received to the radio frequency
Chip AD9361 Enable pins output signal 0 is sent out, to the TXNRX pin output signals of the rf chip AD9361
1；First state machine to the rf chip AD9361 send the 5th control signal specific implementation can be：To institute
Rf chip AD9361 Enable pins output signal 0 is stated, to the TXNRX pins of the rf chip AD9361
Output signal 1；
The first state be reception state, second state be transmission state in the case of, first state machine to
The specific implementation that the rf chip AD9361 sends the 4th control signal can be：To the rf chip
AD9361 Enable pins output signal 1, to the TXNRX pins output signal 0 of the rf chip AD9361；First
State machine to the rf chip AD9361 send the 5th control signal specific implementation can be：To the radio frequency
Transceiving chip AD9361 Enable pins output signal 1, exports to the TXNRX pins of the rf chip AD9361 and believes
Number 0.
Second state machine can be used for：Detect that the baseband processing chip BSC9132 is in the end of the first state
Cycle, the specific method that the detection baseband processing chip BSC9132 is in the end period of the first state includes：
When the baseband processing chip BSC9132 is in the durations of the first state, if detecting the Base-Band Processing
Chip BSC9132 Enable pins are output as rising edge, it is determined that the baseband processing chip BSC9132 is switched to described
The end period of first state.
Further, the second state machine can be also used for：When the baseband processing chip BSC9132 is waited for
When, if the Enable pins for detecting the baseband processing chip BSC9132 are output as the defeated of rising edge and TXNRX pins
When going out for high level, determine that the baseband processing chip BSC9132 is switched to the beginning cycle of transmission state；At the base band
Chip BSC9132 is managed at the beginning cycle of the transmission state, if detecting the clock signal of next clock cycle,
Determine that the baseband processing chip BSC9132 is switched to the durations of transmission state；As the baseband processing chip BSC9132
When being waited for, if the Enable pins for detecting the baseband processing chip BSC9132 be output as rising edge and
When TXNRX pins are output as low level, determine that the baseband processing chip BSC9132 is switched to the beginning week of reception state
Phase；When beginning cycles of the baseband processing chip BSC9132 in the reception state, if detecting next clock week
The clock signal of phase, it is determined that the baseband processing chip BSC9132 is switched to the durations of reception state.
The specific switching control flow of first state machine and the second state machine may refer to Fig. 3 and Fig. 4 institutes in the present embodiment
Show.
Can be using programmable gate array (Field-Programmable at the scene for the device described in the present embodiment
Gate Array, FPGA) in, Fig. 5 shows for FPGA and baseband processing chip BSC9132 and rf chip AD9361 connection
It is intended to.FPGA can use the spartan-6 series of more Large Copacity.
It can be seen that, in the present embodiment, row decoding is entered to the control signal that BSC9132 is sent with FPGA, new control letter is provided
Number realize correct control to AD9361；In view of real work situation, nearly AD9361 sides state machine compared to AD9361 inside
State machine, many four states, and by introducing parameter, more easily control sequential；The cascade of two finite state machines, is realized
The docking of two different working modes in FPGA both sides.
If the function described in the embodiment of the present application method is realized using in the form of SFU software functional unit and is used as independent production
Product are sold or in use, can be stored in a computing device read/write memory medium.Understood based on such, the application is real
The part for applying part that example contributes to prior art or the technical scheme can be embodied in the form of software product,
The software product is stored in a storage medium, including some instructions are to cause a computing device (can be personal meter
Calculation machine, server, mobile computing device or network equipment etc.) perform whole or the portion of the application each embodiment methods described
Step by step.And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage (ROM, Read-Only Memory), with
Machine access memory (RAM, Random Access Memory), magnetic disc or CD etc. are various can be with Jie of store program codes
Matter.
The embodiment of each in this specification is described by the way of progressive, what each embodiment was stressed be with it is other
Between the difference of embodiment, each embodiment same or similar part mutually referring to.
The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or use the application.
A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined herein
General Principle can in other embodiments be realized in the case where not departing from spirit herein or scope.Therefore, the application
The embodiments shown herein is not intended to be limited to, and is to fit to and principles disclosed herein and features of novelty phase one
The most wide scope caused.
Claims (10)
1. a kind of chip controls method, it is characterised in that including：
If rf chip is in the data buffering state flush cycles of the second state, as the flush of second state
Cycle continues after very first time value, sends the first control signal to the rf chip, first control signal is used for
The rf chip is switched to the latent period of first state, the very first time value is according to the rf chip
Work schedule setting；
If the rf chip is after the latent period of the first state continues the second time value, received to the radio frequency
Hair chip sends the second control signal, and second control signal is used to the rf chip being switched to first shape
The beginning cycle of state, second time value is set according to the work schedule of the rf chip；
If the rf chip is in institute in the durations of the first state when detecting baseband processing chip
When stating the end period of first state, the 3rd control signal is sent to the rf chip, the 3rd control signal is used
In the end period that the rf chip is switched to the first state.
2. according to the method described in claim 1, it is characterised in that the detection baseband processing chip is in the first state
The method of end period include：
When the baseband processing chip is in the durations of the first state, if detecting the baseband processing chip
Enable pins be output as rising edge, it is determined that the baseband processing chip be switched to the first state end week
Phase.
3. method according to claim 2, it is characterised in that the detection baseband processing chip is in described first
The method of the end period of state also includes：
When the baseband processing chip is waited for, if detect the Enable pins of the baseband processing chip
It is output as rising edge and when TXNRX pins are output as high level, determines that the baseband processing chip is switched to transmission state
The beginning cycle；
When beginning cycle of the baseband processing chip in the transmission state, if detect next clock cycle when
Clock signal, it is determined that the baseband processing chip is switched to the durations of transmission state；
When the baseband processing chip is waited for, if detect the Enable pins of the baseband processing chip
It is output as rising edge and when TXNRX pins are output as low level, determines that the baseband processing chip is switched to reception state
The beginning cycle；
When beginning cycle of the baseband processing chip in the reception state, if detect next clock cycle when
Clock signal, it is determined that the baseband processing chip is switched to the durations of reception state.
4. according to the method in claim 2 or 3, it is characterised in that also include：
When the rf chip is in the beginning cycle of the first state, if detecting next clock cycle
Clock signal, then send the 4th control signal to the rf chip, and the 4th control signal is used for the radio frequency
Transceiving chip is switched to the durations of the first state；
When the rf chip is in the end period of the first state, if detecting next clock cycle
Clock signal, then send the 5th control signal to the rf chip, and the 5th control signal is used for the radio frequency
Transceiving chip is switched to the flush cycles of the first state.
5. method according to claim 4, it is characterised in that in the first state be transmission state, second shape
It is described to send the first control signal to the rf chip and include in the case that state is reception state：
To the Enable pins output signal 0 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 0；
It is described to send the second control signal to the rf chip and include：
To the Enable pins output signal 0 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 1；
It is described to send the 3rd control signal to the rf chip and include：
To the Enable pins output signal 0 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 1；
It is reception state in the first state, it is described to be received to the radio frequency in the case that second state is transmission state
Hair chip, which sends the first control signal, to be included：
To the Enable pins output signal 0 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 0；
It is described to send the second control signal to the rf chip and include：
To the Enable pins output signal 1 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 0；
It is described to send the 3rd control signal to the rf chip and include：
To the Enable pins output signal 1 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 0；
It is transmission state in the first state, it is described to be received to the radio frequency in the case that second state is reception state
Hair chip, which sends the 4th control signal, to be included：
To the Enable pins output signal 0 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 1；
It is described to include to the 5th control signal of rf chip transmission：
To the Enable pins output signal 0 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 1；
It is reception state in the first state, it is described to be received to the radio frequency in the case that second state is transmission state
Hair chip, which sends the 4th control signal, to be included：
To the Enable pins output signal 1 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 0；
It is described to send the 5th control signal to the rf chip and include：
To the Enable pins output signal 1 of the rf chip, exported to the TXNRX pins of the rf chip
Signal 0.
6. a kind of chip controls device, it is characterised in that including：
First state machine, if for rf chip in the flush cycles of the second state, when second state
The flush cycles continue after very first time value, and the first control signal, first control signal are sent to the rf chip
Latent period for the rf chip to be switched to first state, the very first time value is according to the radio-frequency receiving-transmitting
The work schedule setting of chip；If the rf chip continues the second time value in the latent period of the first state
Afterwards, the second control signal is sent to the rf chip, second control signal is used for the rf chip
The beginning cycle of the first state is switched to, second time value is set according to the work schedule of the rf chip
It is fixed；If the rf chip is in institute in the durations of the first state when detecting baseband processing chip
When stating the end period of first state, the 3rd control signal is sent to the rf chip, the 3rd control signal is used
In the end period that the rf chip is switched to the first state.
7. chip controls device according to claim 6, in addition to：
Second state machine, for detecting that the baseband processing chip is in the end period of the first state, the detection institute
Stating the specific method for the end period that baseband processing chip is in the first state includes：When the baseband processing chip is in
During the durations of the first state, if the Enable pins for detecting the baseband processing chip are output as rising
Edge, it is determined that the baseband processing chip is switched to the end period of the first state.
8. chip controls device according to claim 7, it is characterised in that second state machine is additionally operable to：
When the baseband processing chip is waited for, if detect the Enable pins of the baseband processing chip
It is output as rising edge and when TXNRX pins are output as high level, determines that the baseband processing chip is switched to transmission state
The beginning cycle；When beginning cycle of the baseband processing chip in the transmission state, if detecting next clock week
The clock signal of phase, it is determined that the baseband processing chip is switched to the durations of transmission state；When the Base-Band Processing core
When piece is waited for, if the Enable pins for detecting the baseband processing chip are output as rising edge and TXNRX
When pin is output as low level, determine that the baseband processing chip is switched to the beginning cycle of reception state；When the base band
Process chip is at the beginning cycle of the reception state, if detecting the clock signal of next clock cycle, it is determined that
The baseband processing chip is switched to the durations of reception state.
9. the chip controls device according to claim 7 or 8, it is characterised in that the first state machine is additionally operable to：
When the rf chip is in the beginning cycle of the first state, if detecting next clock cycle
Clock signal, then send the 4th control signal to the rf chip, and the 4th control signal is used for the radio frequency
Transceiving chip is switched to the durations of the first state；
When the rf chip is in the end period of the first state, if detecting next clock cycle
Clock signal, then send the 5th control signal to the rf chip, and the 5th control signal is used for the radio frequency
Transceiving chip is switched to the flush cycles of the first state.
10. chip controls device according to claim 9, it is characterised in that in the first state machine described first
State is transmission state, in the case that second state is reception state, and the first state machine is used to receive to the radio frequency
Hair chip, which sends the first control signal, to be included：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to the radio frequency
The TXNRX pins output signal 0 of transceiving chip；
The first state machine is used to described send the second control signal to the rf chip and include：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to the radio frequency
The TXNRX pins output signal 1 of transceiving chip；
The first state machine is used to described send the 3rd control signal to the rf chip and include：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to the radio frequency
The TXNRX pins output signal 1 of transceiving chip；
It is reception state in the first state, in the case that second state is transmission state, the first state machine is used
Include in sending the first control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to the radio frequency
The TXNRX pins output signal 0 of transceiving chip；
The first state machine includes for sending the second control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to the radio frequency
The TXNRX pins output signal 0 of transceiving chip；
The first state machine includes for sending the 3rd control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to the radio frequency
The TXNRX pins output signal 0 of transceiving chip；
It is transmission state in the first state, in the case that second state is reception state, the first state machine is used
Include in sending the 4th control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to the radio frequency
The TXNRX pins output signal 1 of transceiving chip；
The first state machine is used to include to the 5th control signal of rf chip transmission：
The first state machine is specifically for the Enable pins output signal 0 of the rf chip, to the radio frequency
The TXNRX pins output signal 1 of transceiving chip；
It is reception state in the first state, in the case that second state is transmission state, the first state machine is used
Include in sending the 4th control signal to the rf chip：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to the radio frequency
The TXNRX pins output signal 0 of transceiving chip；
The first state machine, which is used for the 5th control signal of rf chip transmission, to be included：
The first state machine is specifically for the Enable pins output signal 1 of the rf chip, to the radio frequency
The TXNRX pins output signal 0 of transceiving chip.
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| CN105406885A (en) * | 2015-12-14 | 2016-03-16 | 天津光电通信技术有限公司 | Automatic ship identification system adopting radio frequency (RF) agile transceiver AD9361 and configuration method |
| CN116243137B (en) * | 2022-12-22 | 2023-12-01 | 无锡麟聚半导体科技有限公司 | Test mode protection circuit and chip |
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Address after: 430205 No.1 tanhu 2nd Road, Canglong Island, Jiangxia District, Wuhan City, Hubei Province Patentee after: CITIC Mobile Communication Technology Co.,Ltd. Address before: 430205 No.1 tanhu 2nd Road, Canglong Island, Jiangxia District, Wuhan City, Hubei Province Patentee before: CITIC Mobile Communication Technology Co., Ltd |