CN104822197B - A kind of simulation dimming controlling method, control circuit and apply its LED drive circuit - Google Patents
A kind of simulation dimming controlling method, control circuit and apply its LED drive circuit Download PDFInfo
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- CN104822197B CN104822197B CN201510189332.3A CN201510189332A CN104822197B CN 104822197 B CN104822197 B CN 104822197B CN 201510189332 A CN201510189332 A CN 201510189332A CN 104822197 B CN104822197 B CN 104822197B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention discloses a kind of simulation adjusting control circuit, control method and apply its LED drive circuit, clock timing is carried out to the pwm pulse signal for characterizing current light modulation brightness using a clock signal, obtain the clock count result of characterization pwm pulse signal duty cycle information, and the size for the electric current for flowing through switching circuit is adjusted according to the clock count result, the size of LED load electric current is flowed through with control, so as to be quickly obtained accurate simulation light modulation electric current, this method is not necessarily to big filter, and pwm pulse signal is allowed to have wider frequency range.
Description
Technical field
The present invention relates to a kind of power electronic technique, more specifically to a kind of light modulation applied in LED driver
Control circuit.
Background technology
Simulation light modulation refers to that control signal is analog quantity rather than digital quantity.Under some brightness of LED light setting, lamp
Brightness be the same in the time of arbitrary length, here it is the meanings of " simulation ".
In the prior art, the control method for simulating light modulation is usually to be filtered pwm pulse signal at one using RC filters
Direct current signal, to obtain simulation dimming effect, basic functional block diagram is as shown in Figure 1：Wherein, controllable transistor M1 and can
Transistor M2 complementations conducting is controlled, the on off state of controllable transistor M1 is consistent with the high level of pwm pulse signal, controllable transistor
The on off state of M2 is consistent with the low level of pwm pulse signal.The duty ratio for including in pwm pulse signal can so be obtained
The result that D is multiplied with reference voltage V set.Resistance R and capacitance C1 is commonly connected to controllable transistor M1's and controllable transistor M2
Voltage at point is filtered operation, to generate simulation dim signal Vref in one end of capacitance C1.Operational amplifier it is same
Phase input terminal receives simulation dim signal Vref, and inverting input receives the sampling letter of the present drive current of characterization LED load
Number VILED, the error signal of output end compensates operation by compensating electric capacity C2, and the voltage of the one end compensating electric capacity C2 is to adjust
The control signal of photocontrol transistor M3, brightness adjustment control transistor M3 are controlled herein under the control of signal, are operated in linear model,
Corresponding LED drive current is flowed through, achievees the purpose that light modulation.
However, this method is disadvantageous in that：When the frequency of pwm pulse signal is smaller, corresponding RC time constants
Need to be bigger, preferable filter effect is can be only achieved, that is, the ripple for simulating dim signal Vref could be smaller, an approximate direct current
Voltage.And the size of RC time constants and RC areas are proportional, so when the frequency of pwm pulse signal is smaller, it is required
RC areas it is bigger.And RC areas can not be generally made big by portion in the chip, thus in the case of no filtered external,
The frequency of pwm pulse signal is severely limited.
Invention content
In view of this, the present invention provides a kind of simulation dimming controlling method and circuit, which uses number
Word method obtains the corresponding clock count of duty ratio of pwm pulse signal as a result, and according to the clock count output control stream
The size for crossing LED load electric current, so as to solve in the prior art the frequency due to chip area and to pwm pulse signal by
To the problem of limitation.
In a first aspect, providing a kind of simulation dimming controlling method, it is applied in LED driver, which is characterized in that the tune
Light control method includes：
Clock timing is carried out to the pwm pulse signal for characterizing current light modulation brightness with a clock signal, obtains characterization PWM arteries and veins
Rush the clock count result of signal dutyfactor information；
The size that the electric current for flowing through switching circuit is adjusted according to the clock count result flows through LED load electricity with control
The size of stream；
Wherein, the frequency of the clock signal is two Nth power times of pwm pulse signal frequency,
The switching circuit is made of the current unit parallel connection of the roads N, and the roads N current units flows through under the same conditions
Size of current is different.
Preferably, the clock count result is N bits, and the N bits characterize the pwm pulse letter
The size of number duty ratio.
Preferably, the size for the electric current for flowing through switching circuit is adjusted according to the clock count result, including：
The clock count result of the N bits is corresponded with the conducting state of the roads N current unit, works as N
When a certain position of bit is 1, the current unit conducting of corresponding digit；It is right when a certain position of N bits is 0
The current unit of digit is answered to disconnect.
Preferably, the size of current that the roads N current unit flows through under the same conditions at common ratio be two etc. compare relationship.
Preferably, the clock signal is the clock signal by being obtained after the Nth power frequency multiplication by pwm pulse signal two.
Preferably, the clock signal is external timing signal.
Second aspect provides a kind of simulation adjusting control circuit, is applied in LED driver, which is characterized in that the tune
Light control circuit includes：
Clock counting circuit, when being carried out to the pwm pulse signal for characterizing current light modulation brightness to receive a clock signal
Clock timing obtains the clock count result of characterization pwm pulse signal duty cycle information；
Switching circuit, to adjust the size for flowing through LED load electric current according to the clock count result；
Wherein, the frequency of the clock signal is two Nth power times of pwm pulse signal frequency,
The switching circuit is made of the current unit parallel connection of the roads N, and the roads N current units flows through under the same conditions
Size of current is different.
Preferably, the clock count result is N bits, and the N bits characterize the pwm pulse letter
The size of number duty ratio.
Preferably, the clock count result of the N bits and the conducting state one of the roads N current unit are a pair of
It answers, when a certain position of N bits is 1, the current unit conducting of corresponding digit；When a certain position of N bits is 0
When, the current unit of corresponding digit disconnects.
Preferably, the size of current that the roads N current unit flows through under the same conditions at common ratio be two etc. compare relationship.
Preferably, the clock signal is the clock signal by being obtained after the Nth power frequency multiplication by pwm pulse signal two.
Preferably, the current unit is composed in series by controllable transistor and sampling resistor.
The third aspect provides a kind of LED drive circuit, to drive LED load, which is characterized in that including claim 7
To the simulation adjusting control circuit described in any one of 12.
The technology of the present invention carries out clock timing with a clock signal to the pwm pulse signal for characterizing current light modulation brightness, obtains
To the clock count result of characterization pwm pulse signal duty cycle information；And switch is flowed through according to clock count result adjusting
The size of the electric current of circuit flows through the size of LED load electric current with control, so as to be quickly obtained accurate simulation light modulation
Electric current, this method is not necessarily to big filter, and pwm pulse signal is allowed to have wider frequency range.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is the functional block diagram of analog light-adjusting circuit in the prior art；
Fig. 2 is the circuit structure diagram of the simulation adjusting control circuit of technology according to the present invention；
Fig. 3 is the circuit structure diagram of frequency multiplier circuit；
Fig. 4 is the circuit structure diagram of clock counting circuit；
Fig. 5 is the working waveform figure of clock counting circuit；
Specific implementation mode
Below based on embodiment, present invention is described, but the present invention is not restricted to these embodiments.Under
Text to the present invention datail description in, it is detailed to describe some specific detail sections.Do not have for a person skilled in the art
The description of these detail sections can also understand the present invention completely.In order to avoid obscuring the essence of the present invention, well known method, mistake
There is no narrations in detail for journey, flow, element and circuit.
In addition, it should be understood by one skilled in the art that provided herein attached drawing be provided to explanation purpose, and
What attached drawing was not necessarily drawn to scale.
It will also be appreciated that in the following description, " circuit " refer to passed through by least one element or sub-circuit it is electrical
The galvanic circle that connection or electromagnetism connect and compose.It " is connected when claiming element or another element of circuit " being connected to " or element/circuit
" between two nodes when, it can be directly coupled or connected another element or may exist intermediary element, element it
Between connection can be physically, in logic or its combination.On the contrary, when claiming element " being directly coupled to " or " directly connecting
Be connected to " another element when, it is meant that the two be not present intermediary element.
Unless the context clearly requires otherwise, "include", "comprise" otherwise throughout the specification and claims etc. are similar
Word should be construed as the meaning for including rather than exclusive or exhaustive meaning；That is, being containing for " including but not limited to "
Justice.
In the description of the present invention, it is to be understood that, term " first ", " second " etc. are used for description purposes only, without
It can be interpreted as indicating or implying relative importance.In addition, in the description of the present invention, unless otherwise indicated, the meaning of " multiple "
It is two or more.
Fig. 2 is the circuit structure diagram of the simulation adjusting control circuit of technology according to the present invention, the simulation brightness adjustment control electricity
Road 20 includes：Clock counting circuit 201, switching circuit 202 and error compensation circuit 203.
Wherein, clock counting circuit 201 currently dims the pwm pulse of brightness to receive a clock signal clk to characterizing
Signal carries out clock timing, obtains the clock count result Vcount of characterization pwm pulse signal duty cycle information, clock count knot
The binary number that fruit Vcount is by VN, VN-1 ... V2, V1 is formed, in the present embodiment, VN are a high position, and V1 is low level.Institute
It is corresponding with the duty ratio of current pwm pulse signal to state binary clock count results Vcount, is counted using the binary clock
As a result Vcount can control the size for flowing through LED load electric current.
The switching circuit 202, to flow through the big of LED load electric current according to clock count result Vcount adjustings
It is small.The switching circuit 202 is made of the current unit parallel connection of the roads N, per road current unit by controllable transistor and sampling resistor string
Connection composition, per road current unit in the first end of controllable transistor be connected in parallel on the same node, the of second end and sampling resistor
One end is connected, and the second end of sampling resistor is connected to the ground.
Wherein, the frequency of the clock signal is two Nth power times of the pwm pulse signal frequency, and N is to constitute to switch
The number of the current unit of circuit 202.
It should be noted that use frequency for the clock signal of two Nth power of the pwm pulse signal frequency times, it can
The period of the pwm pulse signal of different frequency to be normalized.Specifically, it is current pwm pulse signal frequency using frequency
The clock signal of two Nth power times timing is carried out between time of the current pwm pulse signal frequency high period, obtain
Clock count result Vcount characterization be time and entire pwm pulse signal period of the pwm pulse signal in high level
Ratio, i.e., the duty cycle information of current pwm pulse signal.If the frequency of pwm pulse signal is varied from, the frequency of clock signal
Also can be with variation, but the clock pulses number in whole cycle will not change or 2NIt is a, therefore different PWM arteries and veins
It rushes under signal, clock count result can characterize the duty cycle information of current pwm pulse signal, reach pwm pulse signal
Period normalized purpose.
The roads N current unit flows through under the same conditions in switching circuit 202 size of current is different, and the positions the N two into
The clock count result of number processed is corresponded with the conducting state of the roads N current unit, when a certain position of N bits is
When 1, the switch of corresponding digit is closed the current unit conducting so that corresponding digit；When a certain position of N bits is 0,
The switch of corresponding digit disconnects so that the current unit of corresponding digit disconnects.Switching circuit 202 is connected in series with LED load, institute
Electric current to flow through switching circuit 202 is the electric current for flowing through LED load.Specifically, it is assumed that it is big to flow through the total electric current of LED load
Small is M, and when the lowest order V1 of the clock count result Vcount of binary number is 1, switch S11 and switch S12 are closed at,
Drive signal Vg is connected to the control terminal of controllable transistor Q1, then by controllable transistor Q1 and sampling resistor R1 it is in series
One current unit is connected, and it is M/2 to flow through its size of currentN；When the second of the clock count result Vcount of binary number
When V2 is 1, switch S21 and switch S22 are closed at, and drive signal Vg is connected to the control terminal of controllable transistor Q2, then by can
Transistor Q2 and sampling resistor R2 the second current unit conductings in series are controlled, it is M/2 to flow through its size of currentN-1；With this
Analogize, when the highest order VN of the clock count result Vcount of binary number is 1, switch SN1 and switch SN2 are closed at,
Drive signal Vg is connected to the control terminal of controllable transistor QN, then by controllable transistor QN and sampling resistor RN it is in series
N current units are connected, and it is M/2 to flow through its size of current.According to this rule, can be summarized as：When the clock meter of binary number
When n-th Vn of number result Vcount is 1, switch Sn1 and switch Sn2 are closed at, and drive signal Vg is connected to controllable crystal
The control terminal of pipe Qn is then connected by the n-th current unit controllable transistor Qn and sampling resistor Rn in series, flows through the road
Size of current is M/2N-n+1, i.e., the described roads the N current unit under the same conditions, the size of current flowed through from the first via to the roads N
At common ratio be two etc. compare relationship.The identical condition refers to that the roads N current unit receives the same driving voltage VLED,
And the controllable transistor in the current unit of the roads N is in synchronization driving voltage having the same.
In circuit design, realize that the electric current that the roads N current unit flows through under the same conditions in the switching circuit 202 is big
Small different method can be：The size for choosing controllable transistor Q1~QN is to be operated in linear zone and in the same grid source electrode
When under voltage Vg driving, conducting resistance at the proportionate relationship of Gongwei two a group transistor.Further, in order to realize the roads N electricity
Flow the size of current of unit at common ratio be two it is equal than relationship, the size of concatenated sampling resistor is correspondingly from the first via in each road
To the roads N at the grade that common ratio is half than relationship, i.e. R1=2R2=...=2N-1RN。
Error compensation circuit 203, including trsanscondutance amplifier GM1 and compensating electric capacity C3, the in-phase end of trsanscondutance amplifier GM1 connect
Predeterminated voltage Vref1 is received, reverse side receives the current sampling signal Vs, the current sampling signal Vs of the roads N circuital current unit
For the voltage of each sampling resistor first end.The electric current flowed through due to each road current unit is two at common ratio from the first via to the roads N
It is equal than relationship, and in each road current unit concatenated sampling resistor resistance value from the first via to the roads N at common ratio be two/
One it is equal than relationship, so, in the circuit course of work, when synchronization, the current sampling signal of each road current unit is basic
It is equal.It is, of course, understood that in order to which the current sampling signal of the roads Shi Ge current unit is essentially equal, also having in circuit can
Other balance modules can be increased, do not elaborated herein.
Circuit as shown in Figure 2 specifically may be used to realize in error compensation circuit 203, it will be readily appreciated, however, that ability
Field technique personnel can realize specific circuit in other ways according to arrangement above.
Error compensation circuit 203 generates error compensating signal according to predeterminated voltage Vref1 and current sampling signal Vs, described
Error compensating signal is the voltage at the both ends offset voltage C3.This error compensating signal is used as in each current unit controllable crystalline substance
The drive signal Vg of body pipe can so be adjusted by adjusting the driving voltage of controllable transistor in the current unit of the roads N
Throttled the size of current of the roads N current unit so that the difference of current sampling signal Vs and predeterminated voltage Vref1 minimize.
So far, foregoing circuit may be constructed the basic scheme of the technology of the present invention.Simulation light modulation control provided by the invention
Method processed and circuit carry out clock timing to the pwm pulse signal for characterizing current light modulation brightness using a clock signal, obtain table
Levy the clock count result of pwm pulse signal duty cycle information；And switching circuit is flowed through according to clock count result adjusting
Electric current size, the size of LED load electric current is flowed through with control, the technology of the present invention can not only solve in the prior art due to
Chip area and the problem of be restricted to the frequency of pwm pulse signal, and accurate simulation light modulation can be quickly obtained
Electric current, this method are not necessarily to big filter, also pwm pulse signal are allowed to have wider frequency range.
It should be noted that the clock counting circuit 201 in simulation adjusting control circuit 20 receives a clock signal clk pair
The pwm pulse signal of the current light modulation brightness of characterization carries out clock timing, and the clock signal clk can be outer clocking information,
It can also be the clock signal by being obtained after the Nth power frequency multiplication by pwm pulse signal two.In the present embodiment, use when
Clock signal is the clock signal clk that will be obtained after the Nth power frequency multiplication of pwm pulse signal two.
Fig. 3 is the circuit structure diagram of frequency multiplier circuit.After frequency multiplier circuit 40 is to the Nth power frequency multiplication by pwm pulse signal two
Clock signal clk is obtained, the frequency of the clock signal clk is the 2 of pwm pulse signal frequencyNTimes.Preferably, frequency multiplier circuit 40
For phase-locked loop circuit.Include by the frequency multiplier circuit that phase-locked loop circuit is constituted：Phase comparator PD, filter LPF and voltage controlled oscillation
The through path of device VCO three parts composition, and by 2NThe feedback network of the frequency plot of frequency divider composition.
The operation principle of frequency multiplier circuit is：Phase comparator PD is by pwm pulse signal and by 2NClock letter after frequency dividing
The phase difference of number CLK is converted into voltage signal output, and the control electricity of voltage controlled oscillator is formed after low-pass filtered device LPF filtering
Pressure, voltage controlled oscillator output be with the frequency of required clock signal clk very close to constant-amplitude signal, the constant-amplitude signal 2N
After frequency dividing and pwm pulse signal is sent into phase comparator PD, makes voltage controlled oscillator by control circuit with the error to be formed is compared
Frequency to reduce Error Absolute Value direction consecutive variations, realize locking phase, to reach pwm pulse signal 2NThe mesh of frequency multiplication
's.
Fig. 4 is the circuit structure diagram for simulating the clock counting circuit 201 in adjusting control circuit 20, clock counting circuit
201 to the Nth power times pwm pulse signal frequency for being two using frequency clock signal clk, to characterizing current light modulation brightness
Pwm pulse signal carries out clock timing.Clock counting circuit 201 includes counting circuit 2011 and register circuit 2012.
Counting circuit 2011 to pwm pulse signal be high level when, when being carried out to the period with clock signal clk,
To obtain the clock count result Vcount of high level, which is digital signal.In the present embodiment, it counts
Circuit 2011 includes not circuit 301 and N number of d type flip flop：D1 triggers, D2 triggers ... DN triggers.Each D
The D inputs of trigger are connected to the reversed-phase output of itself, and the anti-phase output of each d type flip flop is connected to next D triggerings
The clock signal input terminal of the clock signal input terminal of device, D1 triggers receives clock signal clk, each d type flip flop is answered
Position end receives the pwm pulse signal by not circuit.
Register circuit 2012 in pwm pulse signal by being converted to the low level failing edge moment when high level, will be upper
Clock count result Vcount is stated to deposit.In the present embodiment, register circuit 2012 includes single-shot trigger circuit
Oneshot302 and N number of d type flip flop：D1 ' triggers, D2 ' triggers ... DN ' triggers.The D of each d type flip flop is defeated
Enter the output signal that end receives reference numeral d type flip flop in counting circuit 2011, such as：The D input terminals of D1 ' triggers receive D1
The D input terminals of output signal Q1, D2 ' trigger of trigger receive the output signal Q2 of D2 triggers.Each d type flip flop
Clock signal input terminal receives the single-tap signalling Vp of single-shot trigger circuit oneshot outputs.
Circuit as shown in Figure 4 specifically may be used to realize in it to clock counting circuit 201, it will be readily appreciated, however, that this
Field technology personnel can realize specific circuit in other ways according to arrangement above.
Fig. 5 is the working waveform figure of clock counting circuit, in conjunction with Fig. 5, illustrates that the work of clock counting circuit 201 is former herein
Reason.Counting circuit 2011 in clock counting circuit 201 is made of d type flip flop, since trigger has 0 and 1 two states, because
This can indicate a bit with a d type flip flop, and N number of d type flip flop is together in series in the present embodiment, then can be with table
Show that N is binary number.By taking N takes 3 as an example, when pwm pulse signal is high level, if initial count result is all 0, D1 triggerings
The output end Q1 of device is 0, at this timeWhen the rising edge of first pulse of clock signal clk reaches, Q1=D1
=1, hereafter,It is 0, when the rising edge of second pulse of clock signal clk reaches,D2 is touched
Send out the output result of the reversed-phase output of the clock input D1 triggers of deviceSince d type flip flop is rising edge triggering
The failing edge of circuit, Q1 isRising edge, at this moment,When the reversed-phase output of Q2 triggers
Output resultRising edge, that is, Q2 failing edge reach when, when third trigger will start counting up, pwm pulse signal
Become low level, the reset signal for inputting each d type flip flop at this time is height, and counting circuit 2011 resets, and timing result is reset.When
Register circuit 2012 in clock counting circuit 201 is also made of d type flip flop, becomes low level from high level in pwm pulse signal
Failing edge when reaching, single-shot trigger circuit oneshot (herein be failing edge triggering) generates a trigger pulse Vp, in trigger pulse
The clock count result of D input terminals is transferred to output by the rising edge time of Vp, each d type flip flop in register circuit 2012
Clock count result Vcount i.e. binary number VN ... V2V1 is latched, directly in end before counting circuit 2011 resets count results
It arrives to next period.From Fig. 5 it is also seen that：In a cycle and second period of pwm pulse signal,
Pwm pulse signal has the pulse of 2 clock signal clks, therefore count results Vcount is 010, the i.e. decimal system between high period
Several 2；In a cycle and third period of pwm pulse signal, in pwm pulse signal between high period, there are 4
The pulse of clock signal clk, therefore count results Vcount is 100, i.e., decimal numeral 4.But in each pwm pulse signal week
In phase, there is 23The pulse of i.e. 8 clock signal clks, realize by the period of the pwm pulse signal of different frequency it is normalized
Purpose.So according to the clock count in each period as a result, can reflect the duty cycle information of current pwm pulse signal.
Can realize the counting using clock signal clk to pwm pulse signal high level time as a result, obtain digital signal when
Clock count results Vcount, that is, binary number VN ... V2V1 controls the roads N in switching circuit using this clock count results Vcount
The number of current unit conducting achievees the purpose that adjust the size for flowing through LED load electric current.
The foregoing is merely the preferred embodiment of the present invention, are not intended to restrict the invention, for those skilled in the art
For, the present invention can have various modifications and changes.It is all within spirit and principles of the present invention made by any modification, equivalent
Replace, improve etc., it should all be included in the protection scope of the present invention.
Claims (13)
1. a kind of simulation dimming controlling method, it is applied in LED driver, which is characterized in that the dimming controlling method includes：
Clock timing is carried out to the pwm pulse signal for characterizing current light modulation brightness with a clock signal, obtains characterization pwm pulse letter
The clock count result of number duty cycle information；
The size that the electric current for flowing through switching circuit is adjusted according to the clock count result flows through LED load electric current with control
Size,
Wherein, the frequency of the clock signal changes with the variation of the frequency of the pwm pulse signal, and the clock signal
Frequency be pwm pulse signal frequency two Nth power times,
The switching circuit is made of the current unit parallel connection of the roads N, and the electric current that the roads N current unit flows through under the same conditions
It is of different sizes.
2. simulating dimming controlling method according to claim 1, which is characterized in that the clock count result be the positions N two into
Number processed, the N bits characterize the size of the pwm pulse signal duty ratio.
3. simulating dimming controlling method according to claim 2, which is characterized in that adjusted and flowed according to the clock count result
The size of the electric current of switching circuit is crossed, including：
The clock count result of the N bits is corresponded with the conducting state of the roads N current unit, when the positions N two
When a certain position of system number is 1, the current unit conducting of corresponding digit；When a certain position of N bits is 0, corresponding position
Several current units disconnects.
4. simulating dimming controlling method according to claim 1, which is characterized in that the roads N current unit is in the same terms
Under the size of current that flows through at common ratio be two etc. compare relationship.
5. simulating dimming controlling method according to claim 1, which is characterized in that the clock signal is by by PWM arteries and veins
Rush the clock signal obtained after the Nth power frequency multiplication of signal two.
6. simulating dimming controlling method according to claim 1, which is characterized in that the clock signal is believed for external clock
Number.
7. a kind of simulation adjusting control circuit, it is applied in LED driver, which is characterized in that the adjusting control circuit includes：
Clock counting circuit, to receive a clock signal to characterizing the current pwm pulse signal for dimming brightness into row clock meter
When, obtain the clock count result of characterization pwm pulse signal duty cycle information；
Switching circuit, to adjust the size for flowing through LED load electric current according to the clock count result；
Wherein, the frequency of the clock signal changes with the variation of the frequency of the pwm pulse signal, and the clock signal
Frequency be pwm pulse signal frequency two Nth power times,
The switching circuit is made of the current unit parallel connection of the roads N, and the electric current that the roads N current unit flows through under the same conditions
It is of different sizes.
8. simulating adjusting control circuit according to claim 7, which is characterized in that the clock count result be the positions N two into
Number processed, the N bits characterize the size of the pwm pulse signal duty ratio.
9. simulating adjusting control circuit according to claim 8, which is characterized in that the clock count of the N bits
As a result it is corresponded with the conducting state of the roads N current unit, when a certain position of N bits is 1, corresponding digit
Current unit is connected；When a certain position of N bits is 0, the current unit of corresponding digit disconnects.
10. simulating adjusting control circuit according to claim 7, which is characterized in that the roads N current unit is in the same terms
Under the size of current that flows through at common ratio be two etc. compare relationship.
11. simulating adjusting control circuit according to claim 7, which is characterized in that the clock signal is by by PWM arteries and veins
Rush the clock signal obtained after the Nth power frequency multiplication of signal two.
12. simulating adjusting control circuit according to claim 7, which is characterized in that the current unit is by controllable transistor
It is composed in series with sampling resistor.
13. a kind of LED drive circuit, to drive LED load, which is characterized in that including any one of claim 7 to 12 institute
The simulation adjusting control circuit stated.
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| CN108207054B (en) * | 2016-12-19 | 2021-08-24 | 上海莱狮半导体科技有限公司 | Power expansion circuit and power expansion method for load |
| CN107027222B (en) * | 2017-05-11 | 2019-06-11 | 南京矽力杰半导体技术有限公司 | Load current adjusting circuit and adjusting method |
| CN111090965A (en) * | 2018-10-23 | 2020-05-01 | 武汉上水微电子科技有限公司 | Method for realizing data and clock by using single pin |
| CN109450421B (en) * | 2018-12-17 | 2023-09-01 | 上海艾为电子技术股份有限公司 | Analog switch starting circuit and method |
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| JP3812130B2 (en) * | 1997-06-02 | 2006-08-23 | セイコーエプソン株式会社 | Digital-analog converter, circuit board, electronic device, and liquid crystal display device |
| US7573209B2 (en) * | 2004-10-12 | 2009-08-11 | Koninklijke Philips Electronics N.V. | Method and system for feedback and control of a luminaire |
| CN101175353B (en) * | 2007-10-23 | 2011-05-11 | 无锡市爱芯科微电子有限公司 | Integrated circuit for controlling and driving LED |
| CN101873109A (en) * | 2009-04-27 | 2010-10-27 | 武汉市创佳源电子有限公司 | Electronic potentiometer module having complete operating characteristic and function |
| CN101605417B (en) * | 2009-07-15 | 2012-08-22 | 西安英洛华微电子有限公司 | LED constant current drive circuit with light dimming function |
| CN102215616A (en) * | 2010-04-08 | 2011-10-12 | 无锡博赛半导体技术有限公司 | PWM (pulse width modulation)-based LED (light emitting diode) linear dimming circuit |
| CN103037573B (en) * | 2012-11-20 | 2015-05-20 | 无锡中星微电子有限公司 | Dimming circuit |
| CN103731151B (en) * | 2014-01-15 | 2017-09-15 | 南京矽力杰半导体技术有限公司 | Method and circuit for converting duty ratio into analog signal |
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