CN104821053B - A kind of door sensor control system for smart home - Google Patents
A kind of door sensor control system for smart home Download PDFInfo
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- CN104821053B CN104821053B CN201510194190.XA CN201510194190A CN104821053B CN 104821053 B CN104821053 B CN 104821053B CN 201510194190 A CN201510194190 A CN 201510194190A CN 104821053 B CN104821053 B CN 104821053B
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Classifications
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- G—PHYSICS
- G08—SIGNALLING
- G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
- G08B13/00—Burglar, theft or intruder alarms
- G08B13/02—Mechanical actuation
- G08B13/08—Mechanical actuation by opening, e.g. of door, of window, of drawer, of shutter, of curtain, of blind
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Abstract
The present invention relates to the door sensor control systems of intelligent family's equipment, more particularly, to smart home.The present invention provides a kind of door sensor control systems for smart home to include door sensor chip U1, communication module, signal acquisition circuit, the structure of door sensor control system is simple, needing only to door sensor chip U1, communication module, signal acquisition circuit, power supply just can complete the identifying processing of door and window opening and closing information, it is provided with to prevent the microswitch tolled breakdown, have a safety feature.The present invention also provides alarm system, host computer, control host, the monitoring systems that a kind of door sensor control system for smart home further includes access z wave networks.This door sensor control system is linked by z wave network connections alarm system, host computer, control host, monitoring system by controlling host that can realize with the other equipment of z wave networks, is cooperated between each equipment.
Description
Technical field
The present invention relates to the door sensor control systems of intelligent family's equipment, more particularly, to smart home.
Background technology
Smart home be using house as platform, using comprehensive wiring technology, network communication technology, security precautions technology, from
Dynamic control technology, audio frequency and video technology integrate the related facility of home life, build efficient housing facilities and family's schedule thing
The management system of business promotes house security, convenience, comfort, artistry, and realizes the living environment of environmental protection and energy saving.
With Internet information technique progress, smart home has been increasingly becoming a part for our lives, household safety-protection
System protection family's property safety, personal safety.Household security system mainly senses the opening and closing situation of monitoring door by door sensor,
Record does not trigger the door and window opening and closing information of alarm system, and kinsfolk can be observed by remote control and solve unusual condition, existing
Some door sensor control systems it is complicated, door sensor and alarm system link, and control system can not achieve multiple smart homes and set
Standby remote interlocking.
The content of the invention
Complicated for the door sensor of door sensor control system in the prior art, control system can not achieve multiple smart homes
Equipment linkage.The present invention provides a kind of security performance simple in structure the high door sensor for smart home, to achieve the above object,
The present invention adopts the following technical scheme that：
A kind of door sensor control system for smart home, the door sensor control system include：
Signal acquisition circuit, acquisition door and window opening and closing information, and it is sent to door sensor chip；
Door sensor chip, for handling the opening and closing information of signal acquisition circuit, to door and window opening and closing information judge, triggering or
Person releases alarm system, and door and window opening and closing information by communication module is sent and is controlled for handling the door sensor of communication module reception
Signal；
Communication module, for door and window opening and closing information to be sent to z-wave network-based controls host and receives z-wave networks
Control host door sensor control signal；
Power module, for signal acquisition circuit, communication module, door sensor chip power supply.
Wherein, the signal acquisition circuit includes first switch, second switch, third switch, and first switch is used to control
Signal acquisition circuit is connected or disconnected with door sensor chip；Second switch sends report for control signal Acquisition Circuit to door sensor chip
Alert signal；3rd switch sends opening of doors and windows or door and window closure signal for control signal Acquisition Circuit to door sensor chip.
Wherein, the signal acquisition circuit includes XOR gate integrated circuit, capacitance C10, capacitance C15, capacitance C16, capacitance
C17, capacitance C18, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R11, first switch, second open
It closes, the 3rd switch；
The 2nd feet of XOR gate integrated circuit U5, the 7th foot, the 12nd foot, the 13rd foot connect digitally；3rd foot connects the 4th foot,
6th foot connects the 9th foot；
8th foot connects resistance R5, and the 3rd foot of door sensor chip U1 is connected after connecing the filtering of capacitance C18 digitally；14th foot
Through connecing capacitance C10 out-put supplies digitally；
First switch one end is grounded, first switch other end connection capacitance C15 one end, resistance R7 one end, the one of resistance R4
End, digitally, the other end connection power supply of resistance R7, the other end of resistance R4 connects door sensor chip to another termination of capacitance C15
The 10th foot, the 1st foot 1A of XOR gate integrated circuit U5 of U1；
Second switch one end is grounded, other end connection capacitance C17 one end, resistance R9 one end, resistance R11 one end, capacitance C17
Other end ground connection, the other end connection power supply of resistance R9 is the 15th foot of the other end connection door sensor chip U1 of resistance R11, different
The 10th foot 3B of OR gate integrated circuit U5；
3rd switch one end ground connection, other end connection capacitance C16 one end, resistance R8 one end, resistance R6 one end, capacitance C16
The other end ground connection, another termination of resistance R8, resistance R7 one end, resistance R9 one end, power supply, resistance R6 the other end connection door
The 13rd foot, the 5th foot of XOR gate integrated circuit U5 of magnetic chip U1.
Wherein, further include alarm system, host computer, control host, monitoring system, the host computer by control host with
Alarm system, monitoring system, the connection of door sensor control system.
Wherein, the control host, door sensor control system, monitoring system, alarm system form Z_ by communication module
Wave networks, the control host is connected with the host computer, for the control command of host computer to be sent to monitoring system, door
Magnetic control system, alarm system, it is upper for door sensor control system, alarm system, the working condition of monitoring system to be sent to
Machine is shown.
Wherein, the host computer is arranged to smart mobile phone, tablet computer and PC.
A kind of control method of door sensor control system for smart home, it is characterised in that：
Step 1: the door and window collected opening and closing information is sent to door sensor chip by signal acquisition circuit,
Step 2: door sensor chip receive and handle door and window opening and closing information, judge door and window opening and closing information belong to it is normally-open or
Unnormal unlocking；
Step 3: when door and window opening and closing information belongs to normally-open, door and window opening and closing information is sent to control through communication module
Host processed
Step 4: when door and window opening and closing information belongs to unnormal unlocking, door sensor is opened and closed information through the mould that communicates by door sensor chip
Block is sent to control host, and sends open command to monitoring system and alarm system.
Step 5, control host receives door and window opening and closing information, and shows.
Wherein, in the step 2, the door and window opening and closing information that the 3rd switch is sent in signal acquisition circuit is opened to be improper
It opens.
Wherein, the step 5 further includes.Door and window opening and closing information is sent to control host handheld terminal or PC is shown.
Wherein, in the step 4, after monitoring system starts, the video information of shooting and audio-frequency information are sent to control
Host stores.
The present invention provides a kind of door sensor control system for smart home, the door sensor control system includes：Signal
Acquisition Circuit, acquisition door and window opening and closing information, and it is sent to door sensor chip U1；Door sensor chip U1, for handling signal acquisition circuit
Information, to door and window opening and closing information be identified judgement identification, triggering or release alarm system, and by with door sensor chip U1
The processing information of the communication module transfer gate magnetic chip U1 of connection；Communication module sends radiofrequency signal to z-wave networks；Electricity
Source is signal acquisition circuit, door sensor chip U1 power supplies.Signal acquisition circuit gathers the opening and closing information of each switch, door sensor chip
U1 receives the signal of signal acquisition circuit, and door and window is unlocked, is normally opened, and the second switch of signal acquisition circuit disconnects, door sensor
Chip U1 receives the signal of signal acquisition circuit and makes the judgement processing of normal condition, and door and window locked, and is tolled breakdown invasion, and the 3rd
Switch is touched, and door sensor chip U1 makes the processing of alarm system, and the structure of door sensor is simple, it is thus only necessary to door sensor chip U1, be led to
Letter module, signal acquisition circuit, power supply just can complete the identifying processing of door and window opening and closing information, be provided with to prevent from tolling breakdown micro-
Dynamic switch, has a safety feature.
The present invention also provides a kind of control methods of the door sensor control system for smart home：
Step 1: the door and window collected opening and closing information is sent to door sensor chip U1 by signal acquisition circuit；
Step 2: door sensor chip U1 receives and handles door and window opening and closing information, judge that door and window opening and closing information belongs to normally-open
Or unnormal unlocking；
Step 3: when door and window opening and closing information belongs to normally-open, door and window opening and closing information is sent to control through communication module
Host processed
Step 4: when door and window opening and closing information belongs to unnormal unlocking, door sensor is opened and closed information through communication by door sensor chip U1
Module is sent to control host, and sends open command to monitoring system and alarm system；
Step 5, control host receives door and window opening and closing information, and shows.
The open and-shut mode that door sensor control system is capable of automatic door aligning window by the above method is monitored, can be to door and window just
It is normally open carry out record save backup, meanwhile, pair with the improper unlatching of door and window, what signal acquisition circuit can be promptly and accurately adopts
Collection, and be sent to door sensor chip U1, door sensor chip U1 and alarm system alarm is triggered by communication module.Door sensor control system can
Safety, full automatic monitoring door and window state, guarantee is brought for house security.
Description of the drawings
Fig. 1 is connected circuit diagram for door sensor chip U1 with temperature inductor；
Fig. 2 is the circuit diagram of signal acquisition circuit；
Fig. 3 is battery J5 circuit diagrams；
Fig. 4 is programming interface J3 circuit diagrams；
Fig. 5 is 1 door sensor control system illustrative configurations block diagram of embodiment；
Fig. 6 is 2 door sensor control system illustrative configurations block diagram of embodiment；
Fig. 7 host illustrative configurations block diagrams in order to control；
Fig. 8 is route control unit circuit diagram；
Fig. 9 is routing storage unit circuit figure；
Figure 10 is wifi communication unit circuit diagrams；
Figure 11 is Ethernet interface element circuit figure；
Figure 12 is Power Management Unit circuit diagram；
Figure 13 is z-wave wireless communication unit circuit diagrams；
Figure 14 is z-wave storage unit circuit figures；
Figure 15 is SPI interface element circuit figure.
Figure 16 is signal amplification circuit structure diagram；
Figure 17 is the data input module circuit diagram of signal amplification circuit；
Figure 18 is the power conversion module circuit diagram of signal amplification circuit；
Figure 19 is the signal amplifier module circuit diagram of signal amplification circuit；
Figure 20 is the interrupt circuit figure of signal amplification circuit；
Figure 21 is the circuit diagram figure of the flash memory module circuit of signal amplification circuit；
Figure 22 is the z-wave signal processing module circuit diagrams of signal amplification circuit；
Figure 23 is the circuit diagram of the voltage-regulating circuit of signal amplification circuit；
Figure 24 is the antenna ANT1 circuit diagrams of signal amplification circuit.
Specific embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, it is right
The present invention is further elaborated.
Embodiment 1
As shown in figure 5, a kind of door sensor control system 6 for smart home, the door sensor control system 6 is adopted including signal
Collector 1, power module 2, communication module 4, door sensor chip U1.
Signal acquisition circuit 1 for gathering door and window opening and closing information, and is sent to door sensor chip U1.Door sensor chip U1, is used for
The opening and closing information of signal acquisition circuit 1 is handled, door and window opening and closing information is judged, alarm system 7 is triggered or release, by door
Window opening and closing information is sent by communication module 4 and for handling the door sensor control signal that communication module 4 is sent.Communication module 4 is used
In by door and window opening and closing information be sent to the control host 9 of z-wave networks 5 and receive z-wave networks 5 control host 9 door
Magnetic control signal.Power module 2, for powering to signal acquisition circuit 1, communication module 4, door sensor chip U1.
As shown in Fig. 2, the signal acquisition circuit 1 includes first switch, second switch, third switch, first switch is used
It is connected or disconnected in control signal Acquisition Circuit 1 and door sensor chip U1；Second switch is used for control signal Acquisition Circuit 1 to door sensor
Chip U1 sends opening of doors and windows or door and window closure signal；3rd switch is used for control signal Acquisition Circuit 1 to door sensor chip U1
Send alarm signal.
The signal acquisition circuit 1 includes XOR gate integrated circuit U5, capacitance C10, capacitance C15, capacitance C16, capacitance
C17, capacitance C18, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R11, first switch, second open
Pass, the 3rd switch, and for the first switch for controlling door sensor access z-wave networks 5, the 3rd switch is micro-control switch, is normally closed
Switch, second switch is reed contact, is normally closed switch or normal open switch, and door sensor touches contact when being tolled breakdown, trigger alarm,
Second switch can prevent that door sensor from being removed by force.3 switches, which cooperate, completes signal acquisition work, first switch,
Second switch, the 3rd switch
The 2nd feet of XOR gate integrated circuit U5, the 7th foot, the 12nd foot, the 13rd foot connect digitally；3rd foot connects the 4th foot,
6th foot connects the 9th foot；8th foot connects resistance R5, and the 3rd of door sensor chip U1 is connected after connecing the filtering of capacitance C18 digitally
Foot；14th foot is through connecing capacitance C10 out-put supplies digitally；
First switch one end is grounded, first switch other end connection capacitance C15 one end, resistance R7 one end, the one of resistance R4
End, digitally, the other end connection power supply of resistance R7, the other end of resistance R4 connects door sensor chip to another termination of capacitance C15
The 10th foot, the 1st foot 1A of XOR gate integrated circuit U5 of U1；
Second switch one end is grounded, other end connection capacitance C17 one end, resistance R9 one end, resistance R11 one end, capacitance C17
Other end ground connection, the other end connection power supply of resistance R9 is the 15th foot of the other end connection door sensor chip U1 of resistance R11, different
The 10th foot 3B of OR gate integrated circuit U5；
3rd switch one end ground connection, other end connection capacitance C16 one end, resistance R8 one end, resistance R6 one end, capacitance C16
The other end ground connection, another termination of resistance R8, resistance R7 one end, resistance R9 one end, power supply, resistance R6 the other end connection door
The 13rd foot, the 5th foot 2B of XOR gate integrated circuit U5 of magnetic chip U1.
As shown in figure 3, the present embodiment power module 2 is battery J5, and the 1st foot connection diode anode of battery J5, two poles
The 2nd foot of tube cathode out-put supply VCC, battery J5 connect digitally.
As shown in Figure 1, door sensor chip U1 sets the 1st foot, the 2nd foot, the 3rd foot, the 4th foot, the 5th foot, the 6th foot, the 7th foot, the 8th
Foot, the 9th foot, the 10th foot, the 11st foot, the 12nd foot, the 13rd foot, the 14th foot, the 15th foot, the 16th foot GND, the 17th foot, the 18th foot.The
1 foot, the 6th foot, the 12nd foot, the 16th foot, the 17th foot connect digitally.2nd foot is through resistance R15 connection power supplys VCC.3rd foot connects exclusive or
The 8th foot of door integrated circuit U5, the 4th foot connecting resistance R12 one end, resistance R12 other end sending and receiving optical diode D7 cathodes, luminous two
The anode of pole pipe D7 meets power supply VCC.GND feet, the NC feet of 5th foot jointing temp induction module U3, the 7th foot connect,
As shown in figure 4, programming interface J3 be provided with the 1st foot of ground connection, the 2nd foot being connected with the 2nd feet of door sensor chip U1, with
3rd foot of the 7th feet of door sensor chip U1 connection, the 4th foot being connected with the 8th feet of door sensor chip U1 are connected with the 9th feet of door sensor chip U1
The 3rd foot, the 7th foot connection power supply VCC of programming interface J3.
As shown in Figure 1, communication module 4 connects the 18th foot of door sensor chip U1, the communication module 4 includes interface J4, electricity
Feel L2, capacitance C13, capacitance C14, inductance L2 one end connects the 18th feet of U1, capacitance C13 one end, another termination capacitors of inductance L2 respectively
C14 one end, the 1st feet of interface J4, capacitance C14 other ends ground connection, another the 17th feet of termination processor U of capacitance C13 and ground connection.
As shown in Figure 1, temperature sense module U3 is equipped with 2 GND feet, 1 NC foot, V+ feet, Vout feet, GND feet, NC feet connect
The 5th foot of processor U1 is connect, power supply VCC, the Vout feet connection door sensor of temperature sense module U3 are connected after V+ foot meridian capacitors C filtering
The 14th foot of chip U1.
XOR gate integrated circuit U5 be equipped with the 1st foot, the 2nd foot, the 3rd foot, the 4th foot, the 5th foot, the 6th foot, the 7th foot, the 8th foot,
9th foot, the 10th foot, the 11st foot, the 12nd foot, the 13rd foot, the 14th foot；
2nd foot, the 7th foot, the 12nd foot, the 13rd foot connect digitally；3rd foot connects the 4th foot, and the 6th foot connects the 9th foot；
The 8th foot connection resistance R5 of XOR gate integrated circuit U5, door sensor core is connected after connecing the filtering of capacitance C18 digitally
The 3rd foot of piece U1；14th foot is through meeting capacitance C10 out-put supplies VCC digitally.
First switch one terminates digitally, first switch other end connection capacitance C15 one end, resistance R7 one end, resistance R4
One end, another termination of capacitance C15 digitally, the other end connection door of the connection of the other end of resistance R7 power supply VCC, resistance R4
The 10th foot, the 1st foot of XOR gate integrated circuit U5 of magnetic chip U1.
Second switch one terminates digitally, other end connection capacitance C17 one end, resistance R9 one end, resistance R11 one end, electricity
Digitally, the other end of the other end connection power supply VCC, resistance R11 of resistance R9 connect door sensor chip U1 to another termination of appearance C17
The 15th foot, the 10th foot of XOR gate integrated circuit U5.
Digitally, the other end connects capacitance C16 one end, resistance R8 one end, resistance R6 one end, capacitance to 3rd switch, one termination
Digitally, another termination of resistance R8, resistance R7 one end, resistance R9 one end, power supply VCC, resistance R6's is another for another termination of C16
The 13rd foot, the 5th foot of XOR gate integrated circuit U5 of one end connection door sensor chip U1.
Embodiment 2
As shown in fig. 6, the door sensor control system 6 of smart home also bag alarm system 7, host computer 10, control host 9, prison
Control system 8.
The host computer 10 is described by the way that host 9 is controlled to be connected with alarm system 7, monitoring system 8, door sensor control system 6
Host computer 10 is arranged to smart mobile phone, tablet computer and PC.Alarm system 7, host computer 10, control host 9, monitoring system 8 are logical
It crosses control host 9 and can realize and link with the other equipment of z-wave networks 5, realize and cooperate between each equipment.
The control host 9, door sensor control system 6, monitoring system 8, alarm system 7 form z- by communication module 4
Wave networks, the control host 9 are connected with the host computer 10, for the control command of host computer 10 to be sent to monitoring system
System 8, door sensor control system 6, alarm system 7, for by door sensor control system 6, alarm system 7, the working condition of monitoring system 8
Host computer 10 is sent to show.
The door sensor control system 6 of smart home of the present invention employs following control method：
Step 1: the door and window collected opening and closing information is sent to door sensor chip U1 by signal acquisition circuit 1,
Step 2: door sensor chip U1 receives and handles door and window opening and closing information, judge that door and window opening and closing information belongs to normally-open
Or unnormal unlocking；
Step 3: when door and window opening and closing information belongs to normally-open, door and window opening and closing information is sent to control through communication module 4
Host 9 processed
Step 4: when door and window opening and closing information belongs to unnormal unlocking, door sensor is opened and closed information through communication by door sensor chip U1
Module 4 is sent to control host 9, and sends open command to monitoring system 8 and alarm system 7.
Step 5, control host 9 receives door and window opening and closing information, and shows.
In step 2, the door and window opening and closing information that the 3rd switch is sent in signal acquisition circuit 1 is unnormal unlocking.
Step 5 further includes.Door and window opening and closing information is sent to control host 9 handheld terminal or PC is shown.
In step 4, after monitoring system 8 starts, the video information of shooting and audio-frequency information are sent to control host 9 and deposited
Storage.
In the present embodiment, host computer 10 is provided with 2 operating modes, and normal mode and monitoring mode, normal mode are applicable in
It is in kinsfolk, the situation that monitoring mode is applicable in and sleeps or kinsfolk is outgoing.
When host computer 10 is under normal mode of operation, when door sensor detects that door and window is opened, door sensor will detect
Information is sent to control host 9, the status information of 10 real-time display door and window of host computer；Door sensor also sends control command
System 8, and trigger monitoring system 8 and door and window is captured or imaged；The data that monitoring system 8 can will capture or camera shooting obtains simultaneously
Control host 9 is sent to, 10 real-time display of host computer simultaneously stores；
When the 3rd switch in door sensor is touched, when detecting that door and window shows unusual condition, door sensor sends out the information detected
Give control host 9, the status information of 10 real-time display door and window of host computer；Door sensor also sends control command to alarm system 7, and
Triggering alarm system 7 is alarmed；Door sensor also sends control command to monitoring system 8, and triggers monitoring system 8 and door and window is captured
Or camera shooting；Monitoring system 8 can give the data sending captured or camera shooting obtains to control host 9,10 real-time display of host computer simultaneously
And it stores；
When host computer 10 is under monitoring work pattern, when door sensor detects that door and window is opened, door sensor will detect
Information is sent to control host 9, the status information of 10 real-time display door and window of host computer；Door sensor also sends control command
System 8, and trigger monitoring system 8 and door and window is captured or imaged；The data that monitoring system 8 can will capture or camera shooting obtains simultaneously
Control host 9 is sent to, 10 real-time display of host computer simultaneously stores；Host computer 10 sends control command to alarm system 7, triggering report
Alert system 7 is alarmed；
When door sensor detects that door and window shows unusual condition, the information detected is sent to control host 9, host computer by door sensor
The status information of 10 real-time display door and windows；Door sensor also sends control command to alarm system 7, and triggers alarm system 7 and alarm；Door
Magnetic also sends control command to monitoring system 8, and triggers monitoring system 8 and door and window is captured or imaged；Monitoring system 8 simultaneously
The data sending captured or camera shooting obtains can be given to control host 9,10 real-time display of host computer simultaneously stores；
Unusual condition is observed by host computer 10 and solves unusual condition, releases the alarm response of alarm system 7
As shown in fig. 7, control host 9 include route control unit 11, routing storage unit 13, wifi communication units 14,
Ethernet interface unit 15, z-wave wireless communication units 17, z-wave storage units 16, SPI interface unit 18, power management
Unit 12.
As shown in figure 8, route control unit 11 include router chip U17, capacitance C199, capacitance C225, capacitance C226,
Capacitance C227, capacitance C228, capacitance C233, capacitance C234, capacitance C235, capacitance C236, capacitance C198, capacitance C231, capacitance
C191, capacitance C190, capacitance C146, capacitance C101, capacitance C102, capacitance C195, capacitance C141, capacitance C237, capacitance C154,
Capacitance C143, capacitance C156, capacitance C238, capacitance C150, capacitance C151, capacitance C249, capacitance C149, capacitance C148, capacitance
C152, capacitance C245, capacitance C239, inductance L112, inductance L1270, inductance L124, inductance L113, inductance L114, resistance
R216, resistance R200, resistance R173, resistance R223, resistance R214；Crystal resonator Y20, capacitance C315, capacitance C316, resistance
R490, resistance R491；Socket J11, capacitance C155, resistance R170, resistance R175；Capacitance C224, capacitance C229；Resistance R137,
Resistance R270, resistance R139, resistance R131, resistance R133, resistance R135, resistance R141, resistance R143, resistance R264；Filtering
Device U24, USB plug USB11, capacitance C175, capacitance C132, capacitance C133, resistance R176, resistance R177, inductance L118；Wire jumper
Seat J25, resistance R494, resistance R495；Resistance R108, light emitting diode D11；Capacitance C167, resistance R110, button J12；Resistance
R111, light emitting diode D15；Resistance R112, button J13.
10V digital powers are connected after capacitance C199 connects digitally filtering with the 3rd foot VDD10 of router chip U17；Electricity
Feel L1270 one termination 10V digital powers, the other end respectively with capacitance C225, capacitance C226, capacitance C227, capacitance C228, electricity
Hold the 4th foot AVDD10, the 14th foot AVDD10, the 25th foot AVDD10, the 32nd foot AVDD10_ of C233 and router chip U17
PHYPLL connections, and the other end of capacitance C225, capacitance C226, capacitance C227, capacitance C228, capacitance C233 connect digitally；
Inductance L112 one termination 3.3V digital powers, the other end respectively with capacitance C234, capacitance C235, capacitance C236 and router
The 9th foot AVDD33 of chip U17, the 20th foot AVDD33, the 30th foot AVDD33_PHYPLL connections, and capacitance C234, capacitance
C235, the other end of capacitance C236 connect digitally；The 31st foot IBREF of router chip U17 connects digitally through resistance R216；
The 33rd foot of router chip U17 is connected respectively with 10V digital powers and one end of capacitance C198 and capacitance C231, capacitance
The other end of C198 and capacitance C231 connect digitally；3.3V digital powers through capacitance C191 connect digitally filter filter after with router
The 41st foot VDD33_25_18 connections of chip U17；3.3V digital powers through capacitance C190 connect digitally filter filter after with router core
The 53rd foot VDD33_25_18 connections of piece U17；3.3V digital power through capacitance C101 connect digitally filter filter after with router chip
The 67th foot VDD33_25_18 connections of U17；3.3V digital powers through capacitance C102 connect digitally filter filter after with router chip
The 79th foot VDD33_25_18 connections of U17；3.3V digital powers through capacitance C195 connect digitally filter filter after with router chip
The 87th foot VDD33_LDO connections of U17；3.3V digital powers through capacitance C239 connect digitally filter filter after with router chip U17
The 119th foot VDD33 connections；64th foot of the 10V digital powers after capacitance C146 connects digitally filter filter with router chip U17
VDD10 connections；One end of resistance R311 is connected with 3.3V digital powers, and the other end is connected respectively with capacitance C143, capacitance C154,
Capacitance C143, capacitance C154 another termination digitally；3.3V digital powers through capacitance C152 connect digitally filtering after with inductance
One end connection of L114, the other end of inductance L114 after capacitance C245 connects digitally filtering with router chip U17 the 112nd
Foot AVDD33_BG connections, the 109th foot AVDD33X of the other end of inductance L114 also through capacitance C148 and router chip U17 connect
It connects, the other end of inductance L114 is also connected through capacitance C156 with the 96th foot AVDD33_USB of router chip U17；10V numbers
Power supply is connected after capacitance C249 connects digitally filtering with one end of inductance L113, and the other end of inductance L113 connects through capacitance C149
It is connected after digitally filtering with the 103rd foot AVDD10_PCIE of router chip U17, the other end of inductance L113 is also through capacitance
C150 and capacitance C151 is connected after connecing digitally filtering respectively with 97 foot AVDD10_USB；10V digital powers connect through capacitance C238
After digitally filtering, it is connected with the 95th foot SWR_VDD10 of router chip U17, also one end with resistance R223 is connected, resistance
The other end of R223 is connected after capacitance C141 and capacitance C237 connect digitally filtering with one end of inductance L124 respectively, inductance
The other end of L124 is connected respectively with SWR_LX and the 91st foot SWR_LX；The 93rd foot SWR_MODE of router chip U17 is through electricity
Resistance R173 connects digitally.
The 1st foot XTALP of crystal resonator Y20 connects digitally through capacitance C316, then through resistance series connection and router chip
The 110th foot XO connections of U17；The 2nd foot GND of crystal resonator Y20 and the 4th foot GND are grounded；The 3rd of crystal resonator Y20
Foot XTALP connects digitally through capacitance C315, then is connected through resistance R490 with the 111st foot XI of router chip U17.
The 2nd foot, the 4th foot, the 6th foot, the 8th foot, the 10th foot, the 12nd foot of debugging interface J11 connects digitally；It is 3.3V digital
Power supply is connected after capacitance C155 connects digitally filtering, then through resistance R175 with the 1st foot of debugging interface J11, also through resistance
R170 is connected with the 11st foot of debugging interface J11；The 3rd foot of debugging interface J11 and the 128th foot of router chip U17
JTAGTDI connections；The 5th foot of debugging interface J11 is connected with the 1st foot JTAGTDO of router chip U17；Debugging interface J11's
7th foot is connected with the 2nd foot JTAGTMS of router chip U17；The of the 9th foot of debugging interface J11 and router chip U17
127 foot JTAGCLK connections.
1st foot VBUS of USB socket connects through capacitance digitally to be filtered, then is connected with the 1st foot of wire jumper seat J25；USB socket
The 2nd foot DN after capacitance C132 connects digitally filtering, then be connected with the 2nd foot of wave filter U24；The 3rd foot DP warps of USB socket
After capacitance C133 connects digitally filtering, then it is connected with the 3rd foot of wave filter U24；4th foot GND of USB socket connects simulation ground；USB
5th foot Chassis of socket and the 6th foot Chassis connects shielding ground；4th foot GND of USB socket and the 5th foot Chassis it
Between go back tandem electric inductance L118；1st foot of wave filter is connected with the 99th foot USB_DN of router chip U17；4th foot of wave filter
It is connected with the 98th foot USB_DP of router chip U17；Series resistor R176 between 1st foot of wave filter and the 2nd foot；Wave filter
The 3rd foot and the 4th foot between series resistor R177；One end of inductance L116 is connected with power supply VIN, the other end respectively with capacitance
2nd foot of C188, capacitance C189 and wire jumper seat connects, and the other end of capacitance C188 and capacitance C189 are digitally；Wire jumper seat
The 3rd foot be grounded through resistance R494 and resistance R495；One end of resistance R108 is connected with 3.3V digital powers, and the other end is with shining
The anode connection of diode D11, the cathode of light emitting diode D11 connect digitally；3.3V digital powers connect number through capacitance C167
Be connected after ground filtering with one end of resistance R110, the other end of resistance R110 passes through the with resistance R156 and router chip U17
128 foot JTGTDI connections；Resistance R156 is connected with the connecting pin of resistance R110 with one end of button J12, the other end of button J12
It connects digitally；3.3V digital powers are connected through resistance R111 with the anode of light emitting diode D15, the cathode of light emitting diode D15
It is connected with one end of resistance R161, the other end of resistance R161 is connected with the 1st foot JTGTDO of router chip U17；3.3V number
Word power supply is connected through resistance R112 with one end of resistance R160, and the tie point of resistance R160 and resistance R112 is also with button J13's
One end connects, another termination of button J13 digitally, the other end of resistance R160 and the 127th foot of router chip U17
JTAGCLK connections.
The 48th foot MA4 of router chip U17 is connected by resistance R137 with 3.3V digital powers；Router chip U17
The 43rd foot MA8 be connected by resistance R270 with 3.3V digital powers；The 37th foot MA12 of router chip U17 passes through resistance
R139 is connected with 3.3V digital powers；The 42nd foot MA9 of router chip U17 connects by resistance R131 and 3.3V digital powers
It connects；The 39th foot MA10 of router chip U17 is connected by resistance R133 with 3.3V digital powers；The of router chip U17
38 foot MA11 are connected by resistance R135 with 3.3V digital powers；The 35th foot BS1 of router chip U17 by resistance R141 with
3.3V digital powers connect；The 36th foot BS0 of router chip U17 is connected by resistance R143 with 3.3V digital powers；Routing
The 125th foot U0TXD of device chip U17 is connected by resistance R264 with 3.3V digital powers；
As shown in figure 9, routing storage unit 13 include synchronous DRAM U11, capacitance C197, capacitance C208,
Capacitance C210, resistance R500, resistance R187, resistance R201, capacitance C144, capacitance C145, capacitance C230, capacitance C162, capacitance
C163, capacitance C164, capacitance C165；Routing storage unit 13 further include flash storage U19, capacitance C219, resistance R210,
Resistance R212；
3.3V digital powers are respectively by capacitance C144, capacitance C145, capacitance C230, capacitance C162, capacitance C163, capacitance
C164, capacitance C165 provide stable 3.3V digital powers for synchronous DRAM after connecing digitally filtering, synchronous dynamic
The 1st foot VCC, the 3rd foot VCCQ, the 9th foot VCCQ, the 14th foot VCC, the 27th foot VCC of state random access memory U11 connects 3.3V numbers
Power supply；The 6th foot VSSQ, the 12nd foot VSSQ, the 28th foot VSS, the 41st foot VSS, the 46th foot of synchronous DRAM U11
VSSQ, the 52nd foot VSSQ, the 54th foot VSS connect digitally；3.3V digital powers also through capacitance C197 connect digitally filter filtering after,
It is connected respectively with the 43rd foot VCCQ, the 49th foot VCCQ of synchronous DRAM U11 again；3.3V is digitally also through resistance
R500 is connected with the 118th foot GPIOB5 of router chip U17；The 38th foot CLK of synchronous DRAM U11 is through capacitance
C210 and capacitance C208 is connected after connecing digitally filtering respectively with one end of resistance R201, the other end and router of resistance R201
The 65th foot MCLK connections of chip U17；The 37th foot CKE of synchronous DRAM U11 is through resistance R187 and 3.3V numbers
Power supply connects；The 2nd foot DQ0 of synchronous DRAM U11 is connected with the 62nd foot MD0 of router chip U17；It is synchronous dynamic
The 4th foot DQ1 of state random access memory U11 is connected with the 61st foot MD1 of router chip U17；Synchronous DRAM U11
The 5th foot DQ2 be connected with the 60th foot MD2 of router chip U17；The 7th JiaoDQ3Yu roads of synchronous DRAM U11
By the 59th foot MD3 connections of device chip U17；The of the 8th foot DQ4 and router chip U17 of synchronous DRAM U11
58 foot MD4 connections；The 10th foot DQ5 of synchronous DRAM U11 is connected with the 57th foot MD5 of router chip U17；Together
The 11st foot DQ6 of step dynamic RAM U11 is connected with the 56th foot MD6 of router chip U17；Synchronous dynamic random stores
The 13rd foot DQ7 of device U11 is connected with the 55th foot MD7 of router chip U17；The 42nd foot of synchronous DRAM U11
DQ8 is connected with the 71st foot MD8 of router chip U17；The 44th foot DQ9 of synchronous DRAM U11 and router core
The 72nd foot MD9 connections of piece U17；The 73rd foot of the 45th foot DQ10 and router chip U17 of synchronous DRAM U11
MD10 connections；The 47th foot DQ11 of synchronous DRAM U11 is connected with the 74th foot MD11 of router chip U17；Together
The 48th foot DQ12 of step dynamic RAM U11 is connected with the 75th foot MD12 of router chip U17；Synchronous dynamic random is deposited
The 50th foot DQ13 of reservoir U11 is connected with the 76th foot MD13 of router chip U17；The of synchronous DRAM U11
51 foot DQ14 are connected with the 77th foot MD14 of router chip U17；The 53rd foot DQ15 of synchronous DRAM U11 with
MD15 connections；The 15th foot LDQM of synchronous DRAM U11 is connected with the 54th foot LDQM of router chip U17；Together
The 16th foot WE of step dynamic RAM U11 is connected with the 82nd foot WE# of router chip U17；Synchronous dynamic random stores
The 17th foot CAS of device U11 is connected with the 81st foot CAS# of router chip U17；The 19th foot of synchronous DRAM U11
CS is connected with the 83rd foot MSD_CS0B of router chip U17；The 20th foot BS0 of synchronous DRAM U11 and routing
The 36th foot BS0 connections of device chip U17；The of the 21st foot BS1 and router chip U17 of synchronous DRAM U11
35 foot BS1 connections；The 39th foot UDQM of synchronous DRAM U11 is connected with the 69th foot UDQM of router chip U17；
The 23rd foot A0 of synchronous DRAM U11 is connected with the 52nd foot MA0 of router chip U17；Synchronous dynamic random is deposited
The 24th foot A1 of reservoir U11 is connected with the 51st foot MA1 of router chip U17；The 25th foot of synchronous DRAM U11
A2 is connected with the 50th foot MA2 of router chip U17；The 26th foot A3 and router chip of synchronous DRAM U11
The 49th foot MA3 connections of U17；The 48th foot MA4 of the 29th foot A4 and router chip U17 of synchronous DRAM U11
Connection；The 30th foot A5 of synchronous DRAM U11 is connected with the 46th foot MA5 of router chip U17；Synchronous dynamic with
The 31st foot A6 of machine memory U11 is connected with the 45th foot MA6 of router chip U17；The of synchronous DRAM U11
32 foot A7 are connected with the 44th foot MA7 of router chip U17；The 33rd foot A8 and router of synchronous DRAM U11
The 43rd foot MA8 connections of chip U17；The 42nd foot of the 34th foot A9 and router chip U17 of synchronous DRAM U11
MA9 connections；The 22nd foot A10 of synchronous DRAM U11 is connected with the 39th foot MA10 of router chip U17；It is synchronous
The 35th foot A11 of dynamic RAM U11 is connected with the 38th foot MA11 of router chip U17；Synchronous dynamic random stores
The 36th foot A12 of device U11 is connected through resistance R200 with the 37th foot MA12 of router chip U17；
The 1st foot CS of flash storage U19 is connected with the 123rd foot SF_CS0# of router chip U17；Flash is stored
The 2nd foot SO/SIO1 of device U19 is connected with the 122nd foot SF_SDIO1 of router chip U17；The 3rd foot of flash storage U19
It is connected through resistance R210 with 3.3V digital powers；The 4th foot of flash storage U19 connects digitally；The of flash storage U19
5 foot SO/SIO0 are connected with the 121st foot SF_SDIO0 of router chip U17；The 6th foot SCLK of flash storage U19 and road
By the 120th foot SF_SCK connections of device chip U17；The 7th foot NC/SIO3 of flash storage U19 is through resistance R212 and 3.3V numbers
Word power supply connects；3.3V digital powers connect after capacitance C219 connects digitally filtering with the 8th foot VCC of flash storage U19
It connects；
As shown in Figure 10, WIFI communication units 14 include PCI connectors JP1, resistance R501；Resistance R20, resistance R34, electricity
Hinder R510, resistance R511, resistance R512, resistance R513, light emitting diode D1, light emitting diode D25, light emitting diode D26, electricity
Hold C325, capacitance C326,
The 1st foot WAKE# of PCI connectors JP1 is connected through resistance R159 with the 2nd foot JTGTMS of router chip U17,
The 2nd foot 3.3V, the 24th foot+3.3VAUX and the 52nd foot+3.3V of PCI connectors JP1 accesses 3.3V digital powers, and PCI connects
The 7th foot CLKREQ# for meeting device JP1 connects digitally through resistance R501, GND_0, the 9th foot GND_1, the 15th foot GND_2, the 18th foot
GND_3, the 21st foot GND_4, the 26th foot GND_5, the 27th foot GND_6, the 29th foot GND_7, the 34th foot GND_8, the 35th foot GND_
9th, the 40th foot GND_10, the 50th foot GND_11 connect digitally, the 11st foot REFCLK- and router chip of PCI connectors JP1
The 104th foot REFCLKN0 connections of U17, the 105th foot of the 13rd foot REFCLK+ and router chip U17 of PCI connectors JP1
REFCLKNP connections, the 23rd foot PERN0 of PCI connectors JP1 after capacitance C325 series connection with router chip U17 the 106th
Foot HSIN0 connections, the 107th foot of the 25th foot PERP0 of PCI connectors JP1 after capacitance C326 series connection with router chip U17
HSIP0 connections, the 102nd foot of the 31st foot PETN0 of PCI connectors JP1 after capacitance C224 series connection with router chip U17
HSOP0 connections, the 101st foot of the 33rd foot PETP0 of PCI connectors JP1 after capacitance C229 series connection with router chip U17
HSON0 connections, the 22nd foot PERST# of PCI connectors JP1 are connected with the 124th foot PCIE_RST of router chip U17；PCI
The 42nd foot LED_WWAN# of connector JP1 is connected with one end of resistance R20, and the other end of resistance R20 is with light emitting diode D1's
Cathode connects, and the anode of light emitting diode D1 is connected through resistance R34 with 3.3V digital powers；The 44th foot of PCI connectors JP1
LED_WLAN# is connected with one end of resistance R510, and the other end of resistance R510 is connected with the cathode of light emitting diode D25, is shone
The anode of diode D25 is connected through resistance R511 with 3.3V digital powers；The 46th foot LED_WPAN# of PCI connectors JP1 and electricity
One end connection of R512 is hindered, the other end of resistance R512 is connected with the cathode of light emitting diode D26, the sun of light emitting diode D26
Pole is connected through resistance R513 with 3.3V digital powers；
As shown in figure 11, Ethernet interface unit 15 includes capacitance C103, capacitance C104, capacitance C105, capacitance C106, electricity
Hold C108, capacitance C109, capacitance C110, capacitance C111, capacitance C112, capacitance C113, capacitance C115, capacitance C116, capacitance
C118, capacitance C119, capacitance C120, capacitance C122, capacitance C124, capacitance C126, capacitance C129, capacitance C130；Ethernet turns
Parallel operation U12, capacitance C107, ether network switch U13, capacitance C114, capacitance C117, ether network switch U14, capacitance C121,
Capacitance C125；Network joint P11；
The 1st foot RD+ of Ethernet interface U12 through capacitance C103 connect digitally filtering after with router chip U17 the 29th
Foot RXIN4 connections, the 3rd foot RD- of Ethernet interface U12 is after capacitance C104 connects digitally filtering with router chip U17's
28th foot RXIP4 connections, the 4th foot meridian capacitor C107 of Ethernet interface U12 connect digitally, the 5th foot TD of Ethernet interface U12
+ be connected after capacitance C105 connects digitally filtering with the 27th foot RXON4 of router chip U17, the 7th of Ethernet interface U12 the
Foot TD- is connected after capacitance C106 connects digitally filtering with the 26th foot RXOP4 of router chip U17, Ethernet interface U12's
10th foot TX+ is connected with the pin TX4+ of network interface P11；The 12nd foot TX-'s and network interface P11 of Ethernet interface U12
Pin TX4- connections；The 14th foot RX+ of Ethernet interface U12 is connected with the pin RX4+ of network interface P11；Ethernet interface
The 16th foot RX- of U12 is connected with the pin RX4- of network interface P11；
The 1st foot RD0- of Ethernet interface U13 through capacitance C111 connect digitally filtering after with router chip U17 the 24th
Foot TDOP3 connections, the 2nd foot RD0+ of Ethernet interface U13 is after capacitance C110 connects digitally filtering with router chip U17's
23rd foot TDON3 connections, the 3rd foot CT0 of Ethernet interface U13 connect digitally through capacitance C114, and the 4th of Ethernet interface U13 the
Foot TD0- is connected after capacitance C109 connects digitally filtering with the 22nd foot RDIP3 of router chip U17, Ethernet interface U13
The 5th foot TD0+ be connected after capacitance C108 connects digitally filtering with the 21st foot IDIN3 of router chip U17, Ethernet connects
The 19th foot TX3- of mouth U13 is connected with the pin TX3- of network interface P11, the 20th foot TX3+ and network of Ethernet interface U13
The pin TX3+ connections of interface P11, the 16th foot RX3- of Ethernet interface U13 are connected with the pin RX3- of network interface P11, with
Too the 17th foot RX3+ of network interface U13 is connected with the pin RX3+ of network interface P11, the 10th foot RD1- of Ethernet interface U13
It is connected after capacitance C116 connects digitally filtering with the 15th foot TDOP2 of router chip U17, the 9th foot of Ethernet interface U13
RD1+ is connected after capacitance C115 connects digitally filtering with the 16th foot TDON2 of router chip U17, Ethernet interface U13's
8th foot CT1 connects digitally through capacitance C117, the 7th foot TD1- of Ethernet interface U13 after capacitance C113 connects digitally filtering with
The 18th foot RDIP2 connections of router chip U17, the 6th foot TD1+ of Ethernet interface U13 connects through capacitance C112 digitally to be filtered
It is connected afterwards with the 19th foot TDIN2 of router chip U17, the pipe of the 12nd foot TX2- and network interface P11 of Ethernet interface U13
Foot TX2- connections, the 11st foot TX2+ of Ethernet interface U13 are connected with the pin TX2+ of network interface P11, Ethernet interface U13
The 15th foot RX2- be connected with the pin RX2- of network interface P11, the 14th foot RX2+ and network interface of Ethernet interface U13
The pin RX2+ connections of P11,
The 1st foot RD0- of Ethernet interface U14 through capacitance C122 connect digitally filtering after with router chip U17 the 13rd
Foot TDOP1 connections, the 2nd foot RD0+ of Ethernet interface U14 is after capacitance C120 connects digitally filtering with router chip U17's
12nd foot TDON1 connections, the 3rd foot CT0 of Ethernet interface U14 connect digitally through capacitance C121, and the 4th of Ethernet interface U14 the
Foot TD0- is connected after capacitance C119 connects digitally filtering with the 11st foot RDIP1 of router chip U17, Ethernet interface U14
The 5th foot TD0+ be connected after capacitance C118 connects digitally filtering with the 10th foot IDIN1 of router chip U17, Ethernet connects
The 19th foot TX1- of mouth U14 is connected with the pin TX1- of network interface P11, the 20th foot TX1+ and network of Ethernet interface U14
The pin TX1+ connections of interface P11, the 16th foot RX1- of Ethernet interface U14 are connected with the pin RX1- of network interface P11, with
Too the 17th foot RX1+ of network interface U14 is connected with the pin RX1+ of network interface P11, the 10th foot RD1- of Ethernet interface U14
It is connected after capacitance C130 connects digitally filtering with the 5th foot TDOP0 of router chip U17, the 9th foot of Ethernet interface U14
RD1+ is connected after capacitance C129 connects digitally filtering with the 6th foot TDON0 of router chip U17, and the of Ethernet interface U14
8 foot CT1 connect digitally through capacitance C125,
The 7th foot TD1- of Ethernet interface U14 through capacitance C126 connect digitally filtering after with router chip U17 the 7th
Foot RDIP0 connections, the 6th foot TD1+ of Ethernet interface U14 is after capacitance C124 connects digitally filtering with router chip U17's
8th foot TDIN0 connections, the 12nd foot TX0- of Ethernet interface U14 are connected with the pin TX0- of network interface P11, and Ethernet connects
The 11st foot TX0+ of mouth U14 is connected with the pin TX0+ of network interface P11, the 15th foot RX0- and network of Ethernet interface U14
The pin RX0- connections of interface P11, the 14th foot RX0+ of Ethernet interface U14 are connected with the pin RX0+ of network interface P11, net
Pin PGF, pin PGD, pin PGC, the pin PGB of network interface P11 connects digitally；
Routeing indicator unit includes capacitance C161, resistance R115, resistance R117, resistance R120, resistance R122, luminous two
Pole pipe D16, light emitting diode D18, light emitting diode D20, light emitting diode D24；
3.3V digital powers through capacitance C161 connect digitally filtering after, respectively with resistance R115, resistance R117, resistance
R120, resistance R122 connections, the other end of resistance R115 are connected with the anode of light emitting diode D16, the moon of light emitting diode D16
Pole is connected with the 117th foot LED_PORT0 of router chip U17, the other end of resistance R117 and the anode of light emitting diode D18
Connection, the cathode of light emitting diode D18 are connected with the 114th foot LED_PORT1 of router chip U17, and resistance R120's is another
End is connected with the anode of light emitting diode D20, the cathode of light emitting diode D20 and the 115th foot LED_ of router chip U17
PORT2 connections, the other end of resistance R122 are connected with the anode of light emitting diode D24, the cathode of light emitting diode D24 and routing
The 116th foot LED_PORT4 connections of device chip U17；
As shown in figure 12, unit 12 includes power supply adaptor J14, buck converter U25, capacitance C171, electricity in power supply pipe
Hold C172, capacitance C177, capacitance C319, capacitance C320, capacitance C317, capacitance C318, capacitance C176, capacitance C160, resistance
R496, resistance R498, resistance R497, resistance R499, inductance L104, inductance L109, inductance L937, inductance L107；Capacitance C188,
Capacitance C189, inductance L116；
The 2nd foot of power supply adaptor J14 and the 3rd foot connect shielding ground, the 1st foot access DC supply input, and the 1st foot also divides
It is not connected with capacitance C171 and one end of capacitance C172 and inductance L104, another termination of capacitance C171 and capacitance C172 connect screen
Ground, the other end out-put supply VIN of inductance L104 are covered, and is connected with the 2nd foot IN of buck converter U25；The one of inductance L109
End also connects shielding ground, and another termination of inductance L109 is digitally；4th foot of buck converter connects digitally, and the 6th foot connects simulation
Ground；Capacitance C177, capacitance C319, the anode of capacitance C320 are connected with power supply VIN, capacitance C177, capacitance C319, capacitance C320
Cathode connect digitally；The both ends of resistance R498 are connected respectively with being depressured the 1st foot PG and the 2nd foot IN of chip U25；Resistance
The both ends of R496 are connected respectively with being depressured the 8th foot EN and the 2nd foot IN of chip U25；The both ends of inductance L937 are respectively with being depressured core
The 3rd foot SW of piece U25 and the 5th foot OUT connections, the both ends of resistance R497 are respectively with being depressured the 5th foot OUT and the 7th foot of chip U25
FB connections；One end of resistance R499 is connected with being depressured the 7th foot FB of chip U25, another termination simulation ground；Capacitance C317, capacitance
C318, the anode of capacitance C176 are connected with being depressured the 5th foot OUT of chip U25, capacitance C317, capacitance C318, capacitance C176
Cathode connects digitally；One end of inductance L107 is connected with the anode of capacitance C176, and the other end is after capacitance connects digitally filtering
Export 3.3V digital powers；
As shown in figure 13, Z-wave wireless communication units 17 include Z-Wave chips U26, capacitance C321, capacitance C322, electricity
Hold C330, capacitance C329, capacitance C331, capacitance C327, capacitance C328, antenna H10, resistance R503, resistance R504, resistance
R505, resistance R506, resistance R507, switch JP3, resistance R508, resistance R509, capacitance C324.
The 1st foot GND1, the 6th foot GND2, the 12nd foot GND3, the 17th foot GND4, the 18th foot GND5 of Z-Wave chips U26 is equal
Connect simulation ground；The 2nd foot RESET_N of Z-Wave chips U26 is connected with the 118th foot GPIOB5 of router chip U17；3.3V number
Word power supply is connected after capacitance C321 and capacitance C322 is filtered with connecing simulation respectively with the 11st foot VCC of Z-Wave chips U26；Z-
The 19th foot of Wave chips U26 is connected with the anode of capacitance C329, and the anode of capacitance C330 is connected with the anode of capacitance C329, electricity
The cathode for holding C330 connects simulation ground, and the anode of capacitance C331 is connected with the cathode of capacitance C329, and the cathode of capacitance C331 connects simulation
Ground；The cathode of the cathode of capacitance C327 and the cathode of capacitance C328 with capacitance C329 is connected, the anode and capacitance of capacitance C327
The anode of C328 is connected with antenna JMA；The 126th foot U0_ of the 15th foot TXD and router chip U17 of Z-Wave chips U26
RX connections, the 10th foot RXD of Z-Wave chips U26 are connected with the 125th foot U0_TX of router chip U17；
Resistance R503, resistance R504, resistance R505, one end of resistance R506 and resistance R507 homogeneously connect, resistance
The other end of R503 is connected with 3.3V digital powers, and the other end of resistance R504 connects with the 15th foot TXD of Z-Wave chips U26
It connects, the other end of resistance R505 and the 8th foot of connector connect, the other end of resistance R506 and the 14th of Z-Wave chips U26 the
Foot ZEROX connections, another termination simulation ground of resistance R507；
A termination 3.3V digital powers of resistance R508, the other end are connected with the anode of capacitance C324, and capacitance C324's is negative
Pole connects simulation ground, and the anode of capacitance C324 connects simulation ground through switch, the anode of capacitance C324 also after resistance R509 series connection with Z-
The 3rd foot INT1 connections of Wave chips U26；
As shown in figure 14, z-wave storage units 16 include flash storage U27, capacitance C323, resistance R502.
1st foot CS of flash storage is pulled up through resistance R502 and is connected with 3.3V digital powers, also with Z-Wave chips
The 5th foot P1.5 connections of U26；2nd foot SO of flash storage is connected with the 7th foot MISO of Z-Wave chips U26, and Flash is deposited
5th foot SI of reservoir is connected with the 9th foot MOSI of Z-Wave chips U26, the 6th foot SCK and the Z-Wave chips of flash storage
The 8th foot SCK connections of U26, the 4th foot GND of flash storage connect simulation ground, and 3.3V digital powers connect simulation through capacitance C323
It is connected respectively with the 3rd foot WP, the 7th foot HOLD and the 8th foot VCC of flash storage after ground filtering；
As shown in figure 15, SPI interface unit 18 includes programming interface JP2, connector JP9.
The 1st foot P1 of programming interface JP2 connects 3.3V digital powers, the 2nd foot P2 and the Z-Wave chips of programming interface JP2
The 16th foot VPP connections of U26, the 4th foot P4 of programming interface JP2 are connected with the 9th foot MOSI of Z-Wave chips U26, and programming connects
The 6th foot P6 of mouth JP2 is connected with the 7th foot MISO of Z-Wave chips U26, the 8th foot P8 and the Z-Wave chips of programming interface JP2
The 8th foot SCK connections of U26, the 10th foot P10 of programming interface JP2 are connected with the 2nd foot RESET_N of Z-Wave chips U26, are compiled
The 9th foot P9 of the 7th foot P7 programming interface JP2 of journey interface JP2 connects simulation ground；
The 1st foot of connector JP9 connects 3.3V digital powers, and the 2nd foot of connector JP9 connects simulation ground, and the of connector JP9
3 feet are connected with the 14th foot ZEROX of Z-Wave chips U26, the 4th foot of connector JP9 and the 4th foot PWM of Z-Wave chips U26
Connection, the 5th foot of connector JP9 are connected with the 13rd foot TRIAC of Z-Wave chips U26, the 6th foot and Z- of connector JP9
The 5th foot P1.5 connections of Wave chips U26.
As shown in figure 16, a kind of smart home signal amplification circuit, including power module, z-wave signal processing modules,
Signal amplification module, flash memory module, data input module.
The data input module connects z-wave signal processing modules, the z-wave signal processing modules respectively with number
It is connected according to input module, signal amplification module, z-wave signal processing modules receive the signal of data input module, identified place
Be output to signal amplification module after reason, signal amplification module is amplified and passes through antenna transmission, the power module respectively with
Z-wave signal processing modules, signal amplification module, data input module connection, to power.
Wherein, flash memory module is further included, as shown in figure 21, flash memory module is connected with z-wave signal processing modules, to
Cache z-wave signal processing module data.
Wherein, as shown in figure 17, the data input module includes data-interface J1, the data-interface J1 equipped with 12
Foot, the 3rd foot, the 9th foot equipped with capacitance C1 Parallel Data interfaces J1, a termination number of the 3rd feet of capacitance C1 connection data-interfaces J1
Word, the 3rd foot, the 9th foot equipped with Parallel Data interface J1 after capacitance C2 both ends difference series inductance L2, inductance L1, capacitance C2
One end connection power supply of inductance L1, another termination simulation ground are connected, other feet of the data-interface J1 connect z-wave respectively
Signal processing module.
Wherein, the data input module further includes usb interfaces, and the usb interfaces are equipped with 6 feet, the 1st foot, the 2nd foot,
3rd foot connects z-wave signal processing modules, and the 4th foot, the 5th foot, the 6th foot connect simulation ground.
Wherein, the power module includes voltage-regulating circuit, as shown in figure 23, the voltage-regulating circuit conversion 5V electricity
Source voltage is DVDD3.3V supply voltages, and the voltage-regulating circuit exports DVDD3.3V voltages to z-wave signal processings respectively
Module, signal amplification module, flash memory module.
Wherein, the power module further includes electric source filter circuit, the electric source filter circuit conversion conversion DVDD3.3V
Voltage is AVDD3.3V voltages, and the electric source filter circuit exports AVDD3.3V voltages to z-wave signal processing modules.
Wherein, as shown in figure 19, the smart home signal amplification circuit further includes interrupt circuit, the interrupt circuit bag
Interrupt switch SW1, resistance R1, resistance R4, capacitance C3 are included, interrupt switch is equipped with 4 feet, is connected after the 1st foot series resistance R1
DVDD3.3V voltages, z-wave signal processing modules are connected after the 1st foot series resistance R4, and the 2nd foot meets simulation ground, the capacitance C3
The 1st foot, the 2nd foot of interrupt switch in parallel.
A kind of intelligent domestic system based on smart home signal amplification circuit, signal amplification circuit, alarm system, control
Host, monitoring system, household electric appliance control equipment, lamp dimmer, the signal amplification circuit are led with the alarm system, control
Machine, monitoring system, household electric appliance control equipment, lamp dimmer difference electric signal connection.
A kind of signal amplification circuit of smart home of the present invention can effectively realize the child node letter in Z-WAVE networks
Number amplification, convenient child node and child node or the signal transmission of control host and child node.
The Z-WAVE signal processing modules use ZM4101 chips, and the signal amplification module uses SE2435L chips
Chip.
The signal amplification circuit includes data input module, ZM4101 chips, flash memory module, interrupt circuit, power supply mould
Block.The power module includes power module voltage-regulating circuit, power conversion module, and data input module includes data-interface
J1, usb interface J2.
As shown in figure 23, voltage-regulating circuit includes voltage regulator module U3, capacitance C11, capacitance C12, capacitance C13, electricity
Hold C14, capacitance C15, capacitance C16, capacitance C17, resistance R8, resistance R9.Voltage regulator module is equipped with pin VIN, the 2nd pin
GND, the 3rd pin #SHDN, the 4th pin BP, the 5th pin VOUT, the 1st pin are concatenated the 3rd pin #SHDN of resistance R9 connections, the
1 pin VIN through and couple the capacitance C11 on simulation ground, be connected with the power supply of 5V after capacitance C12 voltage regulation filterings.2nd pin GND connects
Simulation ground, the 3rd pin #SHDN series capacitances C16 are followed by simulation ground.4th pin BP is through resistance R8 in parallel, capacitance C13 connections
5th pin VOUT, the 4th pipe foot meridian capacitor C17 connect simulation ground.5th pin VOUT series capacitances C14, capacitance C15 connect simulation
Ground, meanwhile, the 5th pin VOUT out-put supplies DVDD.
As shown in figure 18, power conversion module includes capacitance C5, capacitance C6, capacitance C7, capacitance C8, capacitance C9, capacitance
C10, inductance L3.The both ends of the power supply DVDD of input terminal and the power supply AVDD connection inductance L3 of output terminal, power supply DVDD also with simultaneously
Connection simulation ground capacitance C5, capacitance C6, capacitance C7 connections, power supply AVDD with and couple simulate ground capacitance C8, capacitance C9, electricity
Hold C10 connections.
The Z-WAVE signal processing modules use ZM4101 chips, and the signal amplification module uses SE2435L chips
Chip.
As shown in figure 22, the Z-WAVE signal processing modules institute is provided with 56 pins using ZM4101 chips, wherein
1st pin GND, the 4th pin GND, the 7th pin GND, the 10th pin GND, the 13rd pin GND, the 14th pin GND, the 21st pin
GND, the 22nd pin GND, the 24th pin GND, the 25th pin GND, the 30th pin GND, the 35th pin GND, the 40th pin GND,
45th pin GND, the 50th pin GND, the 55th pin GND connect simulation ground.
ZM4101 chips set the 26th pin P0.0/KEYPAD, the 27th pin P0.1/KEYPAD, the 28th pin P0.2/
KEYPAD, the 29th pin P0.3/KEYPAD, the 31st pin P0.4/KEYPAD, the 32nd pin P0.5/KEYPAD, the 33rd pin
P0.6/KEYPAD, the 34th pin P0.7/KEYPAD, the 36th pin P1.0/INT0/KEYPAD, the 37th pin P1.1/INT1/
KEYPAD, the 38th pin P1.2/KEYPAD, the 39th pin P1.3/KEYPAD, the 41st pin P1.4/KEYPAD, the 42nd pin
P1.5/KEYPAD, the 43rd pin P1.6/KEYPAD, the 44th pin P1.7/KEYPAD.
ZM4101 chips set the 5th pin AVDD of connection power supply DVDD, the 6th pin DVDD of connection power supply AVDD, the 8th
Pin RESET, the 9th pin TEST_N, the 11st pin QCS_Q1, the 12nd pin QSC_Q2, the 23rd pin RIFO, the 56th pin
VPP。
ZM4101 chips are additionally provided with the 2nd pin USB_DM, the 3rd pin USB_DP, the 15th pin P3.7/PWM/ADC3/
ZEREX/KEYAD, the 16th pin P3.6/IRTX2/ADC2/TRIAC/KEYAD, the 17th pin P3.5/IRTX1/ADC1/
KEYAD, the 18th pin P3.4/IRTX0/ADC0/KEYAD, the 19th pin P3.1/IRRX/TXD1/KEYAD, the 20th pin
P3.0/SS0_N/RXD1/KEYAD, the 46th pin P2.7/SCK0, the 47th pin P2.6/MISO0, the 48th pin P2.5/
MOSI0, the 49th pin P2.4/SCK1, the 51st pin P2.3/MISO1, the 52nd pin P2.2/MOSI1, the 53rd pin P2.1/
TXD0, the 54th pin P2.0/RXD0.
Interface circuit sets 12 pins, the 1st pipe including interface J1, capacitance C1, capacitance C2, inductance L1, inductance L2, interface J1
The 15th pin P3.7/PWM/ADC3/ZEREX/KEYAD of foot connection ZM4101 chips, the 6th pin connect the 16th of ZM4101 chips
Pin P3.6/IRTX2/ADC2/TRIAC/KEYAD, the 8th pin connect the 17th pin P3.5/IRTX1/ of ZM4101 chips
ADC1/KEYAD, the 10th pin connect the 18th pin P3.4/IRTX0/ADC0/KEYAD of ZM4101 chips, the connection of the 11st pin
20th pin P3.0/SS0_N/RXD1/KEYAD of ZM4101 chips.2nd pin connects the 53rd pin of ZM4101 chips
P2.1/TXD0, the 4th pin connect the 54th pin P2.0/RXD0 of ZM4101 chips.3rd pin connects digitally, and the 3rd pin is also
Connect capacitance C1, one end of inductance L2.The 9th pin of the other end connecting interface J1 of capacitance C1, capacitance C1 connection inductance L1's
One end, on the one hand connection 5V power supplys, another aspect series inductance C2 connect simulation ground, the other end of inductance L2 to the other end of inductance L1
On the one hand simulation ground is connect.The 3rd pin USB_DP of 5th pin connection ZM4101 chips, the 7th pin connection ZM4101 chips the 2nd are managed
Foot USB_DM.12nd pin connects the 8th pin RESET of ZM4101 chips.
Interface J2 be equipped with the 1st pin VCC, the 2nd pin DATA-, the 3rd pin DATA+, the 4th pin GND, the 5th pin GND,
6th pin GND, the 1st pin VCC connection 5V power supplys, the 2nd pin USB_DM of the 2nd pin DATA- connection ZM4101 chips, the 3rd pipe
The 3rd pin USB_DP of foot DATA+ connection ZM4101 chips, the 4th pin GND, the 5th pin GND, the 6th pin GND connect digitally.
Anneta module includes antenna ANT1, antenna ANT2, chip U6.
As shown in figure 19, the signal amplification module uses SE2435L microarray biochips to be equipped with the 1st pin CSD, the 2nd pipe
Foot PA_IN, the 3rd pin CPS, the 4th pin CTX, the 5th pin X_FLT, the 6th pin TR, the 7th pin ANT_SEL, the 8th pin
GND, the 9th pin LAN_IN, the 10th pin NC1, the 11st pin RX_FLT, the 12nd pin ANT2, the 13rd pin NC2, the 14th pipe
Foot TANT1, the 15th pin NC3, the 16th pin TX_IN, the 17th pin NC4, the 18th pin NC5, the 19th pin NC6, the 20th pipe
Foot PA_OUT, the 21st pin VCC2, the 22nd pin NC7, the 23rd pin VCC0, the 24th pin VCC1, the 25th pin EPAD.
39th pin P1.3/KEYPAD of the 1st pin CSD connection ZM4101 chips, the 3rd pin CPS connection ZM4101 cores
41st pin P1.4/KEYPAD of piece, the 42nd pin P1.5/KEYPAD of the 4th pin CTX connection ZM4101 chips.2nd pin
PA_IN series resistances R21 connects simulation ground, and the 5th pin X_FLT series resistances R18 connects simulation ground, the 2nd pin PA_IN series resistances
R15 is connected with the 5th pin X_FLT.23rd pin RIFO of the 6th pin TR connection ZM4101 chips.7th pin ANT_SEL is passed through
Series resistance R23 connects simulation ground, and the 7th pin ANT_SEL is also concatenated the 43rd pin of resistance R29 connection ZM4101 chips
P1.6/KEYPAD.8th pin GND, the 25th pin EPAD connect simulation ground.9th pin LAN_IN is concatenated resistance R25 connections
11 pin RX_FLT.12nd pin ANT2 connections antenna ANT2, the 14th pin TANT1 connections antenna ANT1, the 16th pin TX_IN
It is concatenated capacitance C19 and connects simulation ground, the 20th pin PA_OUT is concatenated capacitance C18 and connects simulation ground.21st pin VCC2, the 22nd pipe
Foot NC7, the 23rd pin VCC0, the 24th pin VCC1 connection power supplys DVDD.
Chip U6 is provided with the 1st pin IN of the 9th pin LAN_IN of connection SE2435L chips, connection SE2435L chips the
The 3rd pin OUT of 11 pin RX_FLT, the 2nd pin GND on connection simulation ground, the 4th pin GND on connection simulation ground.
As shown in figure 24, antenna ANT1 is provided with antenna L5, connector CON2, resistance R13, resistance R14, resistance R16, electricity
Hinder R17, resistance R19, resistance R20, resistance R22, resistance R27, resistance R28, chip U5.Connector CON2 is provided with connection resistance
1st pin of R14 one end is provided with the 4th pin, the 5th pin for connecting inductance L5 both ends respectively, and the 2nd pin connects simulation ground, the
3 pin series resistance R22 are followed by simulation ground.The 14th of SE2435L chips is connected after the other end series resistance R13 of resistance R14
Pin TANT1.One end being connected with connector CON2 of resistance R14 is also connected with connecing the resistance R20 on simulation ground, and resistance R14's is another
One end meets the resistance R19 on simulation ground.The resistance R17 on one end series connection simulation ground that resistance R13 is connected with resistance R14, electricity
Hinder the resistance R16 on the other end series connection simulation ground of R13.
Chip U5 is provided with the 1st pin IN, the 2nd pin GND, the 3rd pin OUT, the 4th pin GND, the 1st pin series electrical
One end that connection resistance R13 is connected with the 14th pin TANT1 of SE2435L chips after resistance R27.3rd pin OUT connection resistance
The other end of R13.2nd pin GND, the 4th pin GND connections simulation ground.
As shown in figure 21, flash memory module include flash chip U1, resistance R2, resistance R3, resistance R5, resistance R6, resistance R7,
Capacitance C4.Flash chip U1 is provided with the 1st pin CS, the 2nd pin SO, the 3rd pin WP, the 4th pin GND, the 5th pin SI, the 6th
Pin SCK, the 7th pin HOLD, the 8th pin VCC.Power supply DVDD is connected after 1st pin CS series resistances R2, the 1st pin CS is also
Connect one end of resistance R5, the 48th pin P2.5/MOSI0 of the other end connection ZM4101 chips of resistance R5.2nd pin is connected
The 51st pin P2.3/MISO1 of ZM4101 chips is connected after resistance R3.The 7th pin HOLD of 3rd pin WP connections, the 3rd pin is also
Series capacitance C4 reconnects simulation ground.4th pin GND connections simulation ground.ZM4101 cores are connected after 5th pin SI series resistances R6
52nd pin P2.2/MOSI1 of piece.The 49th pin P2.4/ of ZM4101 chips is connected after 6th pin SCK series resistances R7
SCK1.8th pin VCC connection power supplys DVDD.
As shown in figure 20, interrupt circuit includes interrupt switch SW1, resistance R1, resistance R4, capacitance C3, and interrupt switch is equipped with
Connect the 1st pin, the 2nd pin, power supply DVDD is connected after the 1st pin series resistance R1, is connected after the first pin also series resistance R4
37th pin P1.1/INT1/KEYPAD of ZM4101 chips, the 2nd pin connect simulation ground, and interrupt switch SW1 is also parallel with capacitance
C3。
The foregoing is only a preferred embodiment of the present invention, but protection scope of the present invention be not limited thereto,
Protection scope of the present invention should be subject to the protection scope in claims.
Claims (8)
1. a kind of door sensor control system for smart home, it is characterised in that：The door sensor control system includes：
Signal acquisition circuit, acquisition door and window opening and closing information, and it is sent to door sensor chip；
Door sensor chip for handling the opening and closing information of signal acquisition circuit, judges door and window opening and closing information, triggers or solve
Except alarm system, door and window opening and closing information by communication module is sent and controls letter for handling the door sensor of communication module reception
Number；
Communication module, for door and window opening and closing information to be sent to z-wave network-based controls host and receives the control of z-wave networks
The door sensor control signal of host processed；
Power module, for signal acquisition circuit, communication module, door sensor chip power supply,
The signal acquisition circuit includes first switch, second switch, third switch,
First switch connects or disconnects for control signal Acquisition Circuit with door sensor chip；
Second switch sends alarm signal for control signal Acquisition Circuit to door sensor chip；
3rd switch sends opening of doors and windows or door and window closure signal for control signal Acquisition Circuit to door sensor chip,
The signal acquisition circuit includes XOR gate integrated circuit, capacitance C10, capacitance C15, capacitance C16, capacitance C17, capacitance
C18, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R11, first switch, second switch, the 3rd
Switch；
The 2nd feet of XOR gate integrated circuit U5, the 7th foot, the 12nd foot, the 13rd foot connect digitally；3rd foot the 4th foot of connection, the 6th
Foot connects the 9th foot；
8th foot connects resistance R5, and the 3rd foot of door sensor chip U1 is connected after connecing the filtering of capacitance C18 digitally；14th foot is through connecing
Capacitance C10 out-put supplies digitally；
First switch one end is grounded, first switch other end connection capacitance C15 one end, resistance R7 one end, one end of resistance R4, electricity
Hold another termination of C15 digitally, the other end of resistance R7 connection power supply, the of the other end connection door sensor chip U1 of resistance R4
1st foot 1A of 10 feet, XOR gate integrated circuit U5；
Second switch one end is grounded, and other end connection capacitance C17 one end, resistance R9 one end, resistance R11 one end, capacitance C17's is another
One end is grounded, the other end connection power supply of resistance R9, the 15th foot, the XOR gate of the other end connection door sensor chip U1 of resistance R11
The 10th foot 3B of integrated circuit U5；
3rd switch one end ground connection, other end connection capacitance C16 one end, resistance R8 one end, resistance R6 one end, capacitance C16's is another
One end is grounded, another termination of resistance R8, resistance R7 one end, resistance R9 one end, power supply, the other end connection door sensor core of resistance R6
The 13rd foot, the 5th foot of XOR gate integrated circuit U5 of piece U1；
The power module 2 be battery J5, battery J5 the 1st foot connection diode anode, diode cathode out-put supply VCC,
The 2nd foot of battery J5 connects digitally.
2. a kind of door sensor control system for smart home according to claim 1, it is characterised in that：Further include alarm
System, host computer, control host, monitoring system, the host computer is by controlling host and alarm system, monitoring system, door sensor
Control system connects.
3. a kind of door sensor control system for smart home according to claim 2, it is characterised in that：The control master
Machine, door sensor control system, monitoring system, alarm system form Z_Wave networks, the control host and institute by communication module
Host computer connection is stated, for the control command of host computer to be sent to monitoring system, door sensor control system, alarm system, is used for
Door sensor control system, alarm system, the working condition of monitoring system are sent to host computer and shown.
4. a kind of door sensor control system for smart home according to claim 3, it is characterised in that：The host computer
It is arranged to smart mobile phone, tablet computer and PC.
5. a kind of a kind of controlling party of door sensor control system for smart home as described in Claims 1-4 any one
Method, it is characterised in that：
Step 1: the door and window collected opening and closing information is sent to door sensor chip by signal acquisition circuit,
Step 2: door sensor chip receive and handle door and window opening and closing information, judge door and window opening and closing information belong to it is normally-open or it is non-just
It is normally open；
Step 3: when door and window opening and closing information belongs to normally-open, door and window is opened and closed information and is sent to control master through communication module
For machine Step 4: when door and window opening and closing information belongs to unnormal unlocking, door sensor chip sends door sensor opening and closing information through communication module
To control host, and open command is sent to monitoring system and alarm system；
Step 5, control host receives door and window opening and closing information, and shows.
6. a kind of control method of door sensor control system for smart home according to claim 5, it is characterised in that：
In the step 2, the door and window opening and closing information that the 3rd switch is sent in signal acquisition circuit is unnormal unlocking.
7. a kind of control method of door sensor control system for smart home according to claim 5, it is characterised in that：
The step 5 further includes：Door and window opening and closing information is sent to control host handheld terminal or PC is shown.
8. a kind of control method of door sensor control system for smart home according to claim 5, it is characterised in that：
In the step 4, after monitoring system starts, the video information of shooting and audio-frequency information are sent to control host storage.
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Cited By (1)
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| CN108428314A (en) * | 2018-03-05 | 2018-08-21 | 深圳市物联微电子有限公司 | A kind of long-range door sensor alarm system of wisdom |
| JP7279302B2 (en) * | 2018-04-06 | 2023-05-23 | 三菱自動車工業株式会社 | vehicle activation system |
| CN112489258A (en) * | 2020-11-30 | 2021-03-12 | 珠海格力电器股份有限公司 | Door lock alarm processing method and device, computer equipment and storage medium |
| CN113053050A (en) * | 2021-03-31 | 2021-06-29 | 湖南茴香智能科技有限公司 | Single door magnetic device |
| CN114137886A (en) * | 2021-12-08 | 2022-03-04 | 杭州涂鸦信息技术有限公司 | Door magnet monitoring circuit, door magnet monitoring device and installation method thereof |
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