CN104811266A - Bit interleaving and de-interleaving methods and corresponding transmitter and receiver - Google Patents

Abstract

The invention discloses bit interleaving and de-interleaving methods and corresponding transmitter and receiver. The interleaving method of the transmitter comprises that LDPC code words to be interleaved are divided into an information portion and a verification portion, the verification portion is divided into a first sub verification bit and a second sub verification bit, and first bit interleaving is carried out on the first sub verification bit and the second sub verification bit to obtain a first bit stream; a first bit stream to be interleaved is divided into multiple subblocks according to the length, and second bit interleaving is carried out by taking the subblock as the unit to obtain a second bit stream; and the second bit stream is divided into a first portion and a second portion, and third bit interleaving is carried out on the first portion and the second portion to obtain a third bit stream. The receiver corresponds to the transmitter, and the de-interleaving method corresponds to the interleaving method. The interleaving and de-interleaving methods in the transmitter and receiver for four LDPS code words and QPSK can be used to improve the system performance.

Description

The transmitter of Bit Interleave, de-interweaving method and correspondence, receiver

Technical field

The present invention relates to the device of a kind of intertexture, de-interweaving method and correspondence, more particularly, relate to the transmitter of a kind of Bit Interleave, de-interweaving method and correspondence, receiver

Background technology

In existing broadcast communication standard, LDPC coding, Bit Interleave and constellation mapping are code modulation modes the most common.In different emission systems, LDPC coding, Bit Interleave and constellation mapping all need independent design, and combined debugging, to obtain best channel performance.Therefore, how forming Bit Interleave targetedly for specific LDPC code word and constellation mapping mode, is a technical barrier of this area.

Summary of the invention

Object of the present invention aims to provide transmitter, the receiver of a kind of Bit Interleave, de-interweaving method and correspondence, solving in prior art has under specific LDPC code word and QPSK mapping, and above-mentioned condition collocation bit felt properties does not reach best problem.

According to above-mentioned purpose, implement a kind of Bit Interleave method for LDPC code of the present invention, comprise the following steps: LDPC code word to be interweaved is divided into message part and check part, and check part is divided into the first sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time Bit Interleave, obtain the first bit stream.Treat that interleaved bitstream is divided into multiple sub-block by certain length by first, and carry out second time Bit Interleave in units of sub-block, obtain the second bit stream.Second bit stream is divided into Part I and Part II, and Part I and Part II is done third time Bit Interleave, obtain the 3rd bit stream.

According to above-mentioned purpose, a kind of transmitter of the present invention of having a try, comprises LDPC encoder, interleaving block and mapping block.Wherein, interleaving block is in order to be divided into message part and check part by LDPC code word to be interweaved, and check part is divided into the first sub-check bit and the second sub-check bit, the first sub-check bit and the second sub-check bit is done respectively first time Bit Interleave, obtain the first bit stream.Treat that interleaved bitstream is divided into multiple sub-block by certain length by first, and carry out second time Bit Interleave in units of sub-block, obtain the second bit stream.Second bit stream is divided into Part I and Part II, and Part I and Part II is done third time Bit Interleave, obtain the 3rd bit stream.

Preferably, the first sub-check bit to be LDPC code table moderate be not 1 bit, the second sub-check bit is LDPC code table moderate is the bit of 1.

Preferably, the first sub-check bit and the second sub-check bit write by row by Bit Interleave for the first time, read by row; The exchange pattern of second time Bit Interleave setting sub-block, according to exchange pattern by sub-block order change; Part I and Part II are written as two equal row by row by Bit Interleave respectively for the third time, then read by row.

Preferably, the code length that LDPC encoder adopts and code check have four kinds of selections, are code check 5/15 respectively, code length 16200; Code check 5/15, code length 64800; Code check 6/15, code length 64800; Code check 7/15, code length 64800.

Preferably, mapping block employing QPSK maps, the bit of every a line reading of each complex symbol Bit Interleave of corresponding third time during QPSK maps.

Preferably, the built-in exchange pattern of interleaving block, for code check 5/15, the LDPC code of code length 16200, described first bit stream is divided into 45 sub-blocks, and described exchange pattern is:

21 27 44 8 19 11 38 43 4 16 28 24 1 37 9 42 41 212 30 26 17 18 39 31 13 32 20 15 3 23 10 35 40 7 22 45 625 34 5 29 14 36 33；

For code check 5/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

123 99 174 32 40 22 175 34 152 92 170 91 146 119112 127 165 35 6 121 160 55 148 396 166 136 68 16 140135 69 115 11 101 54 105 176 30 133 149 45 77 60 113171 147 150 163 74 78 72 62 70 129 107 134 51 33 7 86 103 38100 157 58 76 143 81 172 159 89 42 162 28 128 145164 151 17 131 41 120 47 111 180 98 80 14 156 46 15556 63 144 104 93 117 8 67 84 139 90 97 169 138 8359 106 79 142 5 48 179 177 108 53 29 21 25 52 109 37 6431 49 178 27 110 61 88 50 87 26 43 124 94 161 19 102 44130 15 73 1 125 173 36 116 82 71 23 141 126 137 65 158153 2 132 114 4 18 85 75 24 95 167 154 39 168 13 966 20 57 122 10 12 118；

For code check 6/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

55 130 114 22 75 156 150 158 47 120 6 64 111 10616 31 3 25 103 125 19 98 33 79 148 173 167 53 135119 176 168 73 4 149 58 40 86 62 9 32 52 49 61 29127 30 8 57 138 134 107 84 91 94 38 128 109 151 178180 21 81 69 96 70 139 56 132 43 131 59 88 175 71 108105 65 77 104 124 15 50 68 116 92 97 2 115 45 78 166 121153 136 67 147 117 11 12 20 36 90 154 24 123 159141 60 28 172 87 63 137 170 74 51 89 164 1 93 1742 5 37 85 144 27 35 46 126 157 18 66 163 155 95113 39 142 152 118 100 102 82 129 44 161 41 80122 110 83 133 140 14 76 171 7 101 146 72 34 143145 23 112 162 179 165 10 160 177 13 26 99 169 48174 54；

For code check 7/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

147 76 92 113 150 27 82 101 94 118 59 37 12079 84 17 12 100 83 45 22 89 91 135 13 5 52 72 145109 103 164 133 3 105 39 126 102 166 151161 50 24 23 56 111 70 136 156 177 142 40 14 7 4410 33 68 81 112 29 87 69 167 4 2 159 148 88 11 74 171123 1 58 18 155 90 32 25 170 143 146 20 10473 116 152 95 131 162 173 179 175 127 63169 41 130 108 26 144 129 139 137 96 30 98 140115 165 43 47 34 163 160 53 153 67 65 168 158 60 68 77 119 121 42 54 64 62 36 122 132 106 17297 35 9 80 114 124 57 99 21 46 55 176 125 14938 71 85 19 51 110 48 141 28 107 75 49 180 93174 117 154 86 128 16 138 66 178 157 15 31 61134 78。

According to above-mentioned purpose, implement a kind of bit de-interweaving method being applicable to LDPC code of the present invention, comprise the following steps: the 3rd bit stream is done third time than deinterleave, obtain the second bit stream being divided into Part I and Part II.Second bit stream is carried out in units of sub-block second time than deinterleave, obtain the first bit stream being divided into multiple sub-block.Find out message part and the check part of the first bit stream, and first of check part sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time than deinterleave, obtain the LDPC code word after than deinterleave.

According to above-mentioned purpose, implement a kind of receiver of the present invention, comprise De-mapping module, de-interleaving block and ldpc decoder.Wherein, de-interleaving block, in order to the 3rd bit stream is done third time than deinterleave, obtains the second bit stream being divided into Part I and Part II.Second bit stream is carried out in units of sub-block second time than deinterleave, obtain the first bit stream being divided into multiple sub-block.Find out message part and the check part of the first bit stream, and first of check part sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time than deinterleave, obtain the LDPC code word after than deinterleave.

Preferably, the first sub-check bit to be LDPC code table moderate be not 1 bit, the second sub-check bit is LDPC code table moderate is the bit of 1.

Preferably, the first sub-check bit and the second sub-check bit read in by Bit Interleave by row for the first time, write out by row; Second time Bit Interleave according to sub-block exchange pattern by sub-block inverse transformation order; Part I and Part II read by Bit Interleave respectively by row for the third time, then are written as two equal row by row.

Preferably, the code length that ldpc decoder adopts and code check have four kinds of selections, are code check 5/15 respectively, code length 16200; Code check 5/15, code length 64800; Code check 6/15, code length 64800; Code check 7/15, code length 64800.

Preferably, the built-in exchange pattern of de-interleaving block, for code check 5/15, the LDPC code of code length 16200, described first bit stream is divided into 45 sub-blocks, and described exchange pattern is:

21 27 44 8 19 11 38 43 4 16 28 24 1 37 9 42 41 212 30 26 17 18 39 31 13 32 20 15 3 23 10 35 40 7 22 45 625 34 5 29 14 36 33；

For code check 5/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

123 99 174 32 40 22 175 34 152 92 170 91 146 119112 127 165 35 6 121 160 55 148 3 96 166 136 68 16 140135 69 115 11 101 54 105 176 30 133 149 45 77 60 113171 147 150 163 74 78 72 62 70 129 107 134 51 33 7 86 103 38100 157 58 76 143 81 172 159 89 42 162 28 128 145164 151 17 131 41 120 47 111 180 98 80 14 156 46 15556 63 144 104 93 117 8 67 84 139 90 97 169 138 8359 106 79 142 5 48 179 177 108 53 29 21 25 52 109 37 6431 49 178 27 110 61 88 50 87 26 43 124 94 161 19 102 44130 15 73 1 125 173 36 116 82 71 23 141 126 137 65 158153 2 132 114 4 18 85 75 24 95 167 154 39 168 13 966 20 57 122 10 12 118；

For code check 6/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

55 130 114 22 75 156 150 158 47 120 6 64 111 10616 31 3 25 103 125 19 98 33 79 148 173 167 53 135119 176 168 73 4 149 58 40 86 62 9 32 52 49 61 29127 30 8 57 138 134 107 84 91 94 38 128 109 151 178180 21 81 69 96 70 139 56 132 43 131 59 88 175 71 108105 65 77 104 124 15 50 68 116 92 97 2 115 45 78 166 121153 136 67 147 117 11 12 20 36 90 154 24 123 159141 60 28 172 87 63 137 170 74 51 89 164 1 93 1742 5 37 85 144 27 35 46 126 157 18 66 163 155 95113 39 142 152 118 100 102 82 129 44 161 41 80122 110 83 133 140 14 76 171 7 101 146 72 34 143145 23 112 162 179 165 10 160 177 13 26 99 169 48174 54；

For code check 7/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

147 76 92 113 150 27 82 101 94 118 59 37 12079 84 17 12 100 83 45 22 89 91 135 13 5 52 72 145109 103 164 133 3 105 39 126 102 166 151161 50 24 23 56 111 70 136 156 177 142 40 14 7 4410 33 68 81 112 29 87 69 167 4 2 159 148 88 11 74 171123 1 58 18 155 90 32 25 170 143 146 20 10473 116 152 95 131 162 173 179 175 127 63169 41 130 108 26 144 129 139 137 96 30 98 140115 165 43 47 34 163 160 53 153 67 65 168 158 60 68 77 119 121 42 54 64 62 36 122 132 106 17297 35 9 80 114 124 57 99 21 46 55 176 125 14938 71 85 19 51 110 48 141 28 107 75 49 180 93174 117 154 86 128 16 138 66 178 157 15 31 61134 78。

Have employed technical scheme of the present invention, under the prerequisite that can map at specific 4 LDPC code words and QPSK, by setting intertexture, de-interweaving method targetedly in transmitter, receiver, systematic function better being promoted.

Accompanying drawing explanation

In the present invention, identical Reference numeral represents identical feature all the time, wherein:

Fig. 1 is the functional block diagram of transmitter of the present invention, receiver;

Fig. 2 is the schematic diagram of first time Bit Interleave;

Fig. 3 is the schematic diagram of second time Bit Interleave;

Fig. 4 be 64800 code lengths third time Bit Interleave schematic diagram;

Fig. 5 be 16200 code lengths third time Bit Interleave schematic diagram;

Fig. 6 is the planisphere that QPSK maps.

Embodiment

Technical scheme of the present invention is further illustrated below in conjunction with drawings and Examples.

In any Digital Television Terrestrial Broadcasting transmitting, receiving system, coding, intertexture, mapping (demapping, deinterleaving, decoding) are all treatment steps of core.Transmitter disclosed by the invention, receiver have employed specific LDPC coding/decoding and QPSK constellation mapping/demapping, therefore in order to adapt to above-mentioned specific LDPC coding and QPSK mapping, the present invention devises Bit Interleave, de-interweaving method targetedly, and the transmitter, the receiver that use specific LDPC coding, Bit Interleave and QPSK to map.

As shown in Figure 1, transmitter of the present invention comprises LDPC encoder, interleaving block and mapping block, and receiver then comprises De-mapping module, de-interleaving block and ldpc decoder accordingly.First bit stream after message sink coding is input to the coding that LDPC encoder carries out specific LDPC code word by transmitter.Input bit interleaving block afterwards, carries out interleaving treatment according to Bit Interleave method disclosed by the invention, subsequently the data after Bit Interleave process is carried out QPSK constellation mapping, finally carries out modulating, launching, experience channel.On the other hand, the data after channel are carried out demodulation by receiver, and the data input De-mapping module then after demodulation, carries out QPSK demapping.Afterwards the bit soft value information that De-mapping module exports is input to de-interleaving block and carries out deinterleaving, output to ldpc decoder afterwards, the decoding based on specific LDPC code word is carried out to it, output bit flow of finally decoding.

The Bit Interleave adopted in transmitter, receiver, de-interweaving method are not for all LDPC code words, but for specific LDPC code word, and be applicable to the constellation mapping/demapping of QPSK.Specifically, what transmitter of the present invention adopted is specific LDPC code word, coordinate the interleaving block adopting Bit Interleave method of the present invention, and adopt corresponding QPSK to map, and receiver of the present invention adopts is the demapping of QPSK, coordinate the de-interleaving block adopting bit de-interweaving method of the present invention, and adopt specific LDPC code word.

Therefore, the LDPC code word adopted in the LDPC encoder in transmitter of the present invention, the ldpc decoder in receiver, i.e. above-mentioned " specific LDPC code " totally 4 kinds, respectively as shown in table 1 ~ table 4:

Table 1 code check 5/15, the code table of code length 16200

Table 2 code check 5/15 code length 64800 code table

Table 3 code check 6/15 code length 64800 code table

Table 4 code check 7/15 code length 64800 code table

Above-mentioned specific LDPC code word is obtained by following coding method:

Step S1: the bit stream after message sink coding is split as block of information one by one, each block of information is made up of K information bit, and namely each block of information can be expressed as S=(s ₀, s ₁..., s _k-1).

Step S2: according to multiple block of information S=(s obtained above ₀, s ₁..., s _k-1), generate M ₁+ M ₂individual check bit namely the code word Λ=(λ of N number of bit is obtained ₀, λ ₁..., λ _n-1), wherein N=K+M ₁+ M ₂.In addition, Λ can be expressed as again, wherein, M ₁be the first sub-check bit, represent that LDPC code table moderate is not the bit of 1, M ₂be the second sub-check bit, represent that LDPC code table moderate is the bit of 1, all corresponding one group of M of each above-mentioned LDPC code word ₁and M ₂.

Step S3: initialization λ _i=s _i, i=0,1 ..., K-1.p _j＝0，j＝0,1,...,M ₁+M ₂-1。

Step S4: to information bit λ ₀, add up for the check bit of address to the first row numeral in code table.

Step S5: for remaining L-1 information bit λ _m, m=1,2 ...., L-1, (wherein L represents the length of information bit, usual L=360), adds up with the check bit according to following y being address respectively by each information bit:

$y=\left\{\begin{array}{cc}(x+m\&times;Q_1)\mathrm{mod}{M}_1& \mathrm{ifx}<M_1\\ M_1+\left\{(x-M_1+m\&times;Q_2)\mathrm{mod}{M}_d\right\}& \mathrm{ifx}\&GreaterEqual;M_2\end{array}\right.$

Wherein, x refers to and λ ₀relevant check digit address, and

Step S6: for L information bit λ _l, according to the second line number word address in code table, check bit is added up.Same, for an ensuing L-1 information bit, continue to add up to check bit according to the formula in step S5, the x of the formula at this time in step S5 is the numeral of the second row in code table.

Step S7: in like manner, for 2L, 3L, 4L ... iL ... individual information bit, according in code table respectively the 3rd, 4,5 ..., (i+1) L ... add up to check bit in the address of row, L-1 information bit after its information bit then adds up to check bit according to the formula in step S5 respectively.Now, wait the x of the formula in step S5 corresponding be row in code table corresponding to a current i-th L information bit, L-1 bit after such as the i-th L information bit, the address of x corresponding when formula in its applying step S5 be (i+1) in code table OK.

Step S8: last, after completing steps S7, proceeds as follows: wherein i=1,2 ..., M ₁-1.

Accordingly, the decoder in inventive receiver adopts the interpretation method corresponding with above-mentioned coding method, therefore no longer repeat specification.

With the code check of table 1 for 5/15, code length be 16200 LDPC code code table be example, the accumulation method of step S4 is:

$\begin{array}{c}{p}_{69}=P_{69}{\&CirclePlus;\mathrm{\&lambda;}}_0,p_{244}=p_{244}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{706}=p_{706}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{5145}=p_{5145}\&CirclePlus;{\mathrm{\&lambda;}}_0,\\ p_{5994}=p_{5994}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{6066}=p_{6066}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{6763}=p_{6763}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{6815}=p_{6815}\&CirclePlus;{\mathrm{\&lambda;}}_0\\ p_{8509}=p_{8509}\&CirclePlus;{\mathrm{\&lambda;}}_0.\end{array},,$

in x be the numeral of the first row in code table: 69 244 706 5,145 5,994 6,066 6,763 6,815 8509, and $Q_2=\frac{M_2}{L}=\frac{10080}{360}=28,$ Then have:

$\begin{array}{c}{p}_{71}=P_{71}{\&CirclePlus;\mathrm{\&lambda;}}_0,p_{246}=p_{246}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{708}=p_{708}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{5173}=p_{5173}\&CirclePlus;{\mathrm{\&lambda;}}_0,\\ p_{6022}=p_{6022}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{6094}=p_{6094}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{6791}=p_{6791}\&CirclePlus;{\mathrm{\&lambda;}}_0,p_{6843}=p_{6843}\&CirclePlus;{\mathrm{\&lambda;}}_0\\ p_{8537}=p_{8537}\&CirclePlus;{\mathrm{\&lambda;}}_0.\end{array},,$

The LDPC code word generated through above-mentioned coding method is sent to interleaving block by LDPC encoder, and the LDPC code word that interleaving block receives comprises message part and check part, and check part can be divided into the first sub-check bit M ₁with the second sub-check bit M ₂.Interleaving block is adopted to above-mentioned 4 kinds of methods that LDPC code interweaves as shown in Figure 2.

Step S9: first time Bit Interleave is carried out to the check part of LDPC code word, obtains the first bit stream.

Specifically, the check part of code word M altogether ₁+ M ₂individual bit, the first sub-check bit M ₁individual bit, writes in a memory space by row, often arranges Q ₁individual bit, altogether q row, that is M ₁=Q ₁× q, then sequentially reads by row.Second sub-check bit M ₂individual bit, writes in a memory space by row, often arranges Q2 bit, altogether q row, that is M ₂=Q ₂× q, then sequentially reads by row.By check part after first time Bit Interleave, the whole code word (message part+check part) of reading is the first bit stream.

Step S10: the code word of passing through first time Bit Interleave is divided into continuous print sub-block by 360 bit lengths, then according to a certain specific sequence, carries out second time Bit Interleave, obtain the second bit stream.

As shown in Figure 3, the built-in exchange pattern of interlacing device and de-interlacing device.Second time Bit Interleave converts the order of each 360 length bits sub-block, forms new code word bits.For example, (the m shown in Fig. 3 ₁, m ₂..., m _n/360) be the exchange pattern of each 360 length bits sub-block, it in order to identify each sub-block, and indicates shifting one's position of each sub-block.

For code check 5/15, the LDPC code of code length 16200, the first bit stream is divided into 45 sub-blocks, exchanges pattern to be:

21 27 44 8 19 11 38 43 4 16 28 24 1 37 9 42 41 212 30 26 17 18 39 31 13 32 20 15 3 23 10 35 40 7 22 45 625 34 5 29 14 36 33；

For code check 5/15, the LDPC code of code length 64800, the first bit stream is divided into 180 sub-blocks, exchanges pattern to be:

123 99 174 32 40 22 175 34 152 92 170 91 146 119112 127 165 35 6 121 160 55 148 3 96 166 136 68 16 140135 69 115 11 101 54 105 176 30 133 149 45 77 60 113171 147 15016374 78 72 62 70 129107134 51 33 7 86 103 38100 157 58 76 143 81 172 159 89 42 162 28 128 145164 151 17 131 41 120 47 111 180 98 80 14 156 46 15556 63 144 104 93 117 8 67 84 139 90 97 169 138 8359 106 79 142 5 48 179 177 108 53 29 21 25 52 109 37 6431 49 178 27 110 61 88 50 87 26 43 124 94 161 19 102 44130 15 73 1 125 173 36 116 82 71 23 141 126 137 65 158153 2 132 114 4 18 85 75 24 95 167 154 39 168 13 966 20 57 122 10 12 118；

For code check 6/15, the LDPC code of code length 64800, the first bit stream is divided into 180 sub-blocks, exchanges pattern to be:

55 130 114 22 75 156 150 158 47 120 6 64 111 10616 31 3 25 103 125 19 98 33 79 148 173 167 53 135119 176 168 73 4 149 58 40 86 62 9 32 52 49 61 29127 30 8 57 138 134 107 84 91 94 38 128 109 151 178180 21 81 69 96 70 139 56 132 43 131 59 88 175 71 108105 65 77 104 124 15 50 68 116 92 97 2 115 45 78 166 121153 136 67 147 117 11 12 20 36 90 154 24 123 159141 60 28 172 87 63 137 170 74 51 89 164 1 93 1742 5 37 85 144 27 35 46 126 157 18 66 163 155 95113 39 142 152 118 100 102 82 129 44 161 41 80122 110 83 133 140 14 76 171 7 101 146 72 34 143145 23 112 162 179 165 10 160 177 13 26 99 169 48174 54；

For code check 7/15, the LDPC code of code length 64800, the first bit stream is divided into 180 sub-blocks, exchanges pattern to be:

147 76 92 113 150 27 82 101 94 118 59 37 12079 84 17 12 100 83 45 22 89 91 135 13 5 52 72 145109 103 164 133 3 105 39 126 102 166 151161 50 24 23 56 111 70 136 156 177 142 40 14 7 441 0 33 68 81 112 29 87 69 167 4 2 159 148 88 11 74 171123 1 58 18 155 90 32 25 170 143 146 20 10473 116 152 95 131 162 173 179 175 127 63169 41 130 108 26 144 129 139 137 96 30 98 140115 165 43 47 34 163 160 53 153 67 65 168 158 60 68 77 119 121 42 54 64 62 36 122 132 106 17297 35 9 80 114 124 57 99 21 46 55 176 125 14938 71 85 19 51 110 48 141 28 107 75 49 180 93174 117 154 86 128 16 138 66 178 157 15 31 61134 78。

With above-mentioned code check 5/15, code length 16200 is example, and exchanging pattern by the first bit stream is that length divides sub-block according to 360 bits, mark off 45 sub-blocks altogether, it be 1 that each sub-block is numbered, 2 ..., 45.After order change, the sequence of sub-block is 21,27 ..., 33, namely the sub-block of 21 is numbered after exchanging, be positioned on the position of the 1st sub-block, namely the 21st sub-block of the first bit stream becomes the 1st sub-block of the second bit stream, by that analogy, the complete code that all sub-blocks are formed after exchanging is the second bit stream.The switching method of the exchange pattern of de-mapping device is corresponding with mapper, after no longer repeat specification.

Step S11: the code word that step S10 generates is divided into Part I and Part II, and according to the difference of code length, carry out third time Bit Interleave, obtain the 3rd bit stream.

Specifically, the code length due to above-mentioned LDPC code word has 2 kinds of selections, and namely 16200 and 64800, then interleaving block has different Part I and the dividing mode of Part II for these 2 kinds different code lengths.Interleaving block is write Part I as equal two row by row, then reads by row, using remaining bit as Part II, and is write as two equal row by row, then reads by row, reads result and is the 3rd bit stream.

Specifically, if the code word size of Part I is 64800 bits, then dividing Part I is 64800 bits, and Part II is 0 in this case, and in Part I, each shows 32400 bits.And if the code word size of Part I is 16200 bits, then dividing Part I is 15840 bits, and Part II is 360 bits.Now, each of Part I shows 7920 bits, and each of Part II shows 180 bits.

Interleaving block by through first time, second time and third time Bit Interleave after bit data flow be transferred to mapping block, carry out constellation mapping, the present invention adopts QPSK constellation mapping.As shown in table 5:

Table 5, QPSK mapped mode

Afterwards, mapping block is to the bitstream data (b after above-mentioned Bit Interleave ₀, b ₁..., b _n-1), the planisphere of the QPSK according to Fig. 4, bit mapping is to some constellation point between two, obtain symbol stream, the wherein corresponding constellation point of each complex symbol, and low level (LSB) is formerly, the bit of every a line reading of each complex symbol Bit Interleave of corresponding third time namely in QPSK mapping, two for the first row export bit, and low level is set to b ₀, a high position is set to b ₁, the output of other row by that analogy.And for the De-mapping module of receiver, its de-mapping method is corresponding with mapping method, therefore no longer repeat specification.

Finally, at modulation module, OFDM operation is carried out to symbol stream, add carrier wave and launch.On the other hand, and first the carrier wave received is transferred to base band by receiver, do FFT operation, obtain the symbol stream soft value data of QPSK, be sent to De-mapping module, demapping operation is carried out according to the soft de-mapping method of QPSK, obtain bit soft value data flow, deliver to de-interleaving block, carry out obtaining the bit soft value data flow after deinterleaving than deinterleave to bit soft value data flow according to the inverse operation of above-mentioned Bit Interleave method, send into ldpc decoder, based on given specific code table, LDPC decoded operation is carried out to bit data flow, finally obtain decoded bitstream data.

Especially, the de-interweaving method that the de-interleaving block in receiver adopts is corresponding with above-mentioned deinterleaving method, may be summarized to be following steps:

1st step: the 3rd bit stream is done third time than deinterleave, obtain the second bit stream being divided into Part I and Part II.

2nd step: the second bit stream is carried out in units of sub-block second time than deinterleave, obtain the first bit stream being divided into multiple sub-block.

3rd step: message part and the check part of finding out the first bit stream, and first of check part sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time than deinterleave, obtain the LDPC code word after than deinterleave.

In above-mentioned 3 steps, first sub-check bit and the second sub-check bit read in by Bit Interleave by row for the first time, write out by row, second time Bit Interleave according to sub-block exchange pattern by sub-block inverse transformation order, Part I and Part II read by Bit Interleave respectively by row for the third time, then are written as two equal row by row.Because above-mentioned 3 steps are corresponding with the method for intertexture, therefore its further detail operation no longer repeat specification here.

It will be understood to one skilled in the art that, above specification is only one or more execution modes in the numerous embodiment of the present invention, and not uses limitation of the invention.Any equalization for the above embodiment changes, modification and the equivalent technical scheme such as to substitute, as long as spirit according to the invention, all will drop in scope that claims of the present invention protect.

Claims (22)

1., for a Bit Interleave method for LDPC code, it is characterized in that, comprise the following steps:

LDPC code word to be interweaved is divided into message part and check part, and check part is divided into the first sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time Bit Interleave, obtain the first bit stream;

Treat that interleaved bitstream is divided into multiple sub-block by certain length by described first, and carry out second time Bit Interleave in units of described sub-block, obtain the second bit stream;

Described second bit stream is divided into Part I and Part II, and described Part I and Part II is done third time Bit Interleave, obtain the 3rd bit stream.

2., as claimed in claim 1 for the Bit Interleave method of LDPC code, it is characterized in that, described first sub-check bit to be LDPC code table moderate be not 1 bit, the second sub-check bit is LDPC code table moderate is the bit of 1.

3. as claimed in claim 1 for the Bit Interleave method of LDPC code, it is characterized in that, described first time, Bit Interleave was by the first sub-check bit and the second sub-check bit by row write, read by row; The exchange pattern of described second time Bit Interleave setting sub-block, according to described exchange pattern by described sub-block order change; Described third time, Part I and Part II be written as two equal row by row by Bit Interleave respectively, then read by row.

4. as claimed in claim 1 for the Bit Interleave method of LDPC code, it is characterized in that, code length and the code check of the LDPC coding that described Bit Interleave method is suitable for have four kinds of selections, are code check 5/15 respectively, code length 16200; Code check 5/15, code length 64800; Code check 6/15, code length 64800; Code check 7/15, code length 64800.

5. as claimed in claim 3 for the Bit Interleave method of LDPC code, it is characterized in that, every a line bit of described third time Bit Interleave reading is carried out QPSK mapping.

6., as claimed in claim 4 for the Bit Interleave method of LDPC code, it is characterized in that:

For code check 5/15, the LDPC code of code length 16200, described first bit stream is divided into 45 sub-blocks, and described exchange pattern is:

21 27 44 8 19 11 38 43 4 16 28 24 1 37 9 42 41 212 30 26 17 18 39 31 13 32 20 15 3 23 10 35 40 7 22 45 625 34 5 29 14 36 33；

For code check 5/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

123 99 174 32 40 22 175 34 152 92 17091 146119112 127 165 35 6 121 160 55 1483 96 166 136 68 16 140135 69 115 11 101 54 105 176 30 133 149 45 77 60 113171 147 150 163 74 78 72 62 70 129 107 134 51 33 7 86 103 38100 157 58 76 143 81 172 159 89 42 162 28 128 145164 151 17 131 41 120 47 111 180 98 80 14 156 46 15556 63 144 104 93 117 8 67 84 139 90 97 169 138 8359 106 79 142 5 48 179 177 108 53 29 21 25 52 109 37 6431 49 178 27 110 61 88 50 87 26 43 124 94 161 19 102 44130 15 73 1 125 173 36 116 82 71 23 141 126 137 65 158153 2 132 114 4 18 85 75 24 95 167 154 39 168 13 966 20 57 122 10 12 118；

For code check 6/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

55 130 114 22 75 156 150 158 47 120 6 64 111 10616 31 3 25 103 125 19 98 33 79 148 173 167 53 135119 176 168 73 4 149 58 40 86 62 9 32 52 49 61 29127 30 8 57 138 134 107 84 91 94 38 128 109 151 178180 21 81 69 96 70 139 56 132 43 131 59 88 175 71 108105 65 77 104 124 15 50 68 116 92 97 2 115 45 78 166 121153 136 67 147 117 11 12 20 36 90 154 24 123 159141 60 28 172 87 63 137 170 74 51 89 164 1 93 1742 5 37 85 144 27 35 46 126 157 18 66 163 155 95113 39 142 152 118 100 102 82 129 44 161 41 80122 110 83 133 140 14 76 171 7 101 146 72 34 143145 23 112 162 179 165 10 160 177 13 26 99 169 48174 54；

For code check 7/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

147 76 92 113 150 27 82 101 94 118 59 37 12079 84 17 12 100 83 45 22 89 91 135 13 5 52 72 145109 103 164 133 3 105 39 126 102 166 151161 50 24 23 56 111 70 136 156 177 142 40 14 7 4410 33 68 81 112 29 87 69 167 4 2 159 148 88 11 74 171123 1 58 18 155 90 32 25 170 143 146 20 10473 116 152 95 131 162 173 179 175 127 63169 41 130 108 26 144 129 139 137 96 30 98 140115 165 43 47 34 163 160 53 153 67 65 168 158 60 68 77 119 121 42 54 64 62 36 122 132 106 17297 35 9 80 114 124 57 99 21 46 55 176 125 14938 71 85 19 51 110 48 141 28 107 75 49 180 93174 117 154 86 128 16 138 66 178 157 15 31 61134 78。

7. be applicable to a bit de-interweaving method for LDPC code, it is characterized in that, comprise the following steps:

3rd bit stream is done third time than deinterleave, obtain the second bit stream being divided into Part I and Part II;

Described second bit stream is carried out in units of sub-block second time than deinterleave, obtain the first bit stream being divided into multiple sub-block;

Find out message part and the check part of described first bit stream, and first of check part sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time than deinterleave, obtain the LDPC code word after than deinterleave.

8. be applicable to the bit de-interweaving method of LDPC code as claimed in claim 7, it is characterized in that, described first sub-check bit to be LDPC code table moderate be not 1 bit, the second sub-check bit is LDPC code table moderate is the bit of 1.

9. be applicable to the bit de-interweaving method of LDPC code as claimed in claim 7, it is characterized in that, described first time Bit Interleave the first sub-check bit and the second sub-check bit are read in by row, write out by row; Described second time Bit Interleave according to the exchange pattern of sub-block by described sub-block inverse transformation order; Described third time, Part I and Part II read by Bit Interleave respectively by row, then be written as two equal row by row.

10. be applicable to the bit de-interweaving method of LDPC code as claimed in claim 7, it is characterized in that, the code length of the LDPC decoding that described bit de-interweaving method is suitable for and code check have four kinds of selections, are code check 5/15 respectively, code length 16200; Code check 5/15, code length 64800; Code check 6/15, code length 64800; Code check 7/15, code length 64800.

The 11. bit de-interweaving methods being applicable to LDPC code as claimed in claim 9, is characterized in that:

For code check 5/15, the LDPC code of code length 16200, described first bit stream is divided into 45 sub-blocks, and described exchange pattern is:

21 27 44 8 19 11 38 43 4 16 28 24 1 37 9 42 41 212 30 26 17 18 39 31 13 32 20 15 3 23 10 35 40 7 22 45 625 34 5 29 14 36 33；

For code check 5/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

123 99 174 32 40 22 175 34 152 92 170 91 146 119112 127 165 35 6 121 160 55 148 3 96 166 136 68 16 140135 69 115 11 101 54 105 176 30 133 149 45 77 60 113171 147 150 163 74 78 72 62 70 129 107 134 51 33 7 86 103 38100 157 58 76 143 81 172 159 89 42 162 28 128 145164 151 17 131 41 120 47 111 180 98 80 14 156 46 15556 63 144 104 93 117 8 67 84 139 90 97 169 138 8359 106 79 142 5 48 179 177 108 53 29 21 25 52 109 37 6431 49 178 27 110 61 88 50 87 26 43 124 94 161 19 102 44130 15 73 1 125 173 36 116 82 71 23 141 126 137 65 158153 2 132 114 4 18 85 75 24 95 167 154 39 168 13 966 20 57 122 10 12 118；

For code check 6/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

55 130 114 22 75 156 150 158 47 120 6 64 111 10616 31 3 25 103 125 19 98 33 79 148 173 167 53 135119 176 168 73 4 149 58 40 86 62 9 32 52 49 61 29127 30 8 57 138 134 107 84 91 94 38 128 109 151 178180 21 81 69 96 70 139 56 132 43 131 59 88 175 71 108105 65 77 104 124 15 50 68 116 92 97 2 115 45 78 166 121153 136 67 147 117 11 12 20 36 90 154 24 123 159141 60 28 172 87 63 137 170 74 51 89 164 1 93 1742 5 37 85 144 27 35 46 126 157 18 66 163 155 95113 39 142 152 118 100 102 82 129 44 161 41 80122 110 83 133 140 14 76 171 7 101 146 72 34 143145 23 112 162 179 165 10 160 177 13 26 99 169 48174 54；

For code check 7/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

147 76 92 113 150 27 82 101 94 118 59 37 12079 84 17 12 100 83 45 22 89 91 135 13 5 52 72 145109 103 164 133 3 105 39 126 102 166 151161 50 24 23 56 111 70 136 156 177 142 40 14 7 4410 33 68 81 112 29 87 69 167 4 2 159 148 88 11 74 171123 1 58 18 155 90 32 25 170 143 146 20 10473 116 152 95 131 162 173 179 175 127 63169 41 130 108 26 144 129 139 137 96 30 98 140115 165 43 47 34 163 160 53 153 67 65 168 158 60 68 77 119 121 42 54 64 62 36 122 132 106 17297 35 9 80 114 124 57 99 21 46 55 176 125 14938 71 85 19 51 110 48 141 28 107 75 49 180 93174 117 154 86 128 16 138 66 178 157 15 31 61134 78。

12. 1 kinds of transmitters, comprise LDPC encoder, interleaving block and mapping block, it is characterized in that:

Described interleaving block is in order to be divided into message part and check part by LDPC code word to be interweaved, and check part is divided into the first sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time Bit Interleave, obtain the first bit stream;

Treat that interleaved bitstream is divided into multiple sub-block by certain length by described first, and carry out second time Bit Interleave in units of described sub-block, obtain the second bit stream;

Described second bit stream is divided into Part I and Part II, and described Part I and Part II is done third time Bit Interleave, obtain the 3rd bit stream.

13. transmitters as claimed in claim 12, is characterized in that, described first sub-check bit to be LDPC code table moderate be not 1 bit, the second sub-check bit is LDPC code table moderate is the bit of 1.

14. transmitters as claimed in claim 12, is characterized in that, described first time, Bit Interleave was by the first sub-check bit and the second sub-check bit by row write, read by row; The exchange pattern of described second time Bit Interleave setting sub-block, according to described exchange pattern by described sub-block order change; Described third time, Part I and Part II be written as two equal row by row by Bit Interleave respectively, then read by row.

15. transmitters as claimed in claim 12, is characterized in that, the code length that described LDPC encoder adopts and code check have four kinds of selections, are code check 5/15 respectively, code length 16200; Code check 5/15, code length 64800; Code check 6/15, code length 64800; Code check 7/15, code length 64800.

16. transmitters as claimed in claim 14, is characterized in that, described mapping block adopts QPSK to map, the bit of every a line reading of each complex symbol Bit Interleave of corresponding described third time during QPSK maps.

17. transmitters as claimed in claim 14, is characterized in that, the built-in exchange pattern of described interleaving block:

For code check 5/15, the LDPC code of code length 16200, described first bit stream is divided into 45 sub-blocks, and described exchange pattern is:

21 27 44 8 19 11 38 43 4 16 28 24 1 37 9 42 41 212 30 26 17 18 39 31 13 32 20 15 3 23 10 35 40 7 22 45 625 34 5 29 14 36 33；

For code check 5/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

123 99 174 32 40 22 175 34 152 92 170 91 146 119112 127 165 35 6 121 160 55 148 3 96 166 136 68 16 140135 69 115 11 101 54 105 176 30 133 149 45 77 60 113171 147 150 163 74 78 72 62 70 129 107 134 51 33 7 86 103 38100 157 58 76 143 81 172 159 89 42 162 28 128 145164 151 17 131 41 120 47 111 180 98 80 14 156 46 15556 63 144 104 93 117 8 67 84 139 90 97 169 138 8359 106 79 142 5 48 179 177 108 53 29 21 25 52 109 37 6431 49 178 27 110 61 88 50 87 26 43 124 94 161 19 102 44130 15 73 1 125 173 36 116 82 71 23 141 126 137 65 158153 2 132 114 4 18 85 75 24 95 167 154 39 168 13 966 20 57 122 10 12 118；

For code check 6/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

55 130 114 22 75 156 150 158 47 120 6 64 111 10616 31 3 25 103 125 19 98 33 79 148 173 167 53 135119 176 168 73 4 149 58 40 86 62 9 32 52 49 61 29127 30 8 57 138 134 107 84 91 94 38 128 109 151 178180 21 81 69 96 70 139 56 132 43 131 59 88 175 71 108105 65 77 104 124 15 50 68 116 92 97 2 115 45 78 166 121153 136 67 147 117 11 12 20 36 90 154 24 123 159141 60 28 172 87 63 137 170 74 51 89 164 1 93 1742 5 37 85 144 27 35 46 126 157 18 66 163 155 95113 39 142 152 118 100 102 82 129 44 161 41 80122 110 83 133 140 14 76 171 7 101 146 72 34 143145 23 112 162 179 165 10 160 177 13 26 99 169 48174 54；

For code check 7/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

147 76 92 113 150 27 82 101 94 118 59 37 12079 84 17 12 100 83 45 22 89 91 135 13 5 52 72 145109 103 164 133 3 105 39 126 102 166 151161 50 24 23 56 111 70 136 156 177 142 40 14 7 4410 33 68 81 112 29 87 69 167 4 2 159 148 88 11 74 171123 1 58 18 155 90 32 25 170 143 146 20 10473 116 152 95 131 162 173 179 175 127 63169 41 130 108 26 144 129 139 137 96 30 98 140115 165 43 47 34 163 160 53 153 67 65 168 158 60 68 77 119 121 42 54 64 62 36 122 132 106 17297 35 9 80 114 124 57 99 21 465 5 176 125 14938 71 85 19 51 110 48 141 28 107 75 49 180 93174 117 154 86 128 16 138 66 178 157 15 31 61134 78。

18. 1 kinds of receivers, comprise De-mapping module, de-interleaving block and ldpc decoder, it is characterized in that:

Described de-interleaving block, in order to the 3rd bit stream is done third time than deinterleave, obtains the second bit stream being divided into Part I and Part II;

Described second bit stream is carried out in units of sub-block second time than deinterleave, obtain the first bit stream being divided into multiple sub-block;

Find out message part and the check part of described first bit stream, and first of check part sub-check bit and the second sub-check bit, first sub-check bit and the second sub-check bit are done respectively first time than deinterleave, obtain the LDPC code word after than deinterleave.

19. receivers as claimed in claim 18, is characterized in that, described first sub-check bit to be LDPC code table moderate be not 1 bit, the second sub-check bit is LDPC code table moderate is the bit of 1.

20. receivers as claimed in claim 18, is characterized in that, described first time Bit Interleave the first sub-check bit and the second sub-check bit are read in by row, write out by row; Described second time Bit Interleave according to the exchange pattern of sub-block by described sub-block inverse transformation order; Described third time, Part I and Part II read by Bit Interleave respectively by row, then be written as two equal row by row.

21. receivers as claimed in claim 18, is characterized in that, the code length that described ldpc decoder adopts and code check have four kinds of selections, are code check 5/15 respectively, code length 16200; Code check 5/15, code length 64800; Code check 6/15, code length 64800; Code check 7/15, code length 64800.

22. receivers as claimed in claim 20, is characterized in that, the built-in exchange pattern of described de-interleaving block:

For code check 5/15, the LDPC code of code length 16200, described first bit stream is divided into 45 sub-blocks, and described exchange pattern is:

21 27 44 8 19 11 38 43 4 16 28 24 1 37 9 42 41 212 30 26 17 18 39 31 13 32 20 15 3 23 10 35 40 7 22 45 625 34 5 29 14 36 33；

For code check 5/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

123 99 174 32 40 22 175 34 152 92 170 91 146 119112 127 165 35 6 121 160 55 148 3 96 166 136 68 16 140135 69 115 11 101 54 105 176 30 133 149 45 77 60 113171 147 150 163 74 78 72 62 70 129 107 134 51 33 7 86 103 38100 157 58 76 143 81 172 159 89 42 162 28 128 145164 151 17 131 41 120 47 111 180 98 80 14 156 46 15556 63 144 104 93 117 8 67 84 139 90 97 169 138 8359 106 79 142 5 48 179 177 108 53 29 21 25 52 109 37 6431 49 17827 110 61 88 50 87 26 43 124 94 161 19 102 44130 15 73 1 125 173 36 116 82 71 23 141 126 137 65 158153 2 132 114 4 18 85 75 24 95 167 154 39 168 13 966 20 57 122 10 12 118；

For code check 6/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

55 130 114 2275 156 150 158 47120 6 64 111 10616 31 3 25 103 125 19 98 33 79 148 173 167 53 135119 176 168 734 149 58 40 86 62 932 52 49 61 29127 30 8 57 138 134 107 84 91 94 38 128 109 151 178180 21 81 69 96 70 139 56 132 43 131 59 88 175 71 108105 65 77 104 124 15 50 68 116 92 97 2 115 45 78 166 121153 136 67 147 117 11 12 20 36 90 154 24 123 159141 60 28 172 87 63 137 170 74 51 89 164 1 93 1742 5 37 85 144 27 35 46 126 157 18 66 163 155 95113 39 142 152 118 100 102 82 129 44 161 41 80122 110 83 133 140 14 76 171 7 101 146 72 34 143145 23 112 162 179 165 10 160 177 13 26 99 169 48174 54；

For code check 7/15, the LDPC code of code length 64800, described first bit stream is divided into 180 sub-blocks, and described exchange pattern is:

147 76 92 113 150 27 82 101 94 118 59 37 12079 84 17 12 100 83 45 22 89 91 135 13 5 52 72 145109 103 164 133 3 105 39 126 102 166 151161 50 24 23 56 111 70 136 156 177 142 40 14 7 4410 33 68 81 112 29 87 69 167 4 2 159 148 88 11 74 171123 1 58 18 155 90 32 25 170 143 146 20 10473 116 152 95 131 162 173 179 175 127 63169 41 130 108 26 144 129 139 137 96 30 98 140115 165 43 47 34 163 160 53 153 67 65 168 158 60 68 77 119 121 42 54 64 62 36 122 132 106 17297 35 9 80 114 124 57 99 21 46 55 176 125 14938 71 85 19 51 110 48 141 28 107 75 49 180 93174 117 154 86 128 16 138 66 178 157 15 31 61134 78。