CN104796021B - The space vector modulation implementation method that a kind of digital-to-analogue is combined - Google Patents
The space vector modulation implementation method that a kind of digital-to-analogue is combined Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
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Abstract
The present invention relates to Electrified Transmission and control technology field, it will be specifically a kind of space vector modulation (SVPWM) implementation method of digital-to-analogue combination, concretely comprise the following steps：A, decision instruction space vector sector；B, the action time for calculating Conventional spatial vector；C, the switching time for calculating every phase pulse；D, according to hardware carrier characteristics, calculate previous step obtained switching time waveform and carry out output and adjust, be then output to hardware plate, relatively realize that PWM is generated by carrier wave ratio.The advantage of the invention is that：A, realized based on common digital controller and conventional hardware carrier modulation plate, it is not necessary to the good digital processor of associated hardware resource is generated with PWM, cost is reduced；B, the present invention are easy to the algorithm of current some electrical power electronic converter control system to upgrade, and reduce upgrade cost, shorten upgrade cycle.
Description
Technical field
To be specifically a kind of space vector modulation of digital-to-analogue combination the present invention relates to power electronics and power drives field
(SVPWM) implementation method.
Background technology
In power electronics and Electric Drive field, frequently with pulse width modulation (pulse width modulation,
PWM) come the command voltage needed for obtaining.By the development of decades, it has been developed that a variety of PWM modulation technologies, and
Application of the development and microprocessor of power electronic devices in converters control more PWM technologies provide wide
Research and clearing.The different performance indications of different PWM modulation technology correspondences, wherein three more crucial indexs
For：Harmonic wave of output voltage distribution, the switching loss of switching device and DC tache voltage utilization rate.
Space vector pulse width modulation technology (space vector pulse width modulation, SVPWM) is most
It is just the occasion proposition in AC Drive, it is the angle from alternating current generator, to control alternating current generator flux linkage space vector
It is modulation purpose that track, which is approached circular, in the hope of reducing the torque pulse of motor, improves runnability.Due to its high dc bus electricity
Press utilization rate, the advantages of harmonic wave is small, be also widely used in other converters application fields.
In current engineering practice and academic documents, for convenience the discrete vector space in SVPWM algorithms judge and
Pwm pulse is generated, and big more options have digital signal processor (the digital signal of special digital circuit resource
Processor, DSP) or High Performance SCM in realize, representational patent and paper be as follows：
Number of patent application is 200810106047.0, applying date 2008-5-7, a kind of entitled " space vector modulation side
The patent of invention of method ", it is proposed that simplified SVPWM algorithms, by the method for computed correction, obtains the value of comparand register,
Amount of calculation has obtained a certain degree of simplification, but afterbody still needs specialized digital circuit resource to realize.
Number of patent application is 200810025527.4, applying date 2008-4-29, the entitled " space vector based on FPGA
The patent of invention of pulse duration modulation method ", is calculated after obtaining vector effective acting time by traditional algorithm, utilizes the hard of FPGA
Part resource is realized.
It is published in the 1st phases of volume 36 in 2002《Power Electronic Technique》Periodical " using C504 realize space vector modulation and
Ovennodulation " paper and it is published in the 1st phases of volume 5 in 2001《Electric Machines and Control》" adjusted using chip microcontroller space vector
Algorithm processed " is all to realize that PWM is generated using the CCU special hardware circuits in C504 single-chip microcomputers.
In addition, many converters of actual motion use digitial controller (PLC or self-control control at present
Plate) and the control framework that combines of rear class analog circuit board, wherein digitial controller is responsible for master control and closed loop control algorithm, generates phase
The modulating wave instruction answered, is then sent to hardware simulation circuit realiration Sinusoidal Pulse Width Modulation (sine pulse width
modulation,SPWM).In order to obtain higher DC tache voltage utilization rate, these converters control algolithms
During upgrading, it is necessary to solve SPWM modulate to SVPWM change the problem of.Because existing control platform does not possess a lot
Special PWM generation hardware resources, cause current achievement in research not apply directly, so as to need to develop again with high property
The control platform of energy controller, or the new circuit board piece of increase realize SVPWM, certainly will cause cost increase, upgrading week
The problems such as phase is elongated.
The content of the invention
In order to overcome dependence of the current SVPWM realization to high-performance special digital platform, existing power electronics is facilitated to become
The overall upgrading of transformer system, specifically now proposes the SVPWM implementation methods that a kind of digital-to-analog circuit is combined.
Technical scheme is as follows：
A kind of implementation method for the space vector modulation that digital-to-analogue is combined, it is characterised in that：It is complete using conventional Common Controller
Judge into sector in SVPWM algorithms, vector action time calculates and switching time is calculated, special according to the carrier wave of rear class hardware circuit
Property complete output adjust, the generation of pwm pulse is realized eventually through rear class hardware circuit.
Concretely comprise the following steps：
1) decision instruction space vector of voltage UOUTSector number N.
The command voltage space vector UOUTIt is that responsive load disturbance and instruction change for converters, according to
The instruction controlled quentity controlled variable that the real-time parameter closed loop regulation of system is obtained.
The sector number N refers to any voltage space vector in the band of position of space plane, according to space vector of voltage with
Angle theta between rest frame α axles, is divided into following six sector by space voltage vector：
Ith area：θ=0~π/3
IIth area：π/3 of θ=π/3~2
III areas：π/3 of θ=2~π
IV areas：π/3 of θ=π~4
V areas：π/3 of π/3 of θ=4~5
VI areas：The π of π/3 of θ=5~2
, can be according to U to simplify amount of calculationOUTRest frame α, β component Uα、UβTo judge sector.Specially：
Variate-value x, y, z is calculated by formula (1),
Then substitute into formula (2) and calculate variable N ' values,
N '=4sign (z)+2sign (y)+sign (x) (2)
In above formula, sign (x) is sign function, is defined as：X ＞ 0, sign (x)=1；X ＜ 0, sign (x)=0；Root again
Sector number N is determined according to the corresponding relation of table 1.
The sector mapping table of table 1
| N′ | 1 | 2 | 3 | 4 | 5 | 6 |
| Sector N | II | VI | I | IV | III | V |
2) vector action time t is calculatedX、tY、t0
The vector action time refers to the mode acted on the timesharing of fundamental voltage space vector come equivalent synthetic instruction electricity
Press space vector, the action time needed for each fundamental space vector.
To simplify calculating, defined variable X, Y, Z, order
Wherein, TPWMFor SVPWM modulation period, UdcFor DC bus-bar voltage.
According to command voltage space vector UOUTSector number N, the action time t of non-zero fundamental voltage space vectorX、tYPress
Table 2 is chosen.
The t of table 2X、tYAssignment table
| Sector N | I | II | III | IV | V | VI |
| tX | -Z | Z | X | -X | -Y | Y |
| tY | X | Y | -Y | Z | -Z | -X |
Linear modulation scope, the action time t of zero voltage space vector0For：
t0=TPWM-tX-tY (4)
If there is ovennodulation, i.e. (TPWM＜ tX+tY), then following processing is carried out,
3) switching point or switching time t of comparator are calculatedcm1、tcm2、tcm3
The switching point or switching time of the comparator are follow-up PWM generations, the process variable of definition for convenience.
For all sector N, definition：
According to sector number N, the corresponding switch time t of A, B, C three-phasecm1、tcm2、tcm3Chosen by table 3.
The switching time t of table 3cmx(x=1,2,3) chooses table
| Sector N | I | II | III | IV | V | VI |
| tcm1 | ta | tb | tc | tc | tb | ta |
| tcm2 | tb | ta | ta | tb | tc | tc |
| tcm3 | tc | tc | tb | ta | ta | tb |
4) analog circuit realizes that PWM is generated.
First three step is completed using common digitial controller to calculate, then according to hardware carrier characteristics, by switching time ripple
Progress is special to adjust processing, then is output to rear class hardware carrier wave comparison circuit, completes final PWM generation, concretely comprises the following steps：
Defining tuning coefficient K is：
K=2VpeakfPWM (7)
In above formula, VpeakFor the peak-to-peak value of hardware circuit carrier wave, fPWMFor the frequency of hardware circuit carrier wave.
It is handled as follows according to the polarity of hardware circuit carrier wave：
1) unipolarity carrier wave
2) bipolarity carrier wave
Processing obtains new modulating wave t according to the method described abovecm1 *、tcm2 *、tcm3 *, rear class is then output to by analog channel
Hardware circuit, is that SVPWM algorithms can be achieved compared with by way of carrier wave ratio.
The advantage of the invention is that：
1st, the present invention modulates plate based on common digital controller and conventional analog carrier, it is not necessary to PWM generations
The high-performance special digital processor of function, reduces cost.
2nd, the present invention is easy to the Technics of Power Electronic Conversion using digitial controller plus rear class analog circuit carrier modulation type structure
The algorithm upgrading of device system, reduces upgrade cost, shortens upgrade cycle.
Brief description of the drawings
Fig. 1 is the converters control system block diagram of the embodiment of the present invention.
Fig. 2 is the converters structured flowchart of the embodiment of the present invention.
Fig. 3 is typical space voltage vector sector division figure.
Fig. 4 is the equivalent synthesis schematic diagram of typical space voltage vector.
Fig. 5 is the switch time ripple t of one embodiment of the present of inventioncm1、tcm2、tcm3。
Fig. 6 is the bipolar modulation ripple t of one embodiment of the present of inventioncm1 *、tcm2 *、tcm3 *。
Fig. 7 is single modulation mechanism modulation period comparison schematic diagram of the invention.
Embodiment
The present invention is further described with reference to the accompanying drawings and examples：
Embodiment 1
The space vector modulation implementation method that a kind of digital-to-analogue is combined is completed in SVPWM algorithms using common digital controller
Sector judges, vector action time calculates and switching time is calculated, and completes output according to the carrier characteristics of rear class hardware circuit
Adjust, the generation of pwm pulse is realized eventually through rear class analog circuit.
Concretely comprise the following steps：
The first step, decision instruction space vector UOUTSector N；
Second step, calculates conventional vector action time tX、tYAnd zero vector action time t0；
t0It is not belonging to conventional vector, but zero vector.
3rd step, calculates the switching point or switching time waveform t per phase pulsecm1、tcm2、tcm3；
4th step, the switching time waveform that the 3rd step is obtained is exported with reference to the carrier characteristics of rear class hardware circuit
Adjust and obtain new modulating wave tcm1 *、tcm2 *、tcm3 *, the corresponding logical of hardware circuit is then output to by analog output channel
Road, is compared with carrier wave, obtains pwm pulse signal.
The present invention modulates plate based on common digital controller and conventional analog carrier, it is not necessary to generate work(with PWM
The high-performance special digital processor of energy, reduces cost.It is easy to use digitial controller plus rear class analog circuit carrier modulation
The algorithm upgrading of the converters system of type structure, reduces upgrade cost, shortens upgrade cycle.
Embodiment 2
A kind of implementation method for the space vector modulation that digital-to-analogue is combined, SVPWM algorithms are completed using conventional Common Controller
Middle sector judges, vector action time calculates and switching time is calculated, and is completed to export according to the carrier characteristics of rear class hardware circuit
Adjust, the generation of pwm pulse is realized eventually through rear class hardware circuit.
Concretely comprise the following steps：
1) decision instruction space vector of voltage UOUTSector number N.
The command voltage space vector UOUTIt is that responsive load disturbance and instruction change for converters, according to
The instruction controlled quentity controlled variable that the real-time parameter closed loop regulation of system is obtained.
The sector number N refers to any voltage space vector in the band of position of space plane, according to space vector of voltage with
Angle theta between rest frame α axles, is divided into following six sector by space voltage vector：
I areas：θ=0~π/3
II areas：π/3 of θ=π/3~2
III areas：π/3 of θ=2~π
IV areas：π/3 of θ=π~4
V areas：π/3 of π/3 of θ=4~5
VI areas：The π of π/3 of θ=5~2
, can be according to U to simplify amount of calculationOUTRest frame α, β component Uα、UβTo judge sector.Specially：
Variate-value x, v, z are calculated by formula (1),
Then substitute into formula (2) and calculate variable N ' values,
N '=4sign (z)+2sign (y)+sign (x) (2)
In above formula, sign (x) is sign function, is defined as：X ＞ 0, sign (x)=1；X ＜ 0, sign (x)=0；Root again
Sector number N is determined according to the corresponding relation of table 1.
The sector mapping table of table 1
| N′ | 1 | 2 | 3 | 4 | 5 | 6 |
| Sector N | II | VI | I | IV | III | V |
2) vector action time t is calculatedX、tY、t0
The vector action time refers to the mode acted on the timesharing of fundamental voltage space vector come equivalent synthetic instruction electricity
Press space vector, the action time needed for each fundamental space vector.Zero vector action time t0
To simplify calculating, defined variable X, Y, Z, order
Wherein, TPWMFor SVPWM modulation period, UdcFor DC bus-bar voltage.
According to command voltage space vector UOUTSector number N, the action time t of non-zero fundamental voltage space vectorX、tYPress
Table 2 is chosen.
The t of table 2X、tYAssignment table
| Sector N | I | II | III | IV | V | VI |
| tx | -Z | Z | X | -X | -Y | Y |
| tY | X | Y | -Y | Z | -Z | -X |
Linear modulation scope, the action time t of zero voltage space vector0For：
t0=TPWM-tX-tY (4)
If there is ovennodulation, i.e. (TPWM＜ tX+tY), then following processing is carried out,
3) switching point or switching time t of comparator are calculatedcm1、tcm2、tcm3
The switching point or switching time of the comparator are follow-up PWM generations, the process variable of definition for convenience.
For all sector N, definition：
According to sector number N, the corresponding switch time t of A, B, C three-phasecm1、tcm2、tcm3Chosen by table 3.
The switching time t of table 3cmx(x=1,2,3) chooses table
| Sector N | I | II | III | IV | V | VI |
| tcm1 | ta | tb | tc | tc | tb | ta |
| tcm2 | tb | ta | ta | tb | tc | ta |
| tcm3 | tc | tc | tb | ta | ta | tb |
4) analog circuit realizes that PWM is generated.
First three step is completed using common digitial controller to calculate, then according to hardware carrier characteristics, by switching time ripple
Progress is special to adjust processing, then is output to rear class hardware carrier wave comparison circuit, completes final PWM generation, concretely comprises the following steps：
Defining tuning coefficient K is：
K=2VpeakfPWM (7)
In above formula, VpeakFor the peak-to-peak value of hardware circuit carrier wave, fPWMFor the frequency of hardware circuit carrier wave.
It is handled as follows according to the polarity of hardware circuit carrier wave：
1) unipolarity carrier wave
2) bipolarity carrier wave
Processing obtains new modulating wave t according to the method described abovecm1 *、tcm2 *、tcm3 *, rear class is then output to by analog channel
Hardware circuit, is that SVPWM algorithms can be achieved compared with by way of carrier wave ratio.
Fig. 1 is typical converters control system block diagram, and wherein digital control platform is responsible for master control and closed loop
Control algolithm, generates corresponding modulating wave instruction；Analog circuit board is responsible for signal acquisition process and carrier modulation, generates PWM arteries and veins
Rush signal；Executing agency is converters, and typical structure is as shown in Figure 2.Wherein system carrier modulation, which is used, is
SPWM modulation systems, analog carrier be ± 10V, 2.5kHz bipolar signal, as shown.Under this kind of modulating mode, AC
Obtainable maximum fundamental wave phase voltage peak value is 0.5Udc.To improve system dc link voltage utilization rate, improve system operation
Can, SVPWM modulation systems can be used., can be according to as follows because the digital control platform does not possess dedicated PWM generation hardware resource
Step realizes that modulation algorithm is upgraded：
1) sector of decision instruction space voltage vector
Digitial controller can change according to the operating condition and instruction of system, the command voltage needed for generation.For vector
Control system, the command voltage of generation is directly the U under two-phase α β rest framesα、Uβ, and classical control system, command voltage
May be the U under three-phase abc rest framesa、Ub、Uc.For convenience of follow-up calculating, obtained usually through following Rotating Transition of Coordinate
Uα、Uβ,
Then variate-value x, y, z is calculated according to (1) formula, then substitutes into formula (2) and calculate N ' values, sector is determined finally according to table 1
Number N.
2) Conventional spatial vector action time is calculated
For the converters shown in Fig. 2, six power devices have eight kinds of switch combinations, and correspondence produces eight bases
This space voltage vector U0~U7, as shown in figure 3, wherein zero space vectors U0、U7Location is identical.And finger to be modulated
Make space voltage vector UOUTAny place outside 7 positions is likely to be at, therefore equivalent conjunction must be gone with basic space voltage vector
Into schematic diagram is as shown in Figure 4.
Wherein, UXAnd UYTwo adjacent non-zero voltage space vectors are represented, wherein (X and Y) ∈ 1~6, UOUTIt is to be modulated
Reference phase voltage vector.In the switch periods time interval T of very littlePWMIt is interior, UOUTTotal action effect can just use UX、UYWith
Zero space vectors U0Or U7Timesharing action effect sum carrys out Approximate Equivalent.Have：
UOUTTPWM≈UXtX+UYtY+U0t0
Wherein, TPWMIt is 2.5kHz, t for modulation periodX、tY、t0Respectively vector UX、UY、U0(or U7) action time.
To simplify calculating, variable X, Y, Z are calculated according to (3) formula, and obtained sector number N is calculated according to the first step, according to
Table 2 chooses tX、tY。
Obtain tX、tYLater, it is necessary to judge whether system is in ovennodulation scope, and then determine the action time of zero vector
t0, it is specially：Such as tX+tYNo more than TPWM, then system is in linear modulation scope, the action time t of zero voltage space vector0Root
Calculate and obtain according to (4) formula；If tX+tYMore than TPWM, then system be likely to be at ovennodulation state, introduce harmonic wave distribution, can basis
(5) formula is adjusted processing.
3) switching point or switching time of comparator are calculated
, it is necessary to corresponding switching time be calculated, so as to follow-up after the action time that second step obtains fundamental space vector
PWM is generated.
It can be calculated according to (6) formula and obtain variable ta、tb、tc, obtained sector number N is then calculated according to table 3 according to the first step
Choose the corresponding switch time t of A, B, C three-phasecm1、tcm2、tcm3.Under stable situation, its typical waveform is as shown in figure 5, can see
Go out, its peak value is T to the maximumPWM/ 2, i.e. 0.0002s.
4) output modulation and analog circuit realize that PWM is generated.
Three step algorithms can be completed in the existing digital control platform shown in Fig. 1 above, the PWM generation rings of final step
Section, current patent document is all the direct dedicated hardware resources using good digital processor, directly obtains the 3rd step
Switch time tcm1、tcm2、tcm3Corresponding comparand register is write, while according to modulating frequency needs, setting period register
Value, then completes PWM generations by the hardware mechanisms of processor.
Because the digital control platform of system shown in Figure 1 does not have above-mentioned dedicated hardware resources, it is therefore desirable to exported
Adjust come it is equivalent realize SVPWM modulate.Consider the carrier parameter of rear class hardware circuit plate, concretely comprise the following steps：
Tuning coefficient K is calculated according to (7) formula, i.e.,
K=2VpeakfPWM=2 × 20 × 2500=100000
Then according to the corresponding tuning formulae of bipolarity carrier characteristics (9), is calculated to previous step obtained switch time
tcm1、tcm2、tcm3Adjusted,
Calculate obtained new modulating wave tcm1 *、tcm2 *、tcm3 *For amplitude ± 10V as shown in Figure 6 signal, pass through simulation
Passage is output to rear class hardware circuit carrier modulation plate and carries out carrier modulation.
The modulation mechanism of single modulation period is as shown in fig. 7, solid line is to utilize the special of good digital processor in figure
Hardware resource realizes pulse modulated Equivalence Mechanism, i.e.,：Cycle rate counter is set as continuous add drop mode of operation, compared
When the value of register and the equal value of cycle rate counter, pwm pulse level is overturn, so as to obtain A, B, C three-phase arteries and veins in Fig. 7
Punching.If the hardware carrier wave in Fig. 1 systems is unipolarity carrier wave, the C phase switching times t drawn is adjusted according to (8) formulacm3' such as
Shown in Fig. 7, by with unipolarity hardware carrier wave ratio compared with, the home pulse signal same with digital processing unit can be obtained, it is other
Two phase signals are same.For ambipolar hardware carrier signal, it is believed that be that unipolar carrier signal is offset downward
Vpeak/ 2 obtain, and the switching time t after being adjusted according to formula (9)cm3 *Also it is equivalent to (8) formula and adjusts obtained signal tcm3' to
Lower skew Vpeak/ 2, thus the carrier wave ratio relatively moment do not change, so as to obtain the modulation consistent with good digital controller
Effect, realizes SVPWM modulation algorithms.
The technological thought of above example only to illustrate the invention, it is impossible to which protection scope of the present invention is limited with this, it is every
According to technological thought proposed by the present invention, any change done on the basis of technical scheme each falls within the scope of the present invention
Within.
Claims (6)
1. the space vector modulation implementation method that a kind of digital-to-analogue is combined, it is characterised in that：Completed using common digital controller
Sector in SVPWM algorithms judges, vector action time calculates and switching time is calculated, and according to the carrier wave of rear class hardware circuit
Characteristic completes output and adjusted, and the generation of pwm pulse is realized eventually through rear class analog circuit；
Concretely comprise the following steps：
The first step, decision instruction space vector UOUTSector N；
Second step, calculates conventional vector action time tX、tYAnd zero vector action time t0；
3rd step, calculates the switching point or switching time t per phase pulsecm1、tcm2、tcm3；
4th step, the switching point or switching time that the 3rd step is obtained is exported with reference to the carrier characteristics of rear class hardware circuit
Adjust and obtain new modulating wave tcm1 *、tcm2 *、tcm3 *, the corresponding logical of hardware circuit is then output to by analog output channel
Road, is compared with carrier wave, obtains pwm pulse signal；
4th step is specially：
Defining tuning coefficient K is：
K=2VpeakfPWM (7)
In above formula, VpeakFor the peak-to-peak value of hardware circuit carrier wave, fPWMFor the frequency of hardware circuit carrier wave；
It is handled as follows according to the polarity of hardware circuit carrier wave：
1) unipolarity carrier wave
<mrow>
<mfenced open = "{" close = "">
<mtable>
<mtr>
<mtd>
<mrow>
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<mi>t</mi>
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</mrow>
</msub>
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</msup>
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<mi>c</mi>
<mi>m</mi>
<mn>1</mn>
</mrow>
</msub>
<mo>*</mo>
<mi>K</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<msup>
<msub>
<mi>t</mi>
<mrow>
<mi>c</mi>
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</mrow>
</msub>
<mo>*</mo>
</msup>
<mo>=</mo>
<msub>
<mi>t</mi>
<mrow>
<mi>c</mi>
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<mn>2</mn>
</mrow>
</msub>
<mo>*</mo>
<mi>K</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<msup>
<msub>
<mi>t</mi>
<mrow>
<mi>c</mi>
<mi>m</mi>
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</mrow>
</msub>
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</mrow>
</msub>
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</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
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2) bipolarity carrier wave
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Processing obtains new modulating wave t according to the method described abovecm1 *、tcm2 *、tcm3 *, rear class hardware is then output to by analog channel
Circuit, is that SVPWM algorithms can be achieved compared with by way of carrier wave ratio.
2. the space vector modulation implementation method that a kind of digital-to-analogue according to claim 1 is combined, it is characterised in that described the
One step is specially：
The sector N refers to any voltage space vector in the band of position of space plane, is sat according to space vector of voltage with static
Angle theta between mark system α axles, is divided into following six sector by space voltage vector：
Ith area：θ=0~π/3；
IIth area：π/3 of θ=π/3~2；
IIIth area：π/3 of θ=2~π；
IVth area：π/3 of θ=π~4；
Vth area：π/3 of π/3 of θ=4~5；
VIth area：The π of π/3 of θ=5~2.
3. the space vector modulation implementation method that a kind of digital-to-analogue according to claim 2 is combined, it is characterised in that according to
UOUTRest frame α, β component Uα、UβTo judge sector, it is specially：
Variate-value x, y, z is calculated by formula (1),
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Then substitute into formula (2) and calculate variable N ' values,
N '=4sign (z)+2sign (y)+sign (x) (2)
In above formula, sign (x) is sign function, is defined as：X ＞ 0, sign (x)=1；X ＜ 0, sign (x)=0；Fan is determined again
Area code N.
4. the space vector modulation implementation method that a kind of digital-to-analogue according to claim 1 is combined, it is characterised in that described the
Two steps are specially：
Vector action time refers to be sweared come equivalent synthetic instruction voltage space with the mode that the timesharing of fundamental voltage space vector is acted on
Amount, the action time needed for each fundamental space vector；
Defined variable X, Y, Z, order
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Wherein, TPWMFor SVPWM modulation period, UdcFor DC bus-bar voltage；
According to command voltage space vector UOUTSector number N, to conventional vector action time tX、tYChosen.
5. the space vector modulation implementation method that a kind of digital-to-analogue according to claim 4 is combined, it is characterised in that：It is linear to adjust
Scope processed, the action time t of zero voltage space vector0For：
t0=TPWM-tX-tY (4)
If there is ovennodulation, i.e. TPWM＜ tX+tY, then following processing is carried out,
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6. the space vector modulation implementation method that a kind of digital-to-analogue according to claim 1 is combined, it is characterised in that described the
Three steps are specially：
The switching point or switching time of comparator are follow-up PWM generations, the process variable of definition for convenience；
For all sector N, definition：
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According to sector number N, the corresponding switch time t of A, B, C three-phase is chosencm1、tcm2、tcm3。
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